[coreboot] Patch set updated for coreboot: aa1cffc Log unexpected post code from the previous boot

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1744

-gerrit

commit aa1cffcda5ce0da686a8cf4bc7475b0ef70e6972
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Sun Sep 9 19:14:45 2012 -0700

    Log unexpected post code from the previous boot
    
    Read out the post code from the previous boot and
    log it if the code is not one of the expected values.
    
    Test:
    1) interrupt the boot of the system, this is easiest
    with warm reset button when servo is attached
    2) check the event log with mosys
    
    65 | 2012-09-09 12:32:11 | Last post code in previous boot | 0x9d
    
    Change-Id: Id418f4c0cf005a3e97b8c63de67cb9a09bc57384
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/console/post.c             | 36 ++++++++++++++++++++++++++++++++++++
 src/drivers/elog/elog.c        |  5 +++++
 src/include/pc80/mc146818rtc.h |  4 ++++
 3 files changed, 45 insertions(+)

diff --git a/src/console/post.c b/src/console/post.c
index ab1afcf..a565c6b 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -22,6 +22,7 @@
 #include <arch/io.h>
 #include <console/console.h>
 #include <pc80/mc146818rtc.h>
+#include <elog.h>
 
 /* Write POST information */
 
@@ -40,6 +41,41 @@ void __attribute__((weak)) mainboard_post(uint8_t value)
 #endif
 
 #if CONFIG_CMOS_POST
+
+#if !defined(__PRE_RAM__)
+void cmos_post_log(void)
+{
+	u8 code;
+
+	/* Get post code from other bank */
+	switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
+	case CMOS_POST_BANK_0_MAGIC:
+		code = cmos_read(CMOS_POST_BANK_1_OFFSET);
+		break;
+	case CMOS_POST_BANK_1_MAGIC:
+		code = cmos_read(CMOS_POST_BANK_0_OFFSET);
+		break;
+	default:
+		return;
+	}
+
+	/* Check last post code in previous boot against normal list */
+	switch (code) {
+	case POST_OS_BOOT:
+	case POST_OS_RESUME:
+	case POST_ENTER_ELF_BOOT:
+	case 0:
+		break;
+	default:
+		printk(BIOS_WARNING, "POST: Unexpected post code "
+		       "in previous boot: 0x%02x\n", code);
+#if CONFIG_ELOG
+		elog_add_event_word(ELOG_TYPE_LAST_POST_CODE, code);
+#endif
+	}
+}
+#endif /* !__PRE_RAM__ */
+
 static void cmos_post_code(u8 value)
 {
 	switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c
index 10208f4..8fbfa0e 100644
--- a/src/drivers/elog/elog.c
+++ b/src/drivers/elog/elog.c
@@ -790,6 +790,11 @@ int elog_init(void)
 		elog_add_event_dword(ELOG_TYPE_BOOT, boot_count_read());
 #endif
 
+#if CONFIG_CMOS_POST && !defined(__SMM__)
+	/* Check and log POST codes from previous boot */
+	cmos_post_log();
+#endif
+
 	return 0;
 }
 
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index edc3241..f0d58d8 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -175,6 +175,10 @@ static inline int get_option(void *dest __attribute__((unused)),
 #define CMOS_POST_BANK_0_OFFSET   (CMOS_POST_OFFSET + 1)
 #define CMOS_POST_BANK_1_MAGIC    0x81
 #define CMOS_POST_BANK_1_OFFSET   (CMOS_POST_OFFSET + 2)
+
+#if !defined(__ROMCC__)
+void cmos_post_log(void);
+#endif
 #endif /* CONFIG_CMOS_POST */
 
 #endif /*  PC80_MC146818RTC_H */