[coreboot] Patch merged into coreboot/master: 924342b SPI: Add Fast Read to the OPMENU for locked down SPI
gerrit at coreboot.org
gerrit at coreboot.org
Mon Nov 12 04:22:59 CET 2012
the following patch was just integrated into master:
commit 924342bb2b9e429d66a693503c9f944655da4bb8
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Mon Oct 8 14:30:06 2012 -0700
SPI: Add Fast Read to the OPMENU for locked down SPI
The chips we are using do not use BE52 (block erase 0x52)
so we can use that opcode menu location to enable fast read.
Change-Id: I18f3e0e5e462b052358654faa0c82103b23a9f61
Signed-off-by: Duncan Laurie <dlaurie at google.com>
Reviewed-on: http://review.coreboot.org/1772
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
Build-Tested: build bot (Jenkins) at Mon Nov 12 00:24:40 2012, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer at coreboot.org> at Mon Nov 12 04:22:57 2012, giving +2
See http://review.coreboot.org/1772 for details.
-gerrit
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