[coreboot] Reading resources failed on MS-6159

[christian.suehs at online.de]

Hello,
a few months ago, i tried to get work a MSI Motherboard with coreboot.
It is a MS-6159 with i440lx northbridge and onboard Ati VGA adapted to the AGP-Bus

Now I start again with the same trouble as before :(
After many changes for RAM configuration and other NB registers which don't work or comes up with the same result.
I think that writing to the PCI Configuration failed by enumerating the buses and a hard reset follows

Datasheet says that 0xCF8 have to access by DWORD, if not the call is bypassed to CPU IO and there 0xCF9 inits a hard reset.
Could that be the problem?

I have enabled the tracing and get this at last lines:
/home/chris/coreboot/src/devices/pci_device.c:102 calls /home/chris/coreboot/src/devices/pci_ops.c:100
/home/chris/coreboot/src/devices/pci_ops.c:101 calls /home/chris/coreboot/src/devices/pci_ops.c:33
/home/chris/coreboot/src/devices/pci_ops.c:41 calls /home/chris/coreboot/src/include/device/pci.h:95
/home/chris/coreboot/src/devices/pci_ops.c:102 calls /home/chris/coreboot/src/include/device/pci.h:95
/home/chris/coreboot/src/devices/pci_ops.c:102 calls /home/chris/coreboot/src/arch/x86/lib/pci_ops_conf1.c:57
/home/chris/coreboot/src/devices/pci_ops.c:102 calls /home/chris/coreboot/src/arch/x86/lib/pci_ops_conf1.c:57
/home/chris/coreboot/src/devices/pci_ops.c:102 calls /home/chris/coreboot/src/arch/x86/lib/pci_ops_conf1.c:57

this is a pci_conf1_write_config32 call
for 3 months it was a pci_conf1_write_config8 call and the mobo resets no idea what I have changed.

 I have also hardcoded many registers near lspci output from factory bios with no sucess
Also change the aperture size to 64MB the current coreboot code for i44olx can't do this because of a failure.

Is there anybody who have get work a mobo with i440lx northbridge?
How can I easily debug the pci enumerating stuff of coreboot.
Why are there 3 calls to PCI there is no loop in the code?

Thanks for any hints

chris