[coreboot] New patch to review for coreboot: fb86753 agesa family15: change some files according to tyans8226
Siyuan Wang (wangsiyuanbuaa@gmail.com)
gerrit at coreboot.org
Thu Sep 6 09:15:38 CEST 2012
Siyuan Wang (wangsiyuanbuaa at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1493
-gerrit
commit fb8675395e969cc48bba6f557735916bc85b1046
Author: Siyuan Wang <wangsiyuanbuaa at gmail.com>
Date: Thu Sep 6 12:17:36 2012 +0800
agesa family15: change some files according to tyans8226
in northbridge.c change apic id to adjust two cpus, I change this according to agesa:
http://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=src/vendorcode/amd/agesa/f15/Proc/CPU/cpuApicUtilities.c;hb=HEAD#l273
273 line of this file.
change a Kconfig and Makefile.inc to adjust tyan s8226
change Platform.h to remove some warnings.
Change-Id: I467add50eec89b6e05bfb005c0bc78418530d4b0
Signed-off-by: Siyuan Wang <SiYuan.Wang at amd.com>
Signed-off-by: Siyuan Wang <wangsiyuanbuaa at gmail.com>
---
src/cpu/amd/agesa/family15/Kconfig | 2 +-
src/northbridge/amd/agesa/family15/northbridge.c | 2 +-
src/southbridge/amd/cimx/sb700/Platform.h | 6 ++++++
src/vendorcode/amd/agesa/f15/Makefile.inc | 2 +-
4 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/src/cpu/amd/agesa/family15/Kconfig b/src/cpu/amd/agesa/family15/Kconfig
index c1528f6..9f44a40 100644
--- a/src/cpu/amd/agesa/family15/Kconfig
+++ b/src/cpu/amd/agesa/family15/Kconfig
@@ -29,7 +29,7 @@ config CPU_AMD_SOCKET_G34
help
AMD G34 Socket
-config CPU_AMD_SOCKET_C32
+config CPU_AMD_AGESA_SOCKET_C32
bool
default n
help
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index da67af4..6329224 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -1071,7 +1071,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max)
lapicid_start = (lapicid_start + 1) * core_max;
printk(BIOS_SPEW, "lpaicid_start=0x%x ", lapicid_start);
}
- u32 apic_id = (lapicid_start * (i/modules + 1)) + ((i % modules) ? (j + (siblings + 1)) : j);
+ u32 apic_id = (i * core_max) + j + lapicid_start;
printk(BIOS_SPEW, "node 0x%x core 0x%x apicid=0x%x\n",
i, j, apic_id);
diff --git a/src/southbridge/amd/cimx/sb700/Platform.h b/src/southbridge/amd/cimx/sb700/Platform.h
index d70345d..906e86e 100644
--- a/src/southbridge/amd/cimx/sb700/Platform.h
+++ b/src/southbridge/amd/cimx/sb700/Platform.h
@@ -61,8 +61,14 @@ void TraceCode ( UINT32 Level, UINT32 Code);
#endif
#else
#if CONFIG_REDIRECT_SBCIMX_TRACE_TO_SERIAL
+ #ifdef TRACE
+ #undef TRACE
+ #endif
#define TRACE(Arguments) printk Arguments
#else
+ #ifdef TRACE
+ #undef TRACE
+ #endif
#define TRACE(Arguments) do {} while(0)
#endif
#define TRACECODE(Arguments)
diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc
index 1f3ba51..62a50af 100644
--- a/src/vendorcode/amd/agesa/f15/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15/Makefile.inc
@@ -390,7 +390,7 @@ agesa_lib_src += ./Proc/Recovery/HT/htInitReset.c
agesa_lib_src += ./Proc/Mem/Main/mmflow.c
agesa_lib_src += ./Proc/Mem/Main/OR/mmflowor.c
agesa_lib_src += ./Proc/Mem/Ps/OR/mpor3.c
-ifeq ($(CONFIG_CPU_AMD_SOCKET_C32), y)
+ifeq ($(CONFIG_CPU_AMD_AGESA_SOCKET_C32), y)
agesa_lib_src += ./Proc/Mem/Main/C32/mmflowC32.c
agesa_lib_src += ./Proc/Mem/Ps/OR/C32/mpLorC3.c
agesa_lib_src += ./Proc/Mem/Ps/OR/C32/mpRorC3.c
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