[coreboot] Please tell us more about Falco, Peppy, Slippy, Bold and Pit!

[Aaron Durbin]

On Thu, Dec 5, 2013 at 4:16 PM, Paul Menzel
<paulepanter at users.sourceforge.net> wrote:
> Dear Aaron,
>
>
> thanks a lot for your quick and interesting reply!
>
>
> Am Mittwoch, den 04.12.2013, 17:49 -0600 schrieb Aaron Durbin:
>> On Wed, Dec 4, 2013 at 4:25 PM, Paul Menzel wrote:
>
>> > developers at Google started upstreaming their patches for their new
>> > devices. For example the boards Falco, Peppy, Pit and Slippy are now in
>> > the coreboot repository. Big thanks for that.
>>
>> Slippy is a reference board that can't be bought.
>> Peppy is the Acer C720
>> Falco is the HP Chromebook 14.
>>
>> Those 3 are all haswell.
>
> So what are Pit and Bolt? Can those be bought?

I'll let someone else speak for Pit. Bolt is another internal
reference board. We probably shouldn't have pushed ones people can't
get, but we are doing all our work in our common chromium repo so it's
easier to just push things together I suspect.

>
>> > Could you please write a summary mail or create Wiki pages, what
>> > Chromebooks these refer to and what features they have?
>>
>> As for features... parallel cpu bring up and parallel SMM relocation.
>> It uses relocatable ramstage, dynamic cbmem, and a few other things
>> that I can't think of off the top of my head.
>
> I guess, all of them use native graphics initialization (Fast User
> Interface (FUI)).
>
>> If you have questions about anything in particular can provide more
>> insight.
>
> I’d be very much interested in timing data and comparison to older
> systems.

I'm not sure how to compare. But on my personal Peppy (Acer C720) that
I rebooted for a ChromeOS update I saw ~460ms to jmp to the payload.
That included 152ms of vboot verifying firmware. So it would have been
300ms to the payload w/o that. That was a warm reset. Power on looks
to be similar ~20ms difference.

>
> […]
>
>> I have more stuff queued up from the baytrail work, but
>> that can be found in our repo. Actually, some of it can be upstreamed
>> now. I generalized the parallel cpu bring up and SMM relocation paths
>> so others can use it as well.
>>
>> See https://chromium.googlesource.com/chromiumos/third_party/coreboot/+/refs/heads/chromeos-2013.04/src/cpu/x86/mp_init.c
>> as the library the following as the usage example (look for
>> 'flight_record'):
>> https://chromium.googlesource.com/chromiumos/third_party/coreboot/+/refs/heads/chromeos-2013.04/src/soc/intel/baytrail/cpu.c
>
> What existing/old boards would easily profit from this? Even the i945
> based boards (Core 2 Duo CPUs I believe)?
>
>

I believe any old board could benefit from this provided there isn't
any usage of global resources in the cpu init path. e.g. malloc() as
coreboot is not thread safe. In my copious amount of free time I want
to move Haswell over to the shared infrastructure. But honestly any
board could be done.

> Thanks,
>
> Paul
>
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