[coreboot] New patch to review for coreboot: 826a0e7 AMD S3: Change S3_VOLATILE_POS to S3_DATA_POS

[Zheng Bao (zheng.bao@amd.com)]

Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2438

-gerrit

commit 826a0e79305cd7cd3a09cb5acfabf991b117fe17
Author: Zheng Bao <fishbaozi at gmail.com>
Date:   Sun Feb 17 17:01:34 2013 +0800

    AMD S3: Change S3_VOLATILE_POS to S3_DATA_POS
    
    S3_DATA_POS defines address where the whole S3 data is stored.
    
    Change-Id: I4155a0821e74a3653caaead890e5fec5677637aa
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: Zheng Bao <fishbaozi at gmail.com>
---
 src/cpu/amd/agesa/s3_resume.h            | 6 +++---
 src/southbridge/amd/Makefile.inc         | 4 ++--
 src/southbridge/amd/agesa/hudson/Kconfig | 2 +-
 src/southbridge/amd/cimx/sb700/Kconfig   | 2 +-
 src/southbridge/amd/cimx/sb800/Kconfig   | 2 +-
 src/southbridge/amd/cimx/sb900/Kconfig   | 2 +-
 6 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/cpu/amd/agesa/s3_resume.h b/src/cpu/amd/agesa/s3_resume.h
index 39ad30a..367cc3f 100644
--- a/src/cpu/amd/agesa/s3_resume.h
+++ b/src/cpu/amd/agesa/s3_resume.h
@@ -24,9 +24,9 @@
 #define S3_DATA_VOLATILE_SIZE	0x6000
 #define S3_DATA_MTRR_SIZE	0x1000
 #define S3_DATA_NONVOLATILE_SIZE	0x1000
-#define S3_DATA_VOLATILE_POS	CONFIG_S3_VOLATILE_POS
-#define S3_DATA_MTRR_POS	(CONFIG_S3_VOLATILE_POS + S3_DATA_VOLATILE_SIZE)
-#define S3_DATA_NONVOLATILE_POS	(CONFIG_S3_VOLATILE_POS + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE)
+#define S3_DATA_VOLATILE_POS	CONFIG_S3_DATA_POS
+#define S3_DATA_MTRR_POS	(CONFIG_S3_DATA_POS + S3_DATA_VOLATILE_SIZE)
+#define S3_DATA_NONVOLATILE_POS	(CONFIG_S3_DATA_POS + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE)
 
 typedef enum {
 	S3DataTypeNonVolatile=0,            ///< NonVolatile Data Type
diff --git a/src/southbridge/amd/Makefile.inc b/src/southbridge/amd/Makefile.inc
index 1b2cb1f..5f54314 100644
--- a/src/southbridge/amd/Makefile.inc
+++ b/src/southbridge/amd/Makefile.inc
@@ -20,14 +20,14 @@ ifeq ($(CONFIG_HAVE_ACPI_RESUME), y)
 ifeq ($(CONFIG_CPU_AMD_AGESA), y)
 
 $(obj)/coreboot_s3nv.rom: $(obj)/config.h
-	echo "    S3 NVRAM   $(CONFIG_S3_VOLATILE_POS) (S3 storage area)"
+	echo "    S3 NVRAM   $(CONFIG_S3_DATA_POS) (S3 storage area)"
 	# force C locale, so cygwin awk doesn't try to interpret the 0xff below as UTF-8 (or worse)
 	LC_ALL=C awk 'BEGIN {for (i=0; i<32768; i++) {printf "%c", 255}}' > $@.tmp
 	mv $@.tmp $@
 
 cbfs-files-y += s3nv
 s3nv-file := $(obj)/coreboot_s3nv.rom
-s3nv-position := $(CONFIG_S3_VOLATILE_POS)
+s3nv-position := $(CONFIG_S3_DATA_POS)
 s3nv-type := raw
 
 endif # CONFIG_CPU_AMD_AGESA == y
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig
index 35d8996..a469970 100644
--- a/src/southbridge/amd/agesa/hudson/Kconfig
+++ b/src/southbridge/amd/agesa/hudson/Kconfig
@@ -204,7 +204,7 @@ config RAID_MISC_ROM_POSITION
 	  The CONFIG_ROM_SIZE must larger than 0x100000.
 endif # HUDSON_SATA_RAID
 
-config S3_VOLATILE_POS
+config S3_DATA_POS
 	hex "S3 volatile storage position"
 	default 0xFFFF0000
 	depends on HAVE_ACPI_RESUME
diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig
index ee740d5..706309d 100644
--- a/src/southbridge/amd/cimx/sb700/Kconfig
+++ b/src/southbridge/amd/cimx/sb700/Kconfig
@@ -60,7 +60,7 @@ config REDIRECT_SBCIMX_TRACE_TO_SERIAL
 
 	  Warning: Only enable this option when debuging or tracing AMD CIMX code.
 
-config S3_VOLATILE_POS
+config S3_DATA_POS
 	hex "S3 volatile storage position"
 	default 0xFFFF0000
 	depends on HAVE_ACPI_RESUME
diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index 2620974..f56e017 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -122,7 +122,7 @@ config RAID_MISC_ROM_POSITION
 
 endif
 
-config S3_VOLATILE_POS
+config S3_DATA_POS
 	hex "S3 volatile storage position"
 	default 0xFFFF0000
 	depends on HAVE_ACPI_RESUME
diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig
index 0efbf97..3cadba1 100755
--- a/src/southbridge/amd/cimx/sb900/Kconfig
+++ b/src/southbridge/amd/cimx/sb900/Kconfig
@@ -53,7 +53,7 @@ config BOOTBLOCK_SOUTHBRIDGE_INIT
         string
         default "southbridge/amd/cimx/sb900/bootblock.c"
 
-config S3_VOLATILE_POS
+config S3_DATA_POS
 	hex "S3 volatile storage position"
 	default 0xFFFF0000
 	depends on HAVE_ACPI_RESUME