[coreboot] New patch to review for coreboot: e1918f8 Drop SRC_ROOT from mainboard Makefile.incs
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Thu Feb 28 00:14:18 CET 2013
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2548
-gerrit
commit e1918f89f2dac97a2b4582d1f5d25a5b7bbaa5ae
Author: Stefan Reinauer <stefan.reinauer at coreboot.org>
Date: Thu Feb 28 00:12:18 2013 +0100
Drop SRC_ROOT from mainboard Makefile.incs
It's not used, and not needed.
Change-Id: Ifca92f3606ac58fc26e09676488c3add5d84ae79
Signed-off-by: Stefan Reinauer <reinauer at google.com>
---
src/mainboard/emulation/qemu-armv7/Makefile.inc | 2 --
src/mainboard/google/butterfly/Makefile.inc | 2 --
src/mainboard/google/link/Makefile.inc | 4 +---
src/mainboard/google/parrot/Makefile.inc | 2 --
src/mainboard/google/snow/Makefile.inc | 6 ------
5 files changed, 1 insertion(+), 15 deletions(-)
diff --git a/src/mainboard/emulation/qemu-armv7/Makefile.inc b/src/mainboard/emulation/qemu-armv7/Makefile.inc
index cea3b15..80b392b 100644
--- a/src/mainboard/emulation/qemu-armv7/Makefile.inc
+++ b/src/mainboard/emulation/qemu-armv7/Makefile.inc
@@ -26,5 +26,3 @@ ramstage-y += timer.c
bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c
romstage-$(CONFIG_EARLY_CONSOLE) += uart.c
ramstage-y += uart.c
-
-SRC_ROOT = $(src)/mainboard/emulation/qemu-armv7a
diff --git a/src/mainboard/google/butterfly/Makefile.inc b/src/mainboard/google/butterfly/Makefile.inc
index 9e753fb..5b4e74c 100644
--- a/src/mainboard/google/butterfly/Makefile.inc
+++ b/src/mainboard/google/butterfly/Makefile.inc
@@ -23,5 +23,3 @@ romstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c
-
-SRC_ROOT = $(src)/mainboard/google/butterfly
diff --git a/src/mainboard/google/link/Makefile.inc b/src/mainboard/google/link/Makefile.inc
index 3f04a30..a769d95 100644
--- a/src/mainboard/google/link/Makefile.inc
+++ b/src/mainboard/google/link/Makefile.inc
@@ -27,14 +27,12 @@ ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += i915io.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c
SPD_BIN = $(obj)/spd.bin
-SRC_ROOT = $(src)/mainboard/google/link
-
# Order of names in SPD_SOURCES is important!
SPD_SOURCES = elpida_4Gb_1600_x16
SPD_SOURCES += samsung_4Gb_1600_1.35v_x16
SPD_SOURCES += micron_4Gb_1600_1.35v_x16
-SPD_DEPS := $(foreach f, $(SPD_SOURCES), $(SRC_ROOT)/$(f).spd.hex)
+SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/$(f).spd.hex)
# Include spd rom data
$(SPD_BIN): $(SPD_DEPS)
diff --git a/src/mainboard/google/parrot/Makefile.inc b/src/mainboard/google/parrot/Makefile.inc
index f2de43e..5ad5454 100644
--- a/src/mainboard/google/parrot/Makefile.inc
+++ b/src/mainboard/google/parrot/Makefile.inc
@@ -21,5 +21,3 @@ ramstage-y += ec.c
romstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
-
-SRC_ROOT = $(src)/mainboard/google/parrot
diff --git a/src/mainboard/google/snow/Makefile.inc b/src/mainboard/google/snow/Makefile.inc
index 668e3b7..46e366f 100644
--- a/src/mainboard/google/snow/Makefile.inc
+++ b/src/mainboard/google/snow/Makefile.inc
@@ -24,9 +24,3 @@ romstage-y += romstage.c
# ramstage-y += ec.c
ramstage-y += ramstage.c
ramstage-y += chromeos.c
-
-# romstage-$(CONFIG_CHROMEOS) += chromeos.c
-
-# FIXME: we should do something similar to x86 platforms for Snow SPDs
-
-SRC_ROOT = $(src)/mainboard/google/snow
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