[coreboot] Patch set updated for coreboot: 59a8e96 Omit a lot of pinmux code in __PRE_RAM__ stage

[David Hendricks (dhendrix@chromium.org)]

David Hendricks (dhendrix at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2061

-gerrit

commit 59a8e968e27e4e15cb52d5e2f0a753be735114d5
Author: David Hendricks <dhendrix at chromium.org>
Date:   Thu Jan 10 12:00:21 2013 -0800

    Omit a lot of pinmux code in __PRE_RAM__ stage
    
    This omits a lot of pinmux code to save space. It is no longer needed.
    
    Change-Id: I970d2111855ee5e2d960d38f99100b31b2b39eb5
    Signed-off-by: David Hendricks <dhendrix at chromium.org>
    Signed-off-by: Hung-Te Lin <hungte at chromium.org>
---
 src/cpu/samsung/exynos5250/pinmux.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/cpu/samsung/exynos5250/pinmux.c b/src/cpu/samsung/exynos5250/pinmux.c
index becced2..ffdd182 100644
--- a/src/cpu/samsung/exynos5250/pinmux.c
+++ b/src/cpu/samsung/exynos5250/pinmux.c
@@ -30,7 +30,12 @@
 
 int exynos_pinmux_config(enum periph_id peripheral, int flags)
 {
-	int i, start, count, start_ext, pin_ext, pin, drv;
+	int i, start, count;
+
+#ifndef __PRE_RAM__
+	/* Variables only in RAM stage. */
+	int start_ext, pin_ext, pin, drv;
+#endif
 
 	switch (peripheral) {
 	case PERIPH_ID_UART0:
@@ -57,6 +62,8 @@ int exynos_pinmux_config(enum periph_id peripheral, int flags)
 			gpio_cfg_pin(i, EXYNOS_GPIO_FUNC(0x2));
 		}
 		break;
+
+#ifndef __PRE_RAM__
 	case PERIPH_ID_SDMMC0:
 	case PERIPH_ID_SDMMC1:
 	case PERIPH_ID_SDMMC2:
@@ -294,6 +301,8 @@ int exynos_pinmux_config(enum periph_id peripheral, int flags)
 		for (i = 0; i < 5; i++)
 			gpio_cfg_pin(GPIO_B00 + i, EXYNOS_GPIO_FUNC(0x02));
 		break;
+#endif // __PRE_RAM__
+
 	default:
 		debug("%s: invalid peripheral %d", __func__, peripheral);
 		return -1;