[coreboot] Samsung 550 Chromebook own Coreboot

Aaron Durbin adurbin at chromium.org
Mon Jul 29 17:25:18 CEST 2013


On Mon, Jul 29, 2013 at 10:22 AM, Kyösti Mälkki <kyosti.malkki at gmail.com> wrote:
>
>
> Did someone change the SPD eeprom address notation in pei_data from
> 7-bit to 8-bit addresses?
>
> samsung/lumpy/romstage.c :
>         .spd_addresses = { 0x50, 0x00,0xf0,0x00 },
>
> google/stout/romstage.c :
>         spd_addresses: { 0xA0, 0x00,0xA4,0x00 },
>
>
The 0xf0 handles the soldered down memory. I was looking at the 0x50
address as well, but I think that is correct (I'm looking at code that
I think is the wrapper that you guys are using). I could be wrong
though.



More information about the coreboot mailing list