[coreboot] Patch merged into coreboot/master: 9ae1eb6 Super I/O W83627DHG: Enable UART B by redirecting pins
gerrit at coreboot.org
gerrit at coreboot.org
Fri Mar 15 17:51:49 CET 2013
the following patch was just integrated into master:
commit 9ae1eb6961b483c9905423fb113100a8038b4507
Author: Wolfgang Kamp <wmkamp at datakamp.de>
Date: Mon Mar 11 16:35:42 2013 +0100
Super I/O W83627DHG: Enable UART B by redirecting pins
Pins 78-85 are set to GPIO after power on or reset. To enable
UART B the pins must be redirected to it.
Look at W83627DHG databook version 1.4 page 185 Chip
(global) Control Register CR2C.
Change-Id: I12b094a60d9c5cb2447a553be4679a4605e19845
Signed-off-by: Wolfgang Kamp <wmkamp at datakamp.de>
Reviewed-on: http://review.coreboot.org/2626
Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
Tested-by: build bot (Jenkins)
Build-Tested: build bot (Jenkins) at Fri Mar 15 17:50:04 2013, giving +1
See http://review.coreboot.org/2626 for details.
-gerrit
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