[coreboot] Patch merged into coreboot/master: 3d0071b haswell: adjust CAR usage

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 3d0071bde363bbcd2ef3d68bac67400feced1778
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Fri Jan 18 14:32:50 2013 -0600

    haswell: adjust CAR usage
    
    It was found that the Haswell reference code was smashing through the
    stack into the reference code's heap implementation. The reason for this
    is because our current CAR allocation is too small. Moreover there are
    quite a few things to coordinate between 2 code bases to get correct.
    This commit separates the CAR into 2 parts:
      1. MRC CAR usage.
      2. Coreboot CAR usage.
    Pointers from one region can be passed between the 2 modules, but one
    should not be able to affect the others as checking has been put into
    place in both modules.
    
    The CAR size has effectively been doubled from 0x20000 (128 KiB) to
    0x40000 (256KiB). Not all of that increase was needed, but enforcing
    a power of 2 size only utilizes 1 MTRR.
    
    Old CAR layout with a single contiguous stack with the region starting
    at CONFIG_DCACHE_RAM_BASE:
    
    +---------------------------------------+ Offset CONFIG_DCACHE_RAM_SIZE
    |  MRC global variables                 |
    |  CONFIG_DCACHE_RAM_MRC_VAR_SIZE bytes |
    +---------------------------------------+
    |  ROM stage stack                      |
    |                                       |
    |                                       |
    +---------------------------------------+
    |  MRC Heap 30000 bytes                 |
    +---------------------------------------+
    |  ROM stage console                    |
    |  CONFIG_CONSOLE_CAR_BUFFER_SIZE bytes |
    +---------------------------------------+
    |  ROM stage CAR_GLOBAL variables       |
    +---------------------------------------+ Offset 0
    
    There was some hard coded offsets in the reference code wrapper to start
    the heap past the console buffer. Even with this commit the console
    can smash into the following region depending on what size
    CONFIG_CONSOLE_CAR_BUFFER_SIZE is.
    
    As noted above This change splits the CAR region into 2 parts starting
    at CONFIG_DCACHE_RAM_BASE:
    
    +---------------------------------------+
    |  MRC Region                           |
    |  CONFIG_DCACHE_RAM_MRC_VAR_SIZE bytes |
    +---------------------------------------+ Offset CONFIG_DCACHE_RAM_SIZE
    |  ROM stage stack                      |
    |                                       |
    |                                       |
    +---------------------------------------+
    |  ROM stage console                    |
    |  CONFIG_CONSOLE_CAR_BUFFER_SIZE bytes |
    +---------------------------------------+
    |  ROM stage CAR_GLOBAL variables       |
    +---------------------------------------+ Offset 0
    
    Another variable was add, CONFIG_DCACHE_RAM_ROMSTAGE_STACK_SIZE,
    which represents the expected stack usage for the romstage. A marker
    is checked at the base of the stack to determine if either the stack
    was smashed or the console encroached on the stack.
    
    Change-Id: Id76f2fe4a5cf1c776c8f0019f406593f68e443a7
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/2752
    Tested-by: build bot (Jenkins)
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>

Build-Tested: build bot (Jenkins) at Sat Mar 16 00:19:45 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminnich at gmail.com> at Mon Mar 18 20:47:50 2013, giving +2
See http://review.coreboot.org/2752 for details.

-gerrit