[coreboot] New patch to review for coreboot: 38ac7d4 ramstage: prepare for relocation
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Tue Mar 19 01:58:54 CET 2013
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2789
-gerrit
commit 38ac7d464a2b75c7a5c0e7ca7cb783d0fe3ee5fa
Author: Aaron Durbin <adurbin at chromium.org>
Date: Fri Feb 8 16:56:51 2013 -0600
ramstage: prepare for relocation
The current ramstage code contains uses of symbols that cause issues
when the ramstage is relocatable. There are 2 scenarios resolved by this
patch:
1. Absolute symbols that are actually sizes/limits. The symbols are
problematic when relocating a program because there is no way to
distinguish a symbol that shouldn't be relocated and one that can.
The only way to handle these symbols is to write a program to post
process the relocations and keep a whitelist of ones that shouldn't
be relocated. I don't believe that is a route that should be taken
so fix the users of these sizes/limits encoded as absolute symbols
to calculate the size at runtime or dereference a variable in memory
containing the size/limit.
2. Absoulte symbols that were relocated to a fixed address. These
absolute symbols are generated by assembly files to be placed at a
fixed location. Again, these symbols are problematic because one
can't distinguish a symbol that can't be relocated. The symbols
are again resolved at runtime to allow for proper relocation.
For the symbols defining a size either use 2 symbols and calculate the
difference or provide a variable in memory containing the size.
Change-Id: I1ef2bfe6fd531308218bcaac5dcccabf8edf932c
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/arch/x86/boot/acpi.c | 5 +++--
src/arch/x86/boot/wakeup.S | 3 ++-
src/arch/x86/lib/c_start.S | 5 ++---
src/cpu/intel/haswell/mp_init.c | 4 ++--
src/cpu/x86/lapic/lapic_cpu_init.c | 18 +++++++++++++++
src/cpu/x86/lapic/secondary.S | 8 ++++---
src/device/oprom/realmode/x86.c | 45 ++++++++++++++++++++++++++-----------
src/device/oprom/realmode/x86.h | 8 +++----
src/device/oprom/realmode/x86_asm.S | 15 +++++++------
9 files changed, 76 insertions(+), 35 deletions(-)
diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c
index fc862f4..327d175 100644
--- a/src/arch/x86/boot/acpi.c
+++ b/src/arch/x86/boot/acpi.c
@@ -754,7 +754,8 @@ extern int lowmem_backup_size;
void (*acpi_do_wakeup)(u32 vector, u32 backup_source, u32 backup_target,
u32 backup_size) asmlinkage = (void *)WAKEUP_BASE;
-extern unsigned char __wakeup, __wakeup_size;
+extern unsigned char __wakeup;
+extern unsigned int __wakeup_size;
void acpi_jump_to_wakeup(void *vector)
{
@@ -776,7 +777,7 @@ void acpi_jump_to_wakeup(void *vector)
#endif
/* Copy wakeup trampoline in place. */
- memcpy((void *)WAKEUP_BASE, &__wakeup, (size_t)&__wakeup_size);
+ memcpy((void *)WAKEUP_BASE, &__wakeup, __wakeup_size);
#if CONFIG_COLLECT_TIMESTAMPS
timestamp_add_now(TS_ACPI_WAKE_JUMP);
diff --git a/src/arch/x86/boot/wakeup.S b/src/arch/x86/boot/wakeup.S
index d34c583..8748aa6 100644
--- a/src/arch/x86/boot/wakeup.S
+++ b/src/arch/x86/boot/wakeup.S
@@ -90,5 +90,6 @@ __wakeup_segment = RELOCATED(.)
.word 0x0000
.globl __wakeup_size
-__wakeup_size = ( . - __wakeup)
+__wakeup_size:
+ .long . - __wakeup
diff --git a/src/arch/x86/lib/c_start.S b/src/arch/x86/lib/c_start.S
index 295283b..66af8ea 100644
--- a/src/arch/x86/lib/c_start.S
+++ b/src/arch/x86/lib/c_start.S
@@ -261,11 +261,10 @@ gdb_stub_breakpoint:
#endif
- .globl gdt, gdt_end, gdt_limit, idtarg
+ .globl gdt, gdt_end, idtarg
-gdt_limit = gdt_end - gdt - 1 /* compute the table limit */
gdtaddr:
- .word gdt_limit
+ .word gdt_end - gdt - 1
.long gdt /* we know the offset */
.data
diff --git a/src/cpu/intel/haswell/mp_init.c b/src/cpu/intel/haswell/mp_init.c
index 3076d07..47683fb 100644
--- a/src/cpu/intel/haswell/mp_init.c
+++ b/src/cpu/intel/haswell/mp_init.c
@@ -66,7 +66,7 @@ struct saved_msr {
extern char _binary_sipi_vector_start[];
/* These symbols are defined in c_start.S. */
extern char gdt[];
-extern char gdt_limit[];
+extern char gdt_end[];
extern char idtarg[];
/* This table keeps track of each CPU's APIC id. */
@@ -189,7 +189,7 @@ static void setup_default_sipi_vector_params(struct sipi_params *sp)
int i;
sp->gdt = (u32)&gdt;
- sp->gdtlimit = (u32)&gdt_limit;
+ sp->gdtlimit = (u32)&gdt_end - (u32)&gdt - 1;
sp->idt_ptr = (u32)&idtarg;
sp->stack_size = CONFIG_STACK_SIZE;
sp->stack_top = (u32)&_estack;
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index 9a00b82..69430d5 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -52,12 +52,30 @@ int lowmem_backup_size;
#endif
extern char _secondary_start[];
+extern char _secondary_gdt_addr[];
+extern char gdt[];
+extern char gdt_end[];
+
+static inline void setup_secondary_gdt(void)
+{
+ u16 *gdt_limit;
+ u32 *gdt_base;
+
+ gdt_limit = (void *)&_secondary_gdt_addr;
+ gdt_base = (void *)&gdt_limit[1];
+
+ *gdt_limit = (u32)&gdt_end - (u32)&gdt - 1;
+ *gdt_base = (u32)&gdt;
+}
static void copy_secondary_start_to_lowest_1M(void)
{
extern char _secondary_start_end[];
unsigned long code_size;
+ /* Fill in secondary_start's local gdt. */
+ setup_secondary_gdt();
+
code_size = (unsigned long)_secondary_start_end - (unsigned long)_secondary_start;
#if CONFIG_HAVE_ACPI_RESUME
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index 2e0620e..6edcd0a 100644
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -3,7 +3,7 @@
#if CONFIG_SMP && CONFIG_MAX_CPUS > 1
.text
- .globl _secondary_start, _secondary_start_end
+ .globl _secondary_start, _secondary_start_end, _secondary_gdt_addr
.balign 4096
_secondary_start:
.code16
@@ -28,9 +28,11 @@ _secondary_start:
ljmpl $0x10, $__ap_protected_start
+ /* This will get filled in by C code. */
+_secondary_gdt_addr:
gdtaddr:
- .word gdt_limit /* the table limit */
- .long gdt /* we know the offset */
+ .word 0 /* the table limit */
+ .long 0 /* we know the offset */
_secondary_start_end:
diff --git a/src/device/oprom/realmode/x86.c b/src/device/oprom/realmode/x86.c
index 5fd11b5..94b65e1 100644
--- a/src/device/oprom/realmode/x86.c
+++ b/src/device/oprom/realmode/x86.c
@@ -36,16 +36,37 @@
#include <boot/coreboot_tables.h>
#include <device/pci_ids.h>
+/* The following symbols cannot be used directly. They need to be fixed up
+ * to point to the correct address location after the code has been copied
+ * to REALMODE_BASE. Absolute symbols are not used because those symbols are
+ * relocated when a relocatable ramstage is enabled.
+ */
+extern unsigned char __realmode_call, __realmode_interrupt;
+extern unsigned char __realmode_buffer;
+
+#define PTR_TO_REAL_MODE(sym)\
+ (void *)(REALMODE_BASE + ((char *)&(sym) - (char *)&__realmode_code))
+
/* to have a common register file for interrupt handlers */
X86EMU_sysEnv _X86EMU_env;
void (*realmode_call)(u32 addr, u32 eax, u32 ebx, u32 ecx, u32 edx,
- u32 esi, u32 edi) asmlinkage =
- (void *)&__realmode_call;
+ u32 esi, u32 edi) asmlinkage;
void (*realmode_interrupt)(u32 intno, u32 eax, u32 ebx, u32 ecx, u32 edx,
- u32 esi, u32 edi) asmlinkage =
- (void *)&__realmode_interrupt;
+ u32 esi, u32 edi) asmlinkage;
+
+static void setup_realmode_code(void)
+{
+ memcpy(REALMODE_BASE, &__realmode_code, __realmode_code_size);
+
+ /* Ensure the global pointers are relocated properly. */
+ realmode_call = PTR_TO_REAL_MODE(__realmode_call);
+ realmode_interrupt = PTR_TO_REAL_MODE(__realmode_interrupt);
+
+ printk(BIOS_SPEW, "Real mode stub @%p: %d bytes\n", REALMODE_BASE,
+ __realmode_code_size);
+}
static void setup_rombios(void)
{
@@ -149,7 +170,7 @@ static void write_idt_stub(void *target, u8 intnum)
{
unsigned char *codeptr;
codeptr = (unsigned char *) target;
- memcpy(codeptr, &__idt_handler, (size_t)&__idt_handler_size);
+ memcpy(codeptr, &__idt_handler, __idt_handler_size);
codeptr[3] = intnum; /* modify int# in the code stub. */
}
@@ -163,7 +184,7 @@ static void setup_realmode_idt(void)
*/
for (i = 0; i < 256; i++) {
idts[i].cs = 0;
- idts[i].offset = 0x1000 + (i * (u32)&__idt_handler_size);
+ idts[i].offset = 0x1000 + (i * __idt_handler_size);
write_idt_stub((void *)((u32 )idts[i].offset), i);
}
@@ -204,7 +225,7 @@ static u8 vbe_get_mode_info(vbe_mode_info_t * mi)
{
printk(BIOS_DEBUG, "VBE: Getting information about VESA mode %04x\n",
mi->video_mode);
- char *buffer = (char *)&__buffer;
+ char *buffer = PTR_TO_REAL_MODE(__realmode_buffer);
u16 buffer_seg = (((unsigned long)buffer) >> 4) & 0xff00;
u16 buffer_adr = ((unsigned long)buffer) & 0xffff;
realmode_interrupt(0x10, VESA_GET_MODE_INFO, 0x0000,
@@ -312,9 +333,8 @@ void run_bios(struct device *dev, unsigned long addr)
/* Set up real-mode IDT */
setup_realmode_idt();
- memcpy(REALMODE_BASE, &__realmode_code, (size_t)&__realmode_code_size);
- printk(BIOS_SPEW, "Real mode stub @%p: %d bytes\n", REALMODE_BASE,
- (u32)&__realmode_code_size);
+ /* Make sure the code is placed. */
+ setup_realmode_code();
printk(BIOS_DEBUG, "Calling Option ROM...\n");
/* TODO ES:DI Pointer to System BIOS PnP Installation Check Structure */
@@ -366,9 +386,8 @@ void do_vsmbios(void)
/* Setting up realmode IDT */
setup_realmode_idt();
- memcpy(REALMODE_BASE, &__realmode_code, (size_t)&__realmode_code_size);
- printk(BIOS_SPEW, "VSA: Real mode stub @%p: %d bytes\n", REALMODE_BASE,
- (u32)&__realmode_code_size);
+ /* Make sure the code is placed. */
+ setup_realmode_code();
if ((unsigned int)cbfs_load_stage(CBFS_DEFAULT_MEDIA, "vsa") !=
VSA2_ENTRY_POINT) {
diff --git a/src/device/oprom/realmode/x86.h b/src/device/oprom/realmode/x86.h
index 76d3e46..a811a56 100644
--- a/src/device/oprom/realmode/x86.h
+++ b/src/device/oprom/realmode/x86.h
@@ -32,10 +32,10 @@ struct realmode_idt {
void x86_exception(struct eregs *info);
/* From x86_asm.S */
-extern unsigned char __idt_handler, __idt_handler_size;
-extern unsigned char __realmode_code, __realmode_code_size;
-extern unsigned char __realmode_call, __realmode_interrupt;
-extern unsigned char __buffer;
+extern unsigned char __idt_handler;
+extern unsigned int __idt_handler_size;
+extern unsigned char __realmode_code;
+extern unsigned int __realmode_code_size;
extern void (*realmode_call)(u32 addr, u32 eax, u32 ebx, u32 ecx, u32 edx,
u32 esi, u32 edi) asmlinkage;
diff --git a/src/device/oprom/realmode/x86_asm.S b/src/device/oprom/realmode/x86_asm.S
index 56ebb3a..54cf374 100644
--- a/src/device/oprom/realmode/x86_asm.S
+++ b/src/device/oprom/realmode/x86_asm.S
@@ -36,7 +36,8 @@ __idt_handler:
movb $0, %al /* This instruction gets modified */
ljmp $0, $__interrupt_handler_16bit
.globl __idt_handler_size
-__idt_handler_size = ( . - __idt_handler)
+__idt_handler_size:
+ .long . - __idt_handler
/* In order to be independent of coreboot's position in RAM
@@ -47,7 +48,6 @@ __idt_handler_size = ( . - __idt_handler)
__realmode_code:
/* Realmode IDT pointer structure. */
- .globl __realmode_idt
__realmode_idt = RELOCATED(.)
.word 1023 /* 16 bit limit */
.long 0 /* 24 bit base */
@@ -67,13 +67,13 @@ __registers = RELOCATED(.)
.long 0 /* 20 - EDI */
/* 256 byte buffer, used by int10 */
- .globl __buffer
-__buffer = RELOCATED(.)
+ .globl __realmode_buffer
+__realmode_buffer:
.skip 256
.code32
.globl __realmode_call
-__realmode_call = RELOCATED(.)
+__realmode_call:
/* save all registers to the stack */
pusha
pushf
@@ -204,7 +204,7 @@ __lcall_instr = RELOCATED(.)
ret
.globl __realmode_interrupt
-__realmode_interrupt = RELOCATED(.)
+__realmode_interrupt:
/* save all registers to the stack */
pusha
pushf
@@ -408,6 +408,7 @@ __interrupt_handler_16bit = RELOCATED(.)
iret
.globl __realmode_code_size
-__realmode_code_size = (. - __realmode_code)
+__realmode_code_size:
+ .long . - __realmode_code
.code32
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