[coreboot] Chromebook coreboot sources

[Aaron Durbin]

On Tue, Nov 5, 2013 at 12:52 PM, Stefan Reinauer
<stefan.reinauer at coreboot.org> wrote:
> * Aaron Durbin <adurbin at chromium.org> [131105 18:00]:
>> On Tue, Nov 5, 2013 at 10:55 AM, Kyösti Mälkki <kyosti.malkki at gmail.com> wrote:
>> > Hi
>> >
>> > A recent discussion I had about google/stout suggested that with the sources
>> > from coreboot git, this board is unable to resume from S3 suspend.
>> > (Argumentation: no EARLY_CBMEM_INIT, no MRC cache, no memory training
>> > results).
>> >
>> > I find it hard to believe this problem would affect production units and I
>> > tried to locate the sources where this is fixed from chromium git, without
>> > success.
>> >
>> > So this question pops on the surface once again: how do I track down, locate
>> > and download the specific revision of coreboot sources for a Chromebook
>> > production unit? I'd like to see fixes like this upstreamed to coreboot git.
>> >
>> > As a related topic: Sandy/ivybridge boards have some low-memory writes on S3
>> > resume, see use of CBMEM_RESUME_BACKUP and CBMEM_BOOT_MODE in romstage.c. Is
>> > there some argumentation why these writes are safe and do not corrupt OS
>> > memory?
>>
>> It's my understanding that things are just lucky because Linux
>> reserves that low memory from its use.
>
> Last I checked that memory was marked reserved by coreboot, so Linux
> should not use it. Did this change?

I think it's up to the chipset code to mark it as reserved. I don't
recall seeing anything in the  sandy/ivy codebase which makes that
happen. Anyone have a boot log of stout? It'd be really easy to check.

-Aaron