[coreboot] Fwd: reset vector issue

[Peter Stuge]

ron minnich wrote:
> restoring it post-jump would not help

Ron, please do read the commit messages. Or please do read the code.

For convenience I'm attaching both log and code as a text file.


//Peter
-------------- next part --------------
$ git log -p --reverse src/cpu/x86/16bit/reset16.inc
commit fcd5ace00b333ce31b11b02a2243dfbf39307f10
Author: Eric Biederman <ebiederm at xmission.com>
Date:   Thu Oct 14 19:29:29 2004 +0000

    - Add new cvs code to cvs
    
    
    git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/cpu/x86/16bit/reset16.inc b/src/cpu/x86/16bit/reset16.inc
new file mode 100644
index 0000000..d36c940
--- /dev/null
+++ b/src/cpu/x86/16bit/reset16.inc
@@ -0,0 +1,21 @@
+	.section ".reset"
+	.code16
+.globl	reset_vector
+reset_vector:
+#if _ROMBASE >= 0xffff0000
+	/* jmp _start */
+	.byte  0xe9
+	.int   _start - ( . + 2 )
+	/* Note: The above jump is hand coded to work around bugs in binutils.
+	 * 5 byte are used for a 3 byte instruction.  This works because x86
+	 * is little endian and allows us to use supported 32bit relocations
+	 * instead of the weird 16 bit relocations that binutils does not
+	 * handle consistenly between versions because they are used so rarely.
+	 */
+#else
+# error _ROMBASE is an unsupported value
+#endif
+	. = 0x8;
+	.code32
+	jmp	protected_start
+	.previous

commit f8a2dddb573faef41ad43ee111d91d4c5259ad59
Author: Eric Biederman <ebiederm at xmission.com>
Date:   Sat Oct 30 08:05:41 2004 +0000

    - To reduce confuse rename the parts of linuxbios bios that run from
      ram linuxbios_ram instead of linuxbios_c and linuxbios_payload...
    - Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86
    - ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB.
    - Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work.
    - Start using romcc's built in preprocessor (This will simplify header compiler checks)
    - Add helper functions for examining all of the resources
    - Remove debug strings from chip.h
    - Add llshell to src/arch/i386/llshell (Sometime later I can try it...)
    - Add the ability to catch exceptions on x86
    - Add gdb_stub support to x86
    - Removed old cpu options
    - Added an option so we can detect movnti support
    - Remove some duplicate definitions from pci_ids.h
    - Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic
    - Minor romcc bug fixes
    
    
    git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

diff --git a/src/cpu/x86/16bit/reset16.inc b/src/cpu/x86/16bit/reset16.inc
index d36c940..1be0e3a 100644
--- a/src/cpu/x86/16bit/reset16.inc
+++ b/src/cpu/x86/16bit/reset16.inc
@@ -2,8 +2,6 @@
 	.code16
 .globl	reset_vector
 reset_vector:
-#if _ROMBASE >= 0xffff0000
-	/* jmp _start */
 	.byte  0xe9
 	.int   _start - ( . + 2 )
 	/* Note: The above jump is hand coded to work around bugs in binutils.
@@ -12,9 +10,6 @@ reset_vector:
 	 * instead of the weird 16 bit relocations that binutils does not
 	 * handle consistenly between versions because they are used so rarely.
 	 */
-#else
-# error _ROMBASE is an unsupported value
-#endif
 	. = 0x8;
 	.code32
 	jmp	protected_start

commit deda99783312ee0567465e87d4974bc434b27dcc
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Tue Apr 3 16:09:46 2012 -0700

    Invalidate cache before first jump
    
    Some CPUs (Sandybridge) seem to require this, and it does not hurt
    on other CPUs.
    
    Change-Id: I4fdb281b2b684ab5fea999aae28ca08dce24da4d
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
    Reviewed-on: http://review.coreboot.org/869
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>
    Tested-by: build bot (Jenkins)

diff --git a/src/cpu/x86/16bit/reset16.inc b/src/cpu/x86/16bit/reset16.inc
index 1be0e3a..8dba3c8 100644
--- a/src/cpu/x86/16bit/reset16.inc
+++ b/src/cpu/x86/16bit/reset16.inc
@@ -2,6 +2,7 @@
 	.code16
 .globl	reset_vector
 reset_vector:
+	wbinvd
 	.byte  0xe9
 	.int   _start - ( . + 2 )
 	/* Note: The above jump is hand coded to work around bugs in binutils.

commit d6e4d518b1dbfdcfbea7b56113530900ba3e03b1
Author: Marc Jones <marc.jones at se-eng.com>
Date:   Thu Apr 19 23:44:54 2012 -0600

    Revert wbind added to the reset_vector
    
    This change reverts :
    Change Id I4fdb281b2b684ab5fea999aae28ca08dce24da4d
    
    The wbinvd (or invd) should not be needed at the reset vector. It
    causes problems with some CPUs AP init. If there is a problem with
    a specific CPU and it must be done at this location, it should be
    added conditionally.
    
    Change-Id: I85b71b0a07f039359a4fb889aaa05c75fff619be
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    Reviewed-on: http://review.coreboot.org/908
    Tested-by: build bot (Jenkins)
    Reviewed-by: Peter Stuge <peter at stuge.se>

diff --git a/src/cpu/x86/16bit/reset16.inc b/src/cpu/x86/16bit/reset16.inc
index 8dba3c8..1be0e3a 100644
--- a/src/cpu/x86/16bit/reset16.inc
+++ b/src/cpu/x86/16bit/reset16.inc
@@ -2,7 +2,6 @@
 	.code16
 .globl	reset_vector
 reset_vector:
-	wbinvd
 	.byte  0xe9
 	.int   _start - ( . + 2 )
 	/* Note: The above jump is hand coded to work around bugs in binutils.
$