[coreboot] Ram Init: Intel i945: Timing parameters

Mohit Gupta mguptamel at yahoo.com
Fri Feb 14 00:58:03 CET 2014



Thanks Vald … not possible to break intel safe .. wondering how coreboot team was able
to write i945 ram init? 
 
Regards
Mohit Gupta



On Friday, 14 February 2014 10:39 AM, Vladimir 'φ-coder/phcoder' Serbinenko <phcoder at gmail.com> wrote:
 
On 14.02.2014 00:03, Mohit Gupta wrote:
>> I am having trouble understanding i945 ram init code especially timing
>> parameters. Can some explain me in layman language? When I go through
>> DDR2 specification, timing related text is too complex and confusing.
>> Interested in getting very simple explanation.
>> 
>There isn't any. RAM init is difficult.
>> Also, i945 ram init code is doing lot of settings in MCH. Is there any
>> step by step documentation available?
>> 
>Sure:
>1) Locate intel offices
>2) Locate their top-secret safes
>3) Observe security
>4) Buy military gear
>5) Recruit and train a company (~200 people) for a year
>6) Launch assault on the office
>7) Break into the safe
>8) Get out of Intel building
>9) Read the documentation
>
>
>> Regards
>> Mohit Gupta
>> 
>> 
>
>
>
>
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