[coreboot] BayleyBay FSP booting

Sean McNeil seanmcneil3 at gmail.com
Fri Jul 11 03:29:43 CEST 2014


This is because you do not have a correct Intel Firmware Descriptor 
(IFD). You may run into additional problems at a later time and you most 
assuredly do not have any protection against changing flash content by 
the CPU.

On 07/11/2014 08:25 AM, Tuan Vu wrote:
> Hi guys, thanks for responding.  I actually got it to boot DOS now, it was a mismatch device id for the northbridge.  Once I change it to match the device, it got through fine.  The GFX device id was also wrong so once I change that, video started working too.
>
> Curiously, Intel's document states that the northbridge device id is 0x0F00 and the GFX is 0x0F31, but on my board it's 0x0000 and 0x0031.  Wonder if it's a microcode mistake, any ideas?  I have 2 boards to test with and apparently they both have this issue.
>
> Thanks,
>
> Tuan
> ________________________________________
> From: adurbin at google.com [adurbin at google.com] on behalf of Aaron Durbin [adurbin at chromium.org]
> Sent: Thursday, July 10, 2014 4:15 PM
> To: Tuan Vu
> Cc: coreboot at coreboot.org
> Subject: Re: [coreboot] BayleyBay FSP booting
>
> On Tue, Jul 1, 2014 at 10:55 AM, Tuan Vu <tuan.vu at insyde.com> wrote:
>> I’m trying to investigate Coreboot and FSP booting performance on the
>> Intel’s Bayley Bay board and having trouble getting it to boot SeaBIOS.  I
>> had to modify some files to get it to the point of attempting to load the
>> payload but it gets stuck here:
>>
>>
>>
>> Could not find a bounce buffer...
>>
>> Could not load payload
>>
>>
>>
>> Additional printfk reveals that none of the memory ranges described in
>> bootmem has the tag LB_MEM_RAM; they all have the LB_MEM_RESERVED,
>> LB_MEM_TABLE and LB_MEM_UNUSABLE.  Any ideas what went wrong here?
>> Typically, what creates the memory ranges?
>>
> Could you provide all the logs?
>
> In src/soc/intel/fsp_baytrail/northcluster.c there is a function
> nc_read_resources() which should add the appropriate resources. See if
> that is being called. If not, maybe another PCI device id needs to be
> added to that file to match on the appropriate driver.
>>
>> Thanks,
>>
>>
>>
>> Tuan Vu
>>
>>
>>
>> Software Engineer
>>
>> Insyde Software, Inc.
>>
>>
>>
>>
>> --
>> coreboot mailing list: coreboot at coreboot.org
>> http://www.coreboot.org/mailman/listinfo/coreboot




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