[coreboot] Intel FSP on Bayley Bay CRB: No output
ron minnich
rminnich at gmail.com
Wed Jun 4 21:14:50 CEST 2014
On Wed, Jun 4, 2014 at 11:59 AM, WANG FEI <wangfei.jimei at gmail.com> wrote:
> I thought microcode files are kind of patches for CPU, it suppose to be
> loaded before MRC just in case it fixes any issues related with CPU. I
> actually did encounter an system random halt issue related with no loading
> microcode before MRC training.
>
>
>
Yes, running modern x86 CPUs without microcode updates is really asking for
trouble.
ron
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20140604/1dc32e3b/attachment.html>
More information about the coreboot
mailing list