[coreboot] What purpose this IC(eeprom)?

Aaron Durbin adurbin at google.com
Fri Jun 3 23:10:43 CEST 2016


On Fri, Jun 3, 2016 at 10:35 AM, ron minnich <rminnich at gmail.com> wrote:

> Given its name (SPD) it sure seems like SPD.
>
> As to your not being able to address it, a lot of times this can happen if
> there is an SMBUS mux on the board and it's not set up on POR so you can
> see that device.
>

It's likely at address 0x50. There's always the 7-bit vs 8-bit designation
that confuses people.

>
> ron
>
> On Thu, Jun 2, 2016 at 6:53 PM 김유석 <poplinux0 at gmail.com> wrote:
>
>> Dear Sir.
>>
>> MY EVB is ADI SG-2440.
>>
>> I was found some eeprom on my evb.
>>
>>
>> This eeprom(CAT24C0EYI-GT3) is store the config of SDRAM. *I gu**ess.*
>>
>> So, I was search ADDR 0xA0 and procedure of config for sdram from
>> coreboot source tree.
>>
>> But can't found hands on ADDR 0xA0 and found the some structure for
>> config of sdram, but not used this strcture.
>>
>>
>> Could you explain to me that "*Role of this eeprom*".
>>
>> Thank you.
>>
>>
>>
>>
>>
>> --
>> coreboot mailing list: coreboot at coreboot.org
>> https://www.coreboot.org/mailman/listinfo/coreboot
>
>
> --
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>
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