[coreboot] Skylake FSP 1.1 without verstage?

[Trammell Hudson]

On Skylake with no verstage and FSP 1.1 there is no car_stage_entry
function, only a weak symbol with an infinite loop in
src/arch/x86/assembly_entry.S, and as a result coreboot hangs after
jumping into the romstage.

There is one defined in src/soc/intel/skylake/romstage/car_stage.S,
but this is only linked if FSP 2.0 is used.  The Chell chromebook
appears to use FSP 1.1, so I don't have the FSP-S and FSP-M binaries.

Does the car stage code exist somewhere else in the tree?

-- 
Trammell