[coreboot] southbridge/intel/i82801gx/i82801gx.h
Riko Ho
antonius.riko at gmail.com
Sat Oct 15 15:44:45 CEST 2016
So I must do rm .config and make menu config then don't select :
CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM , where is that option, may be I did, I forget already...
Can you read it from .config ?
Anyway, what's the safe mode / default for make menuconfig ? What's the payload option should I make ?
On 15/10/2016 9:12 PM, Nico Huber wrote
> On 15.10.2016 14:57, Antonius Riko wrote:
>> I did rm .config and did make again :
>>
>> bianchi at ubuntu:~/coreboot$ make clean
>> bianchi at ubuntu:~/coreboot$ make
>> #
>> # configuration written to /home/bianchi/coreboot/.config
>> #
>> HOSTCC util/sconfig/lex.yy.o
>> HOSTCC util/sconfig/sconfig.tab.o
>> HOSTCC util/sconfig/main.o
>> HOSTCC util/sconfig/sconfig (link)
>> SCONFIG mainboard/intel/i946gz/devicetree.cb
>> HOSTCC nvramtool/cli/nvramtool.o
>> HOSTCC nvramtool/cli/opts.o
>> HOSTCC nvramtool/cmos_lowlevel.o
>> HOSTCC nvramtool/cmos_ops.o
>> HOSTCC nvramtool/common.o
>> HOSTCC nvramtool/compute_ip_checksum.o
>> HOSTCC nvramtool/hexdump.o
>> HOSTCC nvramtool/input_file.o
>> HOSTCC nvramtool/layout.o
>> HOSTCC nvramtool/accessors/layout-common.o
>> HOSTCC nvramtool/accessors/layout-text.o
>> HOSTCC nvramtool/accessors/layout-bin.o
>> HOSTCC nvramtool/lbtable.o
>> HOSTCC nvramtool/reg_expr.o
>> HOSTCC nvramtool/cbfs.o
>> HOSTCC nvramtool/accessors/cmos-mem.o
>> HOSTCC nvramtool/nvramtool (link)
>> OPTION option_table.h
>> CC bootblock/mainboard/intel/i946gz/static.o
>> CC bootblock/arch/x86/boot.o
>> GEN generated/bootblock.ld
>> CP bootblock/arch/x86/bootblock.ld
>> HOSTCC util/romcc/romcc (this may take a while)
>> ROMCC generated/bootblock.inc
>> CC bootblock/arch/x86/bootblock_romcc.o
>> CC bootblock/arch/x86/cpu_common.o
>> GEN build.h
>> CC bootblock/arch/x86/id.o
>> CC bootblock/arch/x86/memcpy.o
>> CC bootblock/arch/x86/memset.o
>> CC bootblock/arch/x86/mmap_boot.o
>> CC bootblock/arch/x86/timestamp.o
>> CC bootblock/arch/x86/walkcbfs.o
>> CC bootblock/commonlib/cbfs.o
>> CC bootblock/commonlib/lz4_wrapper.o
>> CC bootblock/commonlib/mem_pool.o
>> CC bootblock/commonlib/region.o
>> CC bootblock/console/die.o
>> CC bootblock/console/post.o
>> CC bootblock/cpu/x86/lapic/boot_cpu.o
>> CC bootblock/cpu/x86/mtrr/earlymtrr.o
>> CC bootblock/device/device_simple.o
>> CC bootblock/device/i2c.o
>> CC bootblock/drivers/uart/uart8250io.o
>> CC bootblock/drivers/uart/util.o
>> CC bootblock/lib/boot_device.o
>> CC bootblock/lib/bootmode.o
>> HOSTCC cbfstool/fmaptool.o
>> HOSTCC cbfstool/cbfs_sections.o
>> HOSTCC cbfstool/fmap_from_fmd.o
>> HOSTCC cbfstool/fmd.o
>> HOSTCC cbfstool/fmd_parser.o
>> HOSTCC cbfstool/fmd_scanner.o
>> HOSTCC cbfstool/fmap.o
>> HOSTCC cbfstool/kv_pair.o
>> HOSTCC cbfstool/valstr.o
>> HOSTCC cbfstool/fmaptool (link)
>> FMAP build/util/cbfstool/fmaptool -h build/fmap_config.h
>> build/fmap.fmd build/fmap.fmap
>> SUCCESS: Wrote 182 bytes to file 'build/fmap.fmap' (and generated header)
>> The sections containing CBFSes are: COREBOOT
>> CC bootblock/lib/cbfs.o
>> CC bootblock/lib/cbmem_console.o
>> CC bootblock/lib/delay.o
>> CC bootblock/lib/fmap.o
>> CC bootblock/lib/gcc.o
>> CC bootblock/lib/halt.o
>> CC bootblock/lib/hexdump.o
>> CC bootblock/lib/libgcc.o
>> CC bootblock/lib/memchr.o
>> CC bootblock/lib/memcmp.o
>> CC bootblock/lib/prog_loaders.o
>> CC bootblock/lib/prog_ops.o
>> CC bootblock/lib/timestamp.o
>> CC bootblock/lib/version.o
>> CC bootblock/vboot/bootmode.o
>> LINK cbfs/fallback/bootblock.debug
>> OBJCOPY cbfs/fallback/bootblock.elf
>> OBJCOPY bootblock.raw.bin
>> CC romstage/mainboard/intel/i946gz/static.o
>> CC romstage/arch/x86/acpi_s3.o
>> GEN generated/assembly.inc
>> CC romstage/arch/x86/assembly_entry.o
>> CC romstage/arch/x86/boot.o
>> CC romstage/arch/x86/cbfs_and_run.o
>> CC romstage/arch/x86/cbmem.o
>> CC romstage/arch/x86/cpu_common.o
>> CC romstage/arch/x86/memcpy.o
>> CP romstage/arch/x86/memlayout.ld
>> CC romstage/arch/x86/memmove.o
>> CC romstage/arch/x86/memset.o
>> CC romstage/arch/x86/mmap_boot.o
>> CC romstage/arch/x86/postcar_loader.o
>> CC romstage/arch/x86/timestamp.o
>> CC romstage/commonlib/cbfs.o
>> CC romstage/commonlib/lz4_wrapper.o
>> CC romstage/commonlib/mem_pool.o
>> CC romstage/commonlib/region.o
>> CC romstage/console/console.o
>> CC romstage/console/die.o
>> CC romstage/console/init.o
>> CC romstage/console/post.o
>> CC romstage/console/printk.o
>> CC romstage/console/vtxprintf.o
>> CC romstage/cpu/intel/car/romstage.o
>> CC romstage/cpu/intel/microcode/microcode.o
>> CC romstage/cpu/x86/car.o
>> CC romstage/cpu/x86/lapic/apic_timer.o
>> CC romstage/cpu/x86/lapic/boot_cpu.o
>> CC romstage/cpu/x86/mtrr/earlymtrr.o
>> CC romstage/device/device_simple.o
>> CC romstage/device/i2c.o
>> CC romstage/device/pci_early.o
>> CC romstage/drivers/pc80/rtc/mc146818rtc.o
>> CC romstage/drivers/pc80/rtc/mc146818rtc_early.o
>> CC romstage/drivers/uart/uart8250io.o
>> CC romstage/drivers/uart/util.o
>> CC romstage/lib/boot_device.o
>> CC romstage/lib/bootmode.o
>> CC romstage/lib/cbfs.o
>> CC romstage/lib/cbmem_common.o
>> CC romstage/lib/cbmem_console.o
>> CC romstage/lib/compute_ip_checksum.o
>> CC romstage/lib/delay.o
>> CC romstage/lib/ext_stage_cache.o
>> CC romstage/lib/fmap.o
>> CC romstage/lib/gcc.o
>> CC romstage/lib/halt.o
>> CC romstage/lib/hexdump.o
>> CC romstage/lib/imd.o
>> CC romstage/lib/imd_cbmem.o
>> CC romstage/lib/libgcc.o
>> CC romstage/lib/lzma.o
>> CC romstage/lib/lzmadecode.o
>> CC romstage/lib/memchr.o
>> CC romstage/lib/memcmp.o
>> CC romstage/lib/memrange.o
>> CC romstage/lib/prog_loaders.o
>> CC romstage/lib/prog_ops.o
>> CP romstage/lib/program.ld
>> CC romstage/lib/ramtest.o
>> CC romstage/lib/rmodule.o
>> CC romstage/lib/romstage_stack.o
>> CC romstage/lib/stack.o
>> CC romstage/lib/timestamp.o
>> CC romstage/lib/version.o
>> CC romstage/mainboard/intel/i946gz/romstage.o
>> CC romstage/northbridge/intel/i945/debug.o
>> CC romstage/northbridge/intel/i945/early_init.o
>> CC romstage/northbridge/intel/i945/errata.o
>> CC romstage/northbridge/intel/i945/ram_calc.o
>> CC romstage/northbridge/intel/i945/raminit.o
>> CC romstage/southbridge/intel/i82801gx/early_lpc.o
>> CC romstage/southbridge/intel/i82801gx/early_smbus.o
>> CC romstage/superio/ite/common/early_serial.o
>> CC romstage/superio/ite/it8718f/early_serial.o
>> CC romstage/vboot/bootmode.o
>> LINK cbfs/fallback/romstage.debug
>> build/romstage/lib/ext_stage_cache.o: In function `stage_cache_recover':
>> /home/bianchi/coreboot/src/lib/ext_stage_cache.c:55: undefined reference to
>> `stage_cache_external_region'
>> build/romstage/lib/ext_stage_cache.o: In function
>> `stage_cache_create_empty':
>> /home/bianchi/coreboot/src/lib/ext_stage_cache.c:39: undefined reference to
>> `stage_cache_external_region'
>> src/arch/x86/Makefile.inc:264: recipe for target
>> 'build/cbfs/fallback/romstage.debug' failed
>> make: *** [build/cbfs/fallback/romstage.debug] Error 1
>> bianchi at ubuntu:~/coreboot$
>>
>>
>> What do I miss here ?
> Did you by any chance select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM in
> your config? It doesn't make any sense for the i945 code and I wonder
> why this is a user visible option (some people here just keep adding
> options that only make sense for their platforms and confuse people).
>
> When you do the configuration (e.g. with `make menuconfig`) only select
> the correct mainboard (and maybe payload options) and keep everything
> else to the default. There are many fancy options where non-default
> values don't make any sense at all.
>
> Nico
>
>
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