[coreboot] lspci -xxx -s 0:1F.0 ?
Riko Ho
antonius.riko at gmail.com
Mon Oct 31 01:00:14 CET 2016
Idwer, thanks for the info,
How come it's different with:
80 81 82 83
80: 10 00*07 34 *01 08 3c 00 91 02 1c 00 00 00 00 00
change this to pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x*3407*);
It's reversing backward,
On 31/10/2016 7:35 AM, Idwer Vollering wrote:
> 2016-10-31 0:18 GMT+01:00 Riko Ho <antonius.riko at gmail.com>:
>> Hi Idwer,
>> 80 81 82 83 84
>> 80: 10 00 07 34*01 08 3c 00* 91 02 1c 00 00 00 00 00
> 0x84 starts here: ^^
it's going forward, which way is the right one ? I'll have a read
of that link may be 32bits and 16bits causing it...? I misunderstand it
I reckon...
>
>> isn't it :
>>
>> pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x00073401);
>> ?
> The byte ordering has to do with endianness, see this webpage:
> https://docs.oracle.com/cd/E26505_01/html/E27000/hwovr-66.html
>
>> (correct me if I'm wrong)
>> change this to pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84,*0x003c0801*);
>>
>>
>>
>> --
>> /*===
>> Kind regards,
>> Riko Ho
>> ===*/
--
*/*===
Kind regards,
Riko Ho
===*/ *
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