[flashrom] AMIC A25L40P{B,U}

[Daniel Lenski]

Hi Rudolf,

On Mon, 2010-07-12 at 20:37 +0200, Rudolf Marek wrote:
> Hi,
> 
> I checked with those two PT and PU chips A25L40. I think they still report with
> your patch as same chip:
> 
> With PT chip:
> 
> robing for AMIC A25L05PT, 64 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L05PU, 64 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L10PT, 128 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L10PU, 128 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L20PT, 256 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L20PU, 256 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L40PT, 512 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L40PU, 512 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Chip status register is 00
> Chip status register: Status Register Write Disable (SRWD) is not set
> Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
> Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
> Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
> Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
> Chip status register: Write Enable Latch (WEL) is not set
> Chip status register: Write In Progress (WIP/BUSY) is not set
> Found chip "AMIC A25L40PU" (512 KB, SPI) at physical address 0xfff80000.
> Probing for AMIC A25L80P, 1024 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> 
> 
> with PU chip:
> 
> Probing for AMIC A25L05PT, 64 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L05PU, 64 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L10PT, 128 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L10PU, 128 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L20PT, 256 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L20PU, 256 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L40PT, 512 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A25L40PU, 512 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Chip status register is 00
> Chip status register: Status Register Write Disable (SRWD) is not set
> Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
> Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
> Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
> Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
> Chip status register: Write Enable Latch (WEL) is not set
> Chip status register: Write In Progress (WIP/BUSY) is not set
> Found chip "AMIC A25L40PU" (512 KB, SPI) at physical address 0xfff80000.
> Probing for AMIC A25L80P, 1024 KB: probe_spi_rdid_generic: id1 0x7f37, id2 0x2013
> Probing for AMIC A29002B, 256 KB: skipped.

Very interesting... so they really do both report the same model_ID of
0x2013.

What happens if you try to selectively write or erase only the bottom 4
KB of each chip?
      * If it works on the PU chip (bottom boot block) but fails on the
        PT chip (top boot block), then it looks like their erase block
        granularity is accurately described by the data sheet, although
        there's no way to distinguish them by RDID.
      * If it /works/ on both, then that suggests that the 40PT chip is
        in fact /identical/ to the 40PU chip.

> Check attachment for full log. I had to delete AMIC A25L16 because it had some
> typo...

Sorry about that.  Due to a mailer crash and my noob confusion, I ended
up sending two patches, one of which was functional, and one of which
was not.  The correct, complete patch is attached to this message, but
it should not be applied yet if the 40PU and 40PT chips really do turn
out to be distinct parts with the same RDID.

Dan
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