//----------------------------------------------------------------------------
// PSP FW Delivery Release Note
//
// Copyright 2020-23, Advanced Micro Devices, Inc.
//----------------------------------------------------------------------------

Content:
    PSP FW Deliverables for Renoir.
    This Build is compiled using the ARM license from the AMD license server.

Files
 boot_loader_prod__CZN.sbin         [version: 0.11.11.75] - PSP off-chip Stage 2 BootLoader (entry type 0x73), signed with production key
 boot_loader_stage1_prod_CZN.sbin   [version: 0.11.11.75] - PSP off-chip Stage 1 BootLoader (entry type 0x1), signed with production key
 debug_unlock_prod_CZN.sbin         [version: 0.11.11.75] - PSP secure unlock (entry type 0x13), signed with production key
 psp_os_prod_combined_CZN.sbin      [version: 0.11.11.75] - PSP secure OS (entry type 0x2), signed with production key
 drv_sys_prod_CZN.sbin              [version: 0.11.11.75] - PSP system driver (entry type 0x28), signed with production key
 dr_ftpm_prod_RN.csbin              [version: 3.76.0.5]   - PSP fTPM (entry type 0xC), compressed and signed with production key
 dr_drtm_prod_RN.csbin              [version: 4.11.00.2B] - PSP DRTM (entry type 0x47), compressed and signed with production key
 rsmu_sec_policy.rn_L0.sbin         [version: B.10.0.20]  - Security Gasket (entry type 0x24)
 rsmu_sec_policy.rn_L1.sbin         [version: B.10.1.20]  - Security Policy for tOS (entry type 0x45)
 spl_table_RN.sbin                  [version: 5.11.0.5C]  - Firmware Anti-rollback information file (entry type 0x55)
 spl_table_CZN.sbin                 [version: 5.11.1.63]  - Firmware Anti-rollback information file (entry type 0x55)


Release Version 0.11.11.75
-------------------------------------------------------
Date: Auguest 21, 2023

amd-tee2.0      at commit 5f1411d32dd8c3e4d3a6df220cf6eb6487de7877
amd-tee-api-lib at commit 9e1b49f16ff584d9abb56f1e050e0c71e43b07fc
tools           at commit de87a0b13d4ecf5b5fa3d366141233894c626b0f

Bootloader
----------
PLAT-137922:  [Chrome][MI][CVE-2023-20543] Security Fixes
PLAT-135996:  [Chrome][MI][CVE-2021-26312] Security Fixes
PLAT-85864:   [Chrome][MI][CVE-2021-26362] Security Fixes
PLAT-124482:  [Chrome][MI][CVE-2023-20518] Security Fixes
FWDEV-54219:  [Chrome][MI][CVE-2023-20572] Security Fixes

Trusted OS
----------
FWDEV-17672: [Chrome][MI][CVE-2023-20507] Security Fixes
FWDEV-54219: [Chrome][MI][CVE-2023-20572] Security Fixes


Release Version 0.11.10.75
-------------------------------------------------------
Date: October 24, 2022

amd-tee2.0      at commit d3905e1ccd71edbd7d4633b06108b8336efaef88
amd-tee-api-lib at commit 9a49413ff8a08cae3a5a8728a50daa2635644987
tools           at commit 5066544f4c7edd5b29c456ca1bfbd73b73f0b6c1

Bootloader
----------
PLAT-85863:  [Chrome][MI][CVE-2021-26387] Security Fixes
PLAT-118431: [Chrome][MI][CVE-2021-26387] Security Fixes

Trusted OS
----------
FWDEV-15354: [Chrome][MI][CVE-2022-23817] Security Fixes
FWDEV-11870: [Chrome][MI][CVE-2022-23817] Security Fixes
FWDEV-11870: [Chrome][MI][CVE-2022-23817] Security Fixes
FWDEV-11870: [Chrome][MI][CVE-2022-23817] Security Fixes
FWDEV-11870: [Chrome][MI][CVE-2022-23817] Security Fixes
FWDEV-5613:  [Chrome][MI][CVE-2021-26392] Security Fixes
FWDEV-5614:  [Chrome][MI][CVE-2021-26393] Security Fixes
FWDEV-5989:  [Chrome][MI][CVE-2022-23826] Security Fixes
FWDEV-5736:  [Chrome][MI][CVE-2022-23826] Security Fixes


Release Version 0.11.0F.75
-------------------------------------------------------
Trusted OS
----------
PLAT-114023: Introduce the GPIO0 bank SMN register offset
PLAT-115077: Remove check for the widevine ta in secure counter APIs
PLAT-114023: Repurpose the mailbox command to get DTPM info


Release Version 0.11.0E.75
-------------------------------------------------------
Trusted OS
----------
PLAT-111361: Relinquish control of locality before Request for Use
PLAT-111558: Avoid Possible race condition if I2c3RsmuFencing fails
PLAT-112056: Reduce the timeout for TPM get status
PLAT-112060: Add postcodes and STB traces in error paths
PLAT-112506: Fix I2CReadData issue when NACK from TPM
PLAT-112526: Poll on GPIO interrupt status for TPM ready

Release Version 0.11.0D.75
-------------------------------------------------------
Trusted OS
----------
PLAT-107404: Do not power ON-OFF I2C3 during DTPM Arbitration

Release Version 0.11.0C.75
-------------------------------------------------------
Trusted OS
----------
PLAT-106455: Correct I2C3 RSMU fence settings
PLAT-106756: Fix for I2C3 Bus Arbitration Issue
PLAT-106756: reduce the timeout inside tpm_wait_burststs to 1000ms

Release Version 0.11.0B.75
-------------------------------------------------------
Trusted OS
----------
PLAT-104872: Fix ACP-PSP Mailbox issue on S0i3 resume
PLAT-106102: Port80 logging while I2C3 bus is acquired or released

Release Version 0.11.0A.75
-------------------------------------------------------
Trusted OS
----------
PLAT-104403:[Chrome]: Enable Sram access for Widevine

Release Version 0.11.09.75
-------------------------------------------------------
Bootloader
----------
PLAT-85878:[Chrome]: espi base address should be checked before use

Trusted OS
----------
PLAT-102568:[Chrome]: Handle ACP f/w qualification via ACP-PSP mailbox

Release Version 0.11.08.75
-------------------------------------------------------
Trusted OS
----------
PLAT-99113:[Chrome]: Bug fix for random timeout in I2CWriteData

Release Version 0.11.07.75
-------------------------------------------------------
Bootloader
----------
PLAT-100646:[Chrome]: Boot to unsigned verstage mode when spl table not found
PLAT-98146: [Chrome]: On chromebook enforce SPL only when boot from RW
PLAT-98146: [Chrome]: Restructure function detecting chromebook boot partition

Release Version 0.11.06.75
-------------------------------------------------------
Bootloader
----------
PLAT-98838:  [Chrome]: Don't allow set boot mode for unsigned verstage
PLAT-100656: [Chrome]: Add test case to access UART 0
PLAT-100656: [Chrome]: Add UART 0/1 device to SVC_MAP_FCH_IO_DEVICE
PLAT-99929:  [Chrome]: Add test case to port80 postcode write
PLAT-99929:  [Chrome]: Add svc support to write post code to port 80

Release Version 0.11.05.75
-------------------------------------------------------
Bootloader
----------
PLAT-99944: [Chrome]: Stage2 rename the g_chrome_mode variable
PLAT-99944: [Chrome]: Port chrome_set_mode in Stage2
PLAT-99944: [Chrome]: Stage1 prevent clear_lsb_slot if already done
PLAT-99944: [Chrome]: Enter to developer mode on rollback

Trusted OS
----------
PLAT-100146: Control I2C enable/disable before sending command

Release Version 0.11.04.75
-------------------------------------------------------
PLAT-98300:[Chrome]: Skip copy of workbuf to dram when 6B entry not found
PLAT-98838:[Chrome]: Set Chrome Bootmode provided by the verstage
PLAT-98838:[Chrome]: Align value of Chrome Bootmodes with verstage
PLAT-98838:[Chrome]: Rename the Chromebook Boot Mode
Trusted OS
----------
PLAT-85059:[Chrome]: Optimizing the I2C3 powering sequence
PLAT-98838:[Chrome]: Drv Sys implementation to get chrome Bootmode
PLAT-85059:[Chrome]: Optimizing the I2CReadData workaround to 250us

Release Version 0.11.03.75
-------------------------------------------------------
Bootloader
----------
PLAT-98934:[Chrome]: Add SVC call to get bootmode from verstage

Trusted OS
----------
PLAT-85066:[Chrome]: On chromebook add ASD,WV,HDCP uuids as mandatory
PLAT-96340:[Chrome]: Add I2C fencing during PSP access of I2C3 bus
PLAT-85059:[Chrome]: Change the defined widevine TA Unique ID

Release Version 0.11.02.75
-------------------------------------------------------
Bootloader
----------
PLAT-95774:[Chrome]: Add softfuse bit to control load of verstage in S0i3

Trusted OS
----------
PLAT-85059: Implement the TPM commands for secure counter
PLAT-85059: Implementation of Secure Counter in drv sys
PLAT-97400:[Chrome]: Add support for power management of I2C3 bus
PLAT-97691: Correct the BIOS mbox command ID for I2C arbitration
PLAT-97400:[Chrome]: Power ON or OFF I2C3 Bus during arbitration
PLAT-85059:[Chrome]: Optimizing the I2CReadData workaround

Release Version 0.11.01.75
-------------------------------------------------------
Bootloader
----------------
PLAT-95780:[Chrome]: Add svc call to get the fw hash table
PLAT-83301:[Chrome]: Rebase to amd-staging till 00.11.00.75
Trusted OS
----------------
PLAT-83301:[Chrome]: Rebase to amd-staging till 00.11.00.75
PLAT-92745:[Chrome]: Add BIOS-PSP command for DTPM I2C Bus req

Release Version 0.11.0.75
-----------------------------------
** This version is fixing version number only

Bootloader
----------------
N/A

Trusted OS
----------------

fTPM
-----
N/A

DRTM
-----
N/A

Release Version 0.11.0.74
-----------------------------------
Bootloader
----------------
PLAT-92329: Revert the stack protection change in the stage1 bootloader
PLAT-91331: Remove internal urls and names from the code
PLAT-92243: Fix possible underflow in load_binary
PLAT-92242: Fix possible overflow in VerifyBiosRTM

Trusted OS
----------------
SWDEV-284518 Fix rate-limiting mailbox double-counts.
FWDEV-5215: Fuse Burn sequence in PSP code is not matching SMU HW
PLAT-92364: [RAv3] Avoid deadlock situation with PMFW
FWDEV-5233: Fix DF_PIE_AON/DF_CS_UMC to use the _alt_2 register address.
FWDEV-5100: [PHX] Update system instance ID for DF Components
PLAT-91589: Add check to verify if MPM FW versions match
FWDEV-4990:[PHX] Add support to Restoring ISP security policies
FWDEV-5151:[PHX] Grant MPIPU read access to IPU FW TMR region
FWDEV-4989: Apply IPU's RSMUs security policies
FWDEV-4605: Remove dep from lp_control
PLAT-69017: Kernel-to-SMM-mode privilege escalation via racy SMM check
FWDEV-4721:Fix the build failure caused by AMD-TEE_API_LIB Patch (2)
SWDEV-283282: [NV31] Implement the Trusted SPI Update main sequence in PSP TOS
FWDEV-4721:Fix the build failure caused by AMD-TEE_API_LIB Patch
PLAT-85849: Privilege Check in SVC_UNMAP_PAGES
FWDEV-4862: PSP read HSP buffer after SUSPEND cmd
FWDEV-2558: Validate system physical addresses are in DRAM map
PLAT-92160: Add PROM A320 support for RN
PLAT-91933 Fix PSP reporting TMR size requirement as 0.
PLAT-90967: Add DMCUB message for APERTURE_B
PLAT-92389: MPM WLAN access in x86 not release mode
PLAT-90535: [RAv3]Send PSPSMC_MSG_ReadRom2Rom3BaseAddr only on RA2 Enforce
DEPHXE-238: [PHX] Fix load vector location in RLC TOC
SWDEV-283282: [NV31] Implement the Trusted SPI Update main sequence in PSP TOS
FWDEV-5055: Fix TOCTOU issue on TeeProcessRingCmd
PLAT-91331: Remove internal urls and names from the code
FWDEV-5056: L1_MapPageTable may be called twice in RunScheduler
FWDEV-4997: [PHX] Reload GFX IMU after receiving doorbell interrupt after LP exits
PLAT-89963 Prevent intermittent PSP hang on HDP Flush
FWDEV-4685:[Navi31]Disable PreSetIpFw function call for RLC-V
FWDEV-5049: Adjust kernel scatter file in amd-tee2.0
FWDEV-4985 [MDN] Update Fabric ID of MMHUB for mendocino
FEAT-38663[Navi21] Remove fw att file and replace with fw manifest.
FWDEV-4573: Fix for BIOS PT21 Loading CMD
RTGPLAT-7179: [PSP TOS] fix RAP_VALIDATE_ROLLBACK_L0 mismatch
FEAT-37454: [NV31 BL] -copy scpm status to Secure mp1 general dram map region.

fTPM
-----
N/A

DRTM
-----
N/A

Release Version 0.11.0.73
-----------------------------------
** AMD FIPS certification is pending
*FTPM updated to version 3.76.0.5 / 3.76.2.5 (for BRC)

Bootloader
----------------
PLAT-92079: Fix stack protector initialization
PLAT-85835: Use Stack Protector to defense against stackbased buffer overflow attacks.
PLAT-85820: Validate SizeFWSigned in Image Header before use
PLAT-90934: SHUBCLK does not enter deep sleep
PLAT-90969: Disable BootRom access after stage 1 is done

Trusted OS
----------------
DEPHXE-275:[PHX] Release IPU RSMU Hard Resets before accessing CRU
PLAT-88066:[RAv3] Add Error Handlings when Disable MMIO Trap
FWDEV-4840: Consolidate RAPv2 DF & FCH policy
PLAT-89413: Support ROM Armor v2 in Project X
DEPHXE-258: [PHX] Fixed TMR issue while loading GFX IMU IRAM FW
PLAT-69017: Kernel-to-SMM-mode privilege escalation via racy SMM check
PLAT-87120: Enhance exception sequence to handle syncflood errors
FEAT-37545: [PSP TOS] fix error in merging RAP GC_TMR
FWDEV-4605: Update LP_CONTROL fuse in tOS
PLAT-91528: [RAv3] Refactoring of ROM-Armor related code
DEPHXE-261: [PHX] Enable RlcAutoLoad for GFX11 FWs
FWDEV-4697: Update Intf for Dmcu timeout smart trace
FEAT-38663: Rebranding fw attestation to fw manifest (2)
DEPHXE-250:[PHX] Fix SPACE AxUSER value for Frame Buffer Addresses
FEAT-38663:[NAVI21][SRIOV] Rebranding fw attestation to fw manifest for TOS
FWDEV-4828: Apply GC_VDDGFX_POLICY and GFX_DLDO_VDDGFX_POLICY
FWDEV-4697: Add both smart Trace buffer and FW_STATUS to track for DMCUB_PREPARE_TIMEOUT expiry
PLAT-90219: Allow DPG power-up after z9 exit V9 DPG SRAM restore
DEPHXE-243:[PHX] Set IpuEnable of MiscClientsEnable
Revert "DEPHXE-85: [PHX] Disable MP0 clock gating and mem deep sleep"
FWDEV-3806: Clean up the usage of SMN_ADDR_UNDEFINED (2)
FEAT-37545: [navi3x][PSP TOS] detect GFX PowerState
FWDEV-4056: [PSP_TOS] navi3x FW loading sequence
FEAT-37545: [PSP TOS] fix error in RAP validate GC_TMR

fTPM
-----
PLAT-89586 fTPM: Enable ARM V6 Compiler Support

DRTM
-----
N/A

Release Version 0.11.0.72
-----------------------------------
** AMD FIPS certification is pending
*FTPM updated to version 3.75.0.5 / 3.75.2.5 (for BRC)
*DRTM updated to version 4.11.0.2B

Bootloader
----------------
PLAT-85816: Sanitizing the parameters in Debug Print Syscalls
PLAT-90753: Move RPMC Macro Definitions to Shared file
PLAT-85861: Unmapping the Syshub map before Load_Run_DiagFw returns
PLAT-89539: Fix recovery reason reported for unified FW
PLAT-85860: Fixing unsafe assumptions in FWLeafTokenValidation
PLAT-88038: Avoid multiple calling of SVC_SET_PSP_RESERVED_ADDR
PLAT-88647: [RPMC] Fix RPMC Available Counter Addresses
PLAT-85868: Ensure malformed MP2 RAM1 region can't Violate Memory Safety
PLAT-85861: Unmapping the Syshub mapped address on Error Paths

Trusted OS
----------------
FWDEV-4718: [PHX] B.0.3.0a LSD change list alignment CL# 1500199
PLAT-90535:[RAv3] Add MSG Notify SMU to Read ROM2/3 Base Address
PLAT-90975: [PJX] Fix Security violation logging
FWDEV-2790:[PHX] Fix a bug on ISP TMR layout
FWDEV-4693:[PHX] Split CRU public registers structure
DEPHXE-201: Set 1 in SOC_GAP_PWROK before resetting IMU
FWDEV-4696: [PHX] Update RLC TOC size, load vector location and Firmware ID
FWDEV-4056: [PSP_TOS][TMR setup] Remove check for DrQuerySriovState()
FWDEV-4078:[Navi3x] Enable debug mode of IMU boot
FWDEV-4685:[Navi31]Disable PreSetIpFw function call for RLC-V
PLAT-90864: Add DMCUB mailbox commands for iUSB4
PLAT-89961: Disable CCP PG on WFI entry
PLAT-88557: ACP SHA DMA clears interrupt then acknowledge
FWDEV-4695:[PHX] Fix size of TMR region returned by Load TOC command
PLAT-69017: Kernel-to-SMM-mode privilege escalation via racy SMM check
FWDEV-4498:FWDEV-3831:[Navi3x] Update TOC and add support for CP MES_KIQ
FWDEV-4476: [Navi 33]: Migrate to LSD SOCCL - 5090167
PLAT-85816: Sanitizing the parameters in Debug Print Syscalls
FEAT-37545: [PSP TOS] RAP validate new features for navi31/navi33
FWDEV-4694:[PHX] Update IPU interface registers according to spec
PLAT-90753: Move RPMC Macro Definitions to Shared file
PLAT-85105:[RMB]DynamicBoost2.0 Feature Implementation
FWDEV-4599:[Navi3x] Disable SMU DF Cstate calls till PM FW is ready
FWDEV-4600:[Navi] The burst operation needs 256 byte aligned address
PLAT-89906: [RMB][Level3]Failed to enable FW protection with HSP+fTPM+RA enable mode.
FWDEV-4433: Remove HSP_S0I3_ENABLE flag
FWDEV-3245: Add PAD to RPL - tOS
FWDEV-3944: [RPL] RAS enable
PLAT-88285: [RMB] DeriveHmacKey once per boot.
DERPLE-342: WaitToSaveMpioSram is only required for S0i3.
FWDEV-4567 [MDN] Update MDN ASIC detection
PLAT-77943: [SP] [RAS] Support SMN/MP1 Fatal Error Handling
PLAT-77055: [SP]: Add support for TWIX error handling
FWDEV-4627: [RPL] Update CS-SEED-based KDF and Key Unwrapping
FWDEV-4056: [PSP_TOS] fix TMR size calculation for VCN_RAM
FWDEV-4056: [PSP_TOS][navi33] Enable seprarate VCN_RAM_TMR for navi33
FWDEV-328: Enable MP0CLK_DPM_UPDATE for RPL
PLAT-89221 RMB: Disable SMI triggering to x86 when FLAG_ID_DISABLE_SMM_ACCESS set.
FWDEV-4575: Add MFD Pre-Si key to API permissions
PLAT-85841: Prevent memory corruption in kernel syscalls
FEAT-37545: [PSP TOS] RAP apply new features for navi31/navi33
PLAT-89221 RMB: Disable SMI triggering to x86 when FLAG_ID_DISABLE_SMM_ACCESS set.
FEAT-37454: [NV31 BL] -copy scpm status to Secure mp1 general dram map region.
FWDEV-4109: [PSP TOS] fix core chiplet API
FWDEV-4451: Update for getting the size of gRsmuPresentId[]
PLAT-89160: [SP] Enable STB support
FWDEV-4109:[MI300] add core struct to TOS mailbox
FWDEV-3981: [PHX] Add IPU interface initialization to RsmuIntrptThread
FWDEV-2790: Fix the event order in ISP interface thread
FWDEV-3831:[Navi3x] Fix a typo error
SCSW-7672: Enable SMI and disable RAP loading in PJX
PLAT-87137: Clear RomArmorV2 enable flag when system enters S3
PLAT-85843: Validating the Param0 in SVC_MAP_MMHUB
FWDEV-4191: Update Current BIOS CMD
PLAT-85868: Ensure malformed MP2 RAM1 region can't Violate Memory Safety
PLAT-85837: Prevent out-of-bound read in SMI Mailbox CalulateCheckSum
PLAT-85844: Prevent Integer Overflow in SVC_ALLOC_PROCESS_SPACE
FWDEV-3981: [PHX] Fix IPU loading and Releasing code
FEAT-37454: [NV31 BL] -copy board config table along with pptable to Secure mp1 general dram map region.
PLAT-77943: [SP]: Enable RAS support
PLAT-86560: Move gRsmuPresentId to .c file
PLAT-84484: [RMB-B0] Updated CS-SEED-based KDF and Key Unwrapping
PLAT-87963: [SP]: Extend upper bits in SMM Mask value
FWDEV-2790: [PHX] Update C2P_MSG registers for the VTL1 interface
FWDEV-4346: Add PSPSMC_MSG_SaveZscState message to S3 Entry flow
PLAT-85831: Check for Integer Overflow when verifying TMR address
FEAT-38652: [PSP TOS] Add empty function for VCN0/VCN1 Power-On
FEAT-38655: [TOS]Configuration of system firmware features through SFFS(System Firmware Feature Enablement) binary
FEAT-38652: [navi3x][PSP TOS] (8) handle SMU to PSP message for VCN0/VCN1 Power-On
FWDEV-2790: [PHX] Disable FMR setup when RAP is disabled
FWDEV-3335:[NAVI31][RAS]Enable MSMU SRAM Data Parity Handling
SCSW-7672: Add support for Project X
FWDEV-3967 Update MDN RSMU config
DEPHXE-137: RAP subsection can have no register settings.
FWDEV-303: [RPL] Smart Trace Buffer
FWDEV-4050:[NAVI31][SRIOV] Enabled SRIOV flag and set supported VFs to 15
FWDEV-2790: [PHX] Add support to ISP in PHX

fTPM
-----
PLAT-86622: [RMB]Z-state Entry and Exit notification Handling in FTPM
PLAT-87770: [RV/Fremont]Support Hmac Validation  and Unwrapping with Legacy Key
PLAT-87251: [RMB]Fix a bug in debug code logging in MP0 C2PMSG8
PLAT-64173: [VGH]Fix a bug in computing total HSP NV data in HSP mode
PLAT-80506: [RMB]Wait for RPMC Inc to finish after SMC Inc when RA2 enabled

DRTM
-----
PLAT-88160: Remove build warning with ARM V6
PLAT-87437: Doxygen documentation for DRTM TA code
PLAT-89221: [RMB] Disable SMI triggering of PSP to x86 when Drtm commands are in progress
PLAT-89221: [RMB] Add DRTM commands DRTM_CMD_SMM_DISABLE and DRTM_CMD_SMM_ENABLE for PSP to x86 Smi trigger diable/enable

Release Version 0.11.0.71
-----------------------------------
** AMD FIPS certification is pending
*FTPM updated to version 3.73.0.5 / 3.73.2.5 (for BRC)
*DRTM updated to version 4.11.0.27

Bootloader
----------------
PLAT-85867: Validating pointer argument in SVC_ADD_ENTRY_MP2_RAM1
PLAT-86518, PLAT-86519: Do not clear KDR on unlock
PLAT-85847: Add a check for integer overflow in IS_OUTSIDE_SRAM
PLAT-85871: Validate L1 BIOS Directory Header before use
PLAT-85851: Adding validations in SVC_MAP_USER_STACK
PLAT-85870: Validate the argument in SVC_SET_DEBUG_UNLOCK_INFO
PLAT-85866: Memory Corruption In Debug Unlock Syscalls

Trusted OS
----------------
PLAT-77354: Add BIOS command to handle Intrusion detection config
PLAT-85826: Prevent TOCTOU when persisting Data to MP2 SRAM
PLAT-87161: [SP]: Revert security policy as part of secure debug unlock
FWDEV-3960:[RPL] Wait on MPIO save request on s3/s0i3 entry
PLAT-83902: [SP]: Enable TMR Support
FWDEV-4306: Increase PSP OS SRAM size
PLAT-79871: Verifying late PSB fusing
FEAT-37545: [PSP TOS] (5) Load RAP L1 to a separate DRAM space
FWDEV-4304: Invalidate TLBs while mapping process' L2 page table
FWDEV-4199: [RPL] Apply suspend RAP policy on S0i3 entry
SWDEV-295031: [NV31] Transition SDU protocol signatures to HMAC - TOS
PLAT-85828: Prevent TOCTOU when verifying Manageability OS
PLAT-87185: RMB increment SPL=1 for psp_os and drv_sys
SWDEV-272821: [NV31] Implement the ROM Image Parser in the PSP Sys Drv
RTGPLAT-7179: [PSP TOS] fix DEBUG_UNLOCK logic for RAP V1.0
PLAT-83460: [PSP_TOS] Support DEBUG_UNLOCK after NP RegUnroll
PLAT-85110: System hangs with 0x8052 on BOOT_DONE while S3 resume
PLAT-86519: [PSP TOS] Do not clear KDR and SSA bits oni DEBUG_UNLOCK
PLAT-88066:[RAv3] Reduce Wait Time for PSP2SMU Messages
FWDEV-3990: [PHX] LSD- change list alignment CL# 1476284
FEAT-37545: [PSP TOS] (4) On RAP VALIDATION, check GFX power_state
PLAT-70906: Add fw-sign support for AER
PLAT-70906: Add fw-sign support for RPL/RMB/PHX (2)
FEAT-37545: [PSP TOS] (3) write IMU register to consume GC_RAP_TMR
FWDEV-4200:[NAVI31][RAS]Enable SMN Slave Timeout, SMN Data Parity, MP1 ECC Error, Sync Flood error handling
PLAT-83538:[MI200]Add new command to respond MP1 query for allowing access for Diags
PLAT-87031: Remove MBOX_TOS_RECOVERY_MASK for validate binary in memory
PLAT-87352:[RAv3] Fix SMU MSG TimeOut Issue
PLAT-86622: Notify drivers of z-state entry/exit
FEAT-37545: [PSP TOS] (2) add GC_TMR to BL_TMR_INFO
FWDEV-2666: [PHX] Erase GFX IMU iRAM and dRAM contents when hash validation fails
PLAT-70906: Add fw-sign support for RPL/RMB/PHX
FWDEV-3581 Initial version of MDN code
FWDEV-318: [RPL] RAS Features - Twix
PLAT-87352:[RAv3] Enable MMIO Access with RomArmorV2
FWDEV-4104:[Navi31] Fix the IMU reset code
FWDEV-3819: Added PROM21 key for RPL
FWDEV-4068: [PHX] Save ZSC/DF/UMC MSMUs on S3
PLAT-85859: Prevent Out Of Bounds Write in SetLoadVectorAndCopyToc
FWDEV-4045: [Navi31] Migrate to LSD regspec
FWDEV-3831:[Navi3x] Add support for RS64 MES/KIQ and SDMA THx
PLAT-85839: [Chrome]: Return error for BIOS_CMD_START_KVM
PLAT-85862: Changing the ReqKeyUsage value passed to KeyDbFindKey
FWDEV-3981: [PHX] Add Inference Processing Unit (IPU) - PSP FW Support
PLAT-86518, PLAT-86519: Do not clear KDR on unlock
[FWDEV-2666] Add support for saving/restoring GFX IMU on S0i3 sequence
FWDEV-2768: Save S5 RAM contents to DRAM on s3/s0i3 entry
PLAT-85853: Avoid Double Fetch in BIOS_CMD_BOOT_SPI_ROM Handler
PLAT-85291: Return appropriate error codes in ACP Firmware Validation
SWDEV-295922: Locked in enums for DFC feature for other asics
FWDEV-3958: Add missing flags for RPL in tOS
SWDEV-292789:[Navi2x][SecAudit] Fix issue of buffer overflow in Load Module
SWDEV-293896: [Navi 33]: [Porting] [Fix] Correct the CRU structure as per PPR
PLAT-85854: Avoiding PanicFinal function to return
PLAT-86850 Correct DF register definitions
PLAT-85834: Prevent TOCTOU attack in BIOS_CMD_SET_RPMC_ADDRESS
PLAT-78078: [SP]: Update Axuser bits in the MapSyshub Address
PLAT-72423: Add implementation for dUSB4 DrvSys call
PLAT-86720 RMB: Enablement of RA1 under ENABLE_ROM_ARMOR_v1 flag
SWDEV-295031: [NV31] Transition SDU protocol signatures to HMAC - TOS
FWDEV-3925: Add HSP_ENABLE flag for RPL in TOS
PLAT-85897: [SP] Support AES-256 UMC keys
FWDEV-3824: [PHX] Move MSMU dRAM save to new 1 MB section in DRAM
PLAT-85856: Validating the size of parameter in SVC_TA_DRIVER_CALL
PLAT-85700: [SP]: Reserve unused Secure DRAM for S5
PLAT-86663: Increase system driver memory size
PLAT-85846: Check for integer overflow in SVC_SET_TMR
PLAT-83460 : [Navi24][PSP_TOS][NPM] add SmuGfxOn to Non-Prod RegUnroll
PLAT-83460 : [navi2x][PSP_TOS] On disallow GFXOFF from PSP, wait GFXOFF_EXIT
FWDEV-3806: Clean up the usage of SMN_ADDR_UNDEFINED
FEAT-37545 : [PSP_TOS][Navi3x] define asic_types: NV31, NV33
SWDEV-294010 MI200: Set mmUVD_POWER_STATUS_alt_1 for VCN1 on MMSCH FW load.
PLAT-84331 Add separate VCN RAM support for SRIOV.
FWDEV-3282: [PHX] LSC+ change list alignment CL# 1454132
PLAT-86295: [SP]: update the RSMU Timeout register address definitions
PLAT-86147: Update in SPI write for x86 not released case
DEPHXE-112: update mmDF_PSP_MISC_MODE address
SWDEV-291800:[Navi2x][SecAudit]Fix issue with signature address for multi-header case
PLAT-84331 Wrap SetNumOfVfs in SRIOV build flag.
PLAT-84331 Make setting VF Num return required TMR size to driver. Fix naming.
SWDEV-287185 Fix mailbox status and FW version reporting in vfgate.
RTGPLAT-7252 : [PSP TOS] fix RAP L1 mismatch failures
PLAT-84000: [TOS]Enable compiler errors on use of an uninitialized variable
FWDEV-2171: [PHX] Skip z-state MPIO FW restore if entry aborted
SWDEV-293709:[Navi31] Correct the CRU structure as per Navi31 PPR
SWDEV-293771: [Navi 33]: Update AxUser.space encoding on MMHUB AXI interface
FEAT-37454: [PSP BL] - only DGPU support Place SCPM Authorization result in Boot time TMR for KMD
SWDEV-262656: [Navi31] Update AxUser.space encoding on MMHUB AXI interface
FWDEV-2171: [PHX] Fix z9 exit MPIO restore hash check
PLAT-81894: PSB Disablement
FWDEV-3322:[RPL] Align to LSE CL
PLAT-85957: Removed Stress_Test Related Code
PLAT-85129: Added support to write postcode from MPM without 0xEF prefix
FWDEV-2171: [PHX] Restore MPIO on z9/z10 exit
SWDEV-292630: [Navi 33]: Add dummy fuse_defs.h for build fix
SWDEV-289828: [Navi 33]: Add Build support
SWDEV-289828: [Navi 33]: Add DGPU Family ID to drv_sys header
SWDEV-289828: [Navi 33]: Add header binary
SWDEV-289828: [Navi 33]: Add header files [SOCCL - 4935075]
PLAT-83652: Clear SMNCLOCK in S5_MISC_CTRL register
FEAT-37456: [PSP TOS] - Allow Soft PPTable front-door loading from KMD
FWDEV-1201: [PHX] SKINIT support for HSP-fTPM
LWPTEE30-104: Make apu-bl be able to build with amd-tee3.0
SWDEV-291600:[Navi31] Skip Encrypt/Decrypt operation on Simnow
SWDEV-287120:[Navi3x] Reserve GFX FW TYPE values for SDMA TH0/TH1
FWDEV-3271: Add function to write POSTCODE using full 32-bit value
PLAT-85222: Update USB4_0/1 SRAM address
FWDEV-3216: [RPL] Update fuses to align with B010
PLAT-59672[RMB][DRTM]: Update DRTM InitTPM for HSP-fTPM case
Revert "FWDEV-3153: [PHX] Remove dmcub TMR on non-secure"
PLAT-79838 : [PSP TOS] fix RSMU Violation Logging (legacy scheme)
PLAT-59672: HSP-fTPM Locality control support.
PLAT-85147: Apply unlock policy on whitelist case
PLAT-83477: Intrusion Detection
PLAT-84499:[RMB] memcpy to replace CCP as a temporary patch.
PLAT-84684: PSP Unlock failure on RMB FP7/FP7r2 with RA2 enabled
FWDEV-1523: [RPL] Enable default use of iKEK_TA in tOS
FWDEV-3211: Move s5 sram functions to s5sram.c
FWDEV-2993: Move S5RamHashInfo struct to shared_bl2os folder
PLAT-83995: Add SysDriver support for Widevine Device ID
FEAT-37454: [PSP BL] - load pptable from mp0 secure dram to mp1 secure dram.

fTPM
-----
PLAT-86622 RMB: Z-state Entry and Exit notification Handling in FTPM
PLAT-87770 RV: [Fremont ]Support Hmac Validation  and Unwrapping with Legacy Key
PLAT-87251 RMB: Fix a bug in debug code logging in MP0 C2PMSG8
PLAT-64173 VGH: Fix a bug in computing total HSP NV data in HSP mode
PLAT-80506 RMB: Wait for RPMC Inc to finish after SMC Inc when RA2 enabled

DRTM
-----
PLAT-78536: Migrate to DRTM build using connan
PLAT-74088: [RMB][HSP]SKINIT/uCode doorbell interface to support HSP-fTPM-based DRTM
PLAT-85240: TMR release change

Release Version 0.11.06.70
-----------------------------------
Bootloader
----------------
PLAT-92313: Increase MP0 clk to max at stage1 boot
Trusted OS
----------------
PLAT-82622: [Chrome]: Qualify unsigned ACP FW on chrome OPN

Release Version 0.11.05.70
-----------------------------------
Bootloader
----------------
PLAT-91331:[Chrome]: Remove internal urls and names from the code
PLAT-92119:[Chrome]: Use MP2 Ram1 to save verstage provided info
PLAT-92553:[Chrome]: Support cache clean of unaligned address
PLAT-92553:[Chrome]: Unaligned access test case for ccp dma
PLAT-92554:[Chrome]: Skip re-cofig of spi speed in stage 2 BL
PLAT-93361: WA fix in setting max memory clock
Trusted OS
----------------
PLAT-92119:[Chrome]: Introduce build flag BUILD_CHROME in TOS

Release Version 0.11.04.70
-----------------------------------
Bootloader
----------------
PLAT-85816:[Chrome]: Sanitizing the parameters in Debug Print Syscall
PLAT-90934: SHUBCLK does not enter deep sleep
PLAT-86412: Perform cache operations after remapping mmu for TOS.
FWDEV-2944: Enable cache for stage2 BL code and RO data
PLAT-91464:[Chrome]: Remove fuse support from stage 1 BL
PLAT-91464:[Chrome]: Pass vendor id info to stage 2 BL
PLAT-85820:[Chrome]: Validate SizeFWSigned in Image Header before use
PLAT-91464:[Chrome]: Perform vendor id fusing in stage 2 BL
PLAT-91464:[Chrome]: Coverity fix for chrome.c and kdf.c files

Release Version 0.11.03.70
-----------------------------------
Bootloader
----------------
PLAT-85819:[Chrome]: Validate the SPI flash Address
PLAT-89496:[Chrome]: Load and execute psp verstage in S3 resume
PLAT-89950:[Chrome]: cache clean invalidate during ccp passthrough
PLAT-85861:[Chrome]: Unmapping the Syshub mapped address on Error Paths
PLAT-85848:[Chrome]: Validate the psp & bios directory Address
PLAT-90311:[Chrome]: Pass Axi address in unmap_smn of ccp dma svc
PLAT-90074: Add smart trace support to BL
PLAT-90311:[Chrome]: Handle error if map or unmap of smn fails
PLAT-90072: Increase MP0 clock frequency after MP1 f/w load

Release Version 0.11.02.70
-----------------------------------
Bootloader
----------------
PLAT-85756:[Chrome]: Do not load Verstage in S0i3 path
PLAT-85818:[Chrome]: Validate L2 directory table TotalEntries
PLAT-85822:[Chrome]: Avoid integer overflow in SVC Call Input Validation

Release Version 0.11.01.70
-----------------------------------
Bootloader
----------------
PLAT-79422:[Chrome]: Remove workaround in init of secure debug unlock
PLAT-88041: Set SPIROM speed in stage1 bootloader
PLAT-88085:[Chrome]: Add support for CCP pass through in stage 1 BL
PLAT-88085:[Chrome]: Add svc call for ccp dma
PLAT-88085:[Chrome]: Add test case for spi rom copy using ccp dma
PLAT-87526:[Chrome]: Update boot time stamps in MP0 C2PMSG registers

Trusted OS
----------------
PLAT-81023:[Chrome]: Remove unused keys from TOS and system driver
PLAT-83301:[Chrome]: Rebase to amd-staging till 00.11.00.70

Release Version 0.11.0.70
-----------------------------------
*FTPM updated to version 3.68.0.5

Bootloader
----------------
PLAT-83850: Add RPMC provisioning check for <specific customer> system
FEAT-33383: [SPIROM-CONFIG] Avoid overwriting few bits in Addr32Ctrl2
PLAT-82078: [SPIROM-CONFIG] Bug fix in correction of dummy-cycles

Trusted OS
----------------
PLAT-85001: Bug fix in SaveMsmuToS5Sram
PLAT-64168: [RA2] Handle error conditions appropriately
FWDEV-2682:[RPL] Debug unlock with CCD support
PLAT-84486: Added Promontory V2 (PROM21) key for RMB B0
PLAT-83850: Add RPMC provisioning check for <specific customer> system
FWDEV-2782: Authenticate and load Lite-SDMA FW
DEPHXE-85: [PHX] Disable MP0 clock gating and mem deep sleep
PLAT-74080: Add command to validate binary in memory
FWDEV-3011: [PHX][TOS] CPU deep sleep from MP0 FSDL
FWDEV-3153: [PHX] Remove dmcub TMR on non-secure
SWDEV-289683:[Navi3x} Use SMN mapped address for CCP base
PLAT-79838 : [PSP_TOS] fix RSMU Violation Logging C2P_26
PLAT-83767: Add function to pass FW Attestation info to MPM
FWDEV-2761: [PHX] Remove S3-only S5 RAM entries on s0i3 entry
FWDEV-2766: Move Segment MSMU dRAM hash to secure DRAM
FWDEV-3142: Add MapSmn failure check in MapFwDestAddr
PLAT-83851: [RMB] New PSP -> HSP command for error handling
FWDEV-2664: Fix MI200 mpio.c compile warning
FWDEV-3143: Swtich Rom Armor HMAC comparison to constant time
PLAT-82589: Increase size of MPM DRAM to 16 MB
PLAT-84479: [SP] update Number of UMC channels
PLAT-84391: Add handler for Signal Thread
FWDEV-2551: Modulo bias in ecdsa_sign_rdata nonce generation.
PLAT-81752: RMB Chipset Authentication Requirements
FWDEV-1242: [PHX] USB3.1 Support - PSP FW
FWDEV-2668: [PHX] Remove MP0 only registers from S0i3 flow
PLAT-82396: Drv_sys interface to check if platform is chromebook
PLAT-83460 : [Navi24][PSP_TOS][NPM] block RegUnroll only for Headless
PLAT-83910: [SP]: update the MP1 P2SMSG register
PLAT-83921: [SP]: Update SMN addresses of FICAAR/FICADR
SWDEV-283451: Update maximum XGMI link record
FWDEV-2651: [RPL] [TOS] CPU deep sleep from MP0 FSDL
SWDEV-283300: Update TMZ Config on Rembrandt
SWDEV-274044 : [Navi2x] Fix Priv_PassThrough which skips copying some bytes
PLAT-83902: [SP]: TMR Support
PLAT-64173 VGH: Add HSP Persistent Storage Commands
FWDEV-1470: Key usage flag for GFX IMU firmware
PLAT-82453: Apply GC internal policy on APU
FWDEV-2714:[RPL] Enable SW SHA implementation
SWDEV-286518:[Navi24] Fix DF_PIE_AON_LinkTgtMode__SrcRspLnkBiasMode_MASK value
PLAT-83765 RMB: Add function for DRV_SYS_CMD_ID_FTPM_TPM_CLK_NV_UPDATE_INTERVAL API
SWDEV-282659:[Navi31] Migrate to v31 regspec
PLAT-81640 : [PSP TOS] Revert change for ConfigureRSMUTimeout(Id)
SWDEV-285742:[Navi] Add build flag to aggregate over Navi family
PLAT-82662 RMB: Terminate HSPNVHandlerthread when HSP not enabled
PLAT-83460 : [Navi24][PSP_TOS][NPM] Apply RAP_V1 EntryType for NP_MINIMAL_UVD0
FWDEV-2794: [PHX] Update MMHUB FID0
SWDEV-285742:[Navi3x] Enable Navi3x flags for the relevant code
FWDEV-2741:[RPL] Save MPIO sram on S0i3 entry
SWDEV-285606:[Navi31] Use the correct TOC header
SWDEV-271189 [MI200][SR-IOV]: Move MEC VF FW into TMR
AER-717: Enable SW SHA implementation
SWDEV-251569 : [PSP TOS[RAP] RAP_VALIDATION should fail if no entry found
PLAT-83460 : [Navi24][PSP_TOS][NPM] Apply RAP_V! EntryType for NP_MINIMAL
SWDEV-271190 [MI200][SR-IOV][Azure]: Enable DFC and CAP loading (GFX 9)
PLAT-72423: Setup API for dUSB4/PT21 loading
FWDEV-2665: Fix reserved DRAM address for MSMU dRAM
PLAT-60775: [RMB][HSP][DRTM]HSP-fTPM CRB interface support for DRTM use
FWDEV-2665: Save MSMU dRAM context for S0i3
FWDEV-2739: Write RAP V2 to CCD
PLAT-82593 : [PSP TOS][NPM] fix typo when applying NP_MINIMAL lock
FWDEV-2664: Add MPIO command to save SRAM for s0i3
PLAT-81599:  [RMB][Mayan\Lilac][00.28.00.2B]Secure Debug Unlock pop-up shows error, but status is unlocked
SWDEV-251569 : [PSP TOS[RAP TA] fix RAP_VALIDATION double-counting mismatch
SWDEV-285216 [MI200][SR-IOV][Azure]: Fix drv_sys BSS zeroing.
FWDEV-2656: Add function to save S5 SRAM and TMRs on suspend
PLAT-82172: Unbootable partition register checks current partition
FWDEV-2710: [PHX] Enable SW SHA implementation
PLAT-74088: [RMB][DRTM]Added SKINIT/PSP Interface change to Support HSP-fTPM DRTM
SWDEV-262225 : [PSP TOS][RAP][SRIOV] Fix RAP detection of SRIOV-enabled
PLAT-74088: [RMB][DRTM]Added SKINIT/PSP Interface change to Support HSP-fTPM DRTM
SWDEV-247336: Use UUID to remove TA records
FWDEV-2402: [RPL] RDRAND support
FWDEV-2402: Update PMFW supported message for RPL and CSTATE defines
FEAT-38248: [NV31] [PSP TOS] - [PSP TOS] Enable MP0 TOS trace log.
SWDEV-285059:[Navi31] Include FWID in the sysdrv binary
FWDEV-2635: Enable RAP V2 for APU
FWDEV-2663: [RPL] Align to LSD 1428363
SWDEV-283282: [NV31] Implement the Trusted SPI Update main sequence in PSP TOS
PLAT-82599:[tOS] Set UNLOCK STATUS bit of mmMP0_FW_OVERRIDE for secure unlock.
PLAT-81640 : [PSP TOS] fix issue with SMN Data Parity Handling
SWDEV-257759: DC Debug: Fix encryption buffering for PSP SOC Snapshot
FWDEV-317: SKINIT support for RPL
FWDEV-2593: [PHX] Initialize TOS KeyDB
SWDEV-284554: [NV31] Enable STB
PLAT-82174: Add SVC Call to Control PSP-eSPI Feature
PLAT-79859: Add SMU2PSP message to apply suspend RAP policy
FWDEV-2382: [PHX] E.0.1.1 LSC change list alignment Cl# 1414803
FEAT-37545 : [PSP TOS] Enable RAP Validation support for NV31
PLAT-82593 : [PSP TOS][NPM] Bypass RAP rollback and NP Lock on non-secure parts
FWDEV-1266: [PHX] Disable STB
SWDEV-275378:[MI200] Retrieve total number of direct links between peer dies
SWDEV-272821: [NV31] Implement the ROM Image Parser in the PSP Sys Drv
SWDEV-283282: [NV31] Implement the Trusted SPI Update main sequence in PSP TOS
FWDEV-308: [RPL] Save MSMU GFX dRAM in PSP DRAM
RTGPLAT-6864 : [NV24] MP0 unable to enter deep sleep after enter WFI
SWDEV-278013 : [PSP TOS][NPM-mode] clear XGMI keys on Non-Prod RegUnroll
FWDEV-2352: Update TMR_MMHUB_FID0 for Raphael
PLAT-82276:Skip HSP suspend command
PLAT-82155: Create FW Att mutex for all asics that use it
FWDEV-362: Add USB support for RPL
SWDEV-280155: [NV31] Implement SPI control sequences (write) in PSP TOS
PLAT-81630: Fix compile warning with MFD
SWDEV-278013 : [PSP TOS] Apply RAP NP_MINIMAL
PLAT-81641:[MI200][RAS] Writing to CPU DF RAS Interrupt control register for WAFL Err Overflows

fTPM
-----
PLAT-82265: Port Errata 1.12 Changes with BUILD flag
PLAT-83771: Correct CONTEXT_SLOT definition
PLAT-83765: Obtain NV update interval of TPM clock from PSP
PLAT-84169: Update coppyright header for Palamida scan
PLAT-64173: HSP Persistent storage in PSP-FTPM mode

DRTM
-----
N/A

Release Version 0.11.3.6E
-----------------------------------

Bootloader
----------------
PLAT-82503:[Chrome]: Remove the svc_enter test case
PLAT-82503:[Chrome]: Remove the test svc_enter svc
PLAT-81046:[Chrome]: Add tests for SHA 256/384 operation
PLAT-81046:[Chrome]: Add svc call for SHA operation
PLAT-81046:[Chrome]: Add support for SHA operation in stage 1 BL
PLAT-81046:[Chrome]: Extend bootrom interface to support multipass SHA
PLAT-81046:[Chrome]: Add support to call bootrom SHA and CcpSHAKeySetup

Release Version 0.11.2.6E
-----------------------------------

Bootloader
----------------
PLAT-84890:[Chrome]: Update stage2 boot time in public scratch register
PLAT-84851:[Chrome]: execute unsigned verstage with authenticated verstage key
PLAT-84854:[Chrome]: Fix build warnings

Trusted OS
----------------
PLAT-81523: [Chrome]: Do not load fTPM and DRTM driver if chrome opn
PLAT-85001: Bug fix in SaveMsmuToS5Sram

Release Version 0.11.1.6E
-----------------------------------

Bootloader
----------------
PLAT-84453:[Chrome]: Update PSP BL to verstage info
PLAT-81960:[Chrome]: Fix in verstage key validation
PLAT-83301:[Chrome]: Rebase to amd-staging till 00.11.00.6E

Trusted OS
----------------
PLAT-83995:[Chrome]: Add SysDriver support for Widevine Device ID
PLAT-82396: Drv_sys interface to check if platform is chromebook

Release Version 0.11.0.6E
-----------------------------------
*FTPM updated to version 3.61.0.5
*DRTM updated to version 04.11.00.22

Bootloader
----------------
PLAT-81867: [SPIROM-CONFIG] Different UID in warm & cold boot
PLAT-81103: Fix ASF remote power down issue.
PLAT-72713: Clear PMIODEBUG:cf9rstdisable bit before triggering warm reset (CF9 shadow reset).
FEAT-33382: Align CS definition to PPR document

Trusted OS
----------------
PLAT-64168: Fix enabling SPI Locking hardware feature
FEAT-37545 : [PSP TOS] Enable asic_types: NV31
FWDEV-2562: Skip ClearSMMLock for RPL
PLAT-73559 fixing compiler warning
PLAT-81708: Revert multi-block Decryption commits
FWDEV-2538: Add RPL to support A/B partition.
PLAT-81630: Configure IOMMU Bypass when MFD restores MPM
SWDEV-282358 [MI200][SRIOV]PSP can't program MC registers for VF
SWDEV-281753: Clear XGMI AES keys after SDU
PLAT-73559 [CZN Manageability] Expose "Skip Pro Check" API for Manageability TA
PLAT-81641:[MI200][RAS]Correct logic to increment ErrCnt for WAFL Correctable error
PLAT-81487: [RMB] - Unblock TCG Logs Query command (BIOS to PSP) when HSP is failed
SWDEV-278013 : [PSP TOS][RAP] Clean-Up RAP V1 & V2 defines
PLAT-72541: Exposed TPM Type selection for broader use
FEAT-37545 : [navi31][PSP TOS] Enable basic support for navi31 RAP V2
FEAT-33382: Align CS definition to PPR document
FWDEV-1266, FWDEV-2427: [PHX] Enable STB and HSP
PLAT-81566: SW SHA Support unaligned accesses
FWDEV-2398: Support TMR and FMR
PLAT-81548: Add Manageability Functional Driver Id

fTPM
-----
PLAT-72541: Select PSP-FTPM as default TPM mode

DRTM
-----
PLAT-72541: Added TPM Type Selection

Release Version 0.11.0.6D - Cancelled
-----------------------------------
*FTPM updated to version 3.59.0.5

Bootloader
----------------
PLAT-80494: Select APU/NPU security policy dynamically
PLAT-77759: DRTM launch failure when RA2 enabled

Trusted OS
----------------
SWDEV-273505: Support decryption FW with size of more than 4KB
FWDEV-2426: SMN addresses of FICAAR/FICADR in DF v4
PLAT-78580: Boot fail when swap CPU with RAv2 enabled
SWDEV-273884:[NP] Search for non-prod keyID in secure mode properly
SWDEV-280155: [NV31] Implement SPI control sequences (write) in PSP TOS
PLAT-79711: Fix debug unlock on NPU
PLAT-78434: [RMB] Use SW SHA in TEE interface
PLAT-80468: fixing the issue with RDRAND re-seeding in RMB and PHX
SWDEV-263509:[Navi3x] Authenticate and load IMU firmware
PLAT-80944: Enable_PRO_Check for FW to check and control L3 security feature
FWDEV-310: Share hsti_def.h between BL and TOS
SWDEV-275348:[Navi3x] Load IMU GTS  offset registers
SWDEV-278387:[Navi3x] Keep the TOC FW ID table separate
SWDEV-273413:[Navi3x] Load GFX configuration settings to RLC Transfer RAM
SWDEV-278387:[Navi3x] Add GFX_11 support on the tOS
PLAT-77759: DRTM launch failure when RA2 enabled
FWDEV-329: Disable IKEK_TA support for TOS on RPL.
SWDEV-259320 : [PSP TOS] DC Debuggability: dump MP0 TraceLogs
PLAT-80792: [RMB] Enable HSP by default
FWDEV-1239: [PHX] Add z-state support
FWDEV-307: Directly access TMR/FMR regs for DF v4
PLAT-80267:[RPMC]Add RPMC report version to make rpmctool backwards compatible.
PLAT-64168: Addition of flag to enable CS switching
PLAT-80449: Add MPM deep sleep ready condition

fTPM
-----
PLAT-80107: Make TPM1.38 Errata 1.4 fully compliant with BUILD flag

DRTM
-----
N/A

Release Version 0.11.0.6C - Cancelled
-----------------------------------
Bootloader
----------------
PLAT-64168: Remove hardcoded opcode2 info
PLAT-79445: Fix NPU detection in bootloader
PLAT-70421: FIPS RN Development BootRom Func Support

Trusted OS
----------------
PLAT-64168: Enable SPI Locking hardware feature
PLAT-79198:MI200[RAS] - RAS SMU Fatal error is level triggered
SWDEV-257759 : [PSP TOS] DC Debuggability: Add Encryption Library
SWDEV-253904: Update runtime TMR setup for A+A
SWDEV-279046:MI200[RAS] - WAFLC Correctable error need to increment ErrCnt in MCA register
SWDEV-255822 MI200-SRIOV Ucodes Frontdoor Loading
FWDEV-350: Add S3 support for RPL
FWDEV-297: Align TOS fuse offset to CL1398554
SWDEV-277081 : [PSP TOS] Propagate "IsHeadless" flag for navi24 RAP TA
PLAT-78753: Enable EC-eSPI-PSP SPI-ROM Access Interface
SWDEV-273884: [Mi200][NP] Cripple AQL entry in ME Jump Table
FWDEV-319: Add support for saving data to MSMU DRAM
PLAT-80242: Add ENABLE_USB4 in build flags
PLAT-64168: Remove hardcoded opcode2 info
FWDEV-1258: [PHX] support RAP v2
FWDEV-313: [RPL] Enable S0i3
PLAT-80370 RMB: Map RA2 status to Flag FLAG_ID_RA2_STATUS
DERMBE-868: Increase USB max size in secure DRAM (2)
PLAT-80155: fix DFP registers on AER(VGH)/RMB/PHX
PLAT-80242: [PHX] Exclude ENABLE_USB4
PLAT-79651: Update conditions for MPM PCI WLAN sequence
DERMBE-868: Increase USB max size in secure DRAM
PLAT-60131: Add functions for MPM deep sleep
PLAT-64168: ROM-Armor v2 for clients - phase11
PLAT-80051: Remove AEPP buffer in MPM restore API
SWDEV-273505:[MI200] - BUILD_CCP_CTRL_SMN Kconfig aligned for CCP related features
SWDEV-272821: [NV31] Implement the ROM Image Parser in the PSP Sys Drv
SWDEV-274838 : [PSP TOS] Use RAP Policy Alternate List
PLAT-64168: Cleanup of RA2 for RMB program
PLAT-80121: Increase size of stacks in psp kernel of amd-tee2.0
SWDEV-273505: Decrypt image before loading into the destination
PLAT-79203: [RMB] DRTM security policy applied causes violation
PLAT-79201: [RMB] DRTM TMRs not set up correctly
FWDEV-1676: [PHX] E.0.0.8 LSCm change list alignment CL# 1399276
SWDEV-277606: [Navi24] Block NP RAP rollback functionality on headless SKUs
SWDEV-253227: PSP Secure Kernel SVC Call - User guide
AER-519: Send PSPSMU_MSG_DFCSTATE_DISABLE before accessing TMR registers
PLAT-75500: Update anti rollback support for 64-bit SPL fuse
SWDEV-266668 : [PSP TOS] MP0_C2PMSG_62 dump SlaveErrorAddr
SWDEV-263509:[Navi3x] Allocate a FW TYPE ID for IMU FW
PLAT-79866: Increase the size of stacks in amd-tee2.0
PLAT-79386: [RMB] Remove SDMA FW restore on s0i3 exit

fTPM
-----
N/A

DRTM
-----
N/A

Release Version 0.11.0.6B
-----------------------------------
Bootloader
----------------
PLAT-79509: [HSTI]Updated HSTI Status Bitmap Definition
PLAT-70421: FIPS implementation

Trusted OS
----------------
SWDEV-274746:[MI200][RAS] - Rectified the MP0 registers for RAS Recovery handling
SWDEV-264802 : [PSP TOS] return ERROR if no RSMU AEB validated
PLAT-79509: [HSTI]Updated HSTI Status Bitmap Definition
SWDEV-276359 : [PSP TOS] Properly Initialize RAP internal variables
PLAT-70421: FIPS implementation
PLAT-79472: Map MPM FMR memory for MFD
FWDEV-370 - [RPL] Support for PMM: Disable CCP Power Gating
SWDEV-276392 : [PSP TOS] initialize DRV_SYS_GET_ASIC_TYPE_PARAMS
SWDEV-260860 : [PSP TOS] sanity-check VF memory address

fTPM
-----
N/A

DRTM
-----
N/A

Release Version 0.11.0.6A
-----------------------------------
*FTPM updated to version 3.58.0.5
*DRTM updated to version 04.11.00.21

Bootloader
----------------
PLAT-73271: Implement MBAT programming on CZN
PLAT-78234 : RPMC not enabled with XMC SPIROM
PLAT-78554:[RPMC] provision fails at the first time on brand new SPI-ROM.
PLAT-78274: Pass stage1 FAR test status to TOS
FWDEV-319: Merge headers for MP2 SRAM and MSMU DRAM

Trusted OS
----------------
FWDEV-1229: [PHX] Initialize ToS (2)
FWDEV-1230: [PHX] Power features
FWDEV-1228: [PHX] RDRAND speedup support
FWDEV-1720: [RPL] Add check for Asic Type using RevID
FWDEV-353 - [RPL] [tOS] Power features
SWDEV-272140 : [PSP TOS] fix Security Violation log progagation
SWDEV-273505: [Mi200] Enable FW Decryption support RWL
PLAT-79079:[MI200]RAS - Corrected mask bit for Ras Err Inj enablement
PLAT-76910: Add support of 16 RPMC fuse slots for RMB - tOS
FWDEV-1229: [PHX] Initialize ToS
PLAT-78920: ACP secure regions are reprogrammable
PLAT-78434: Minor change to Svc_TryAcquireMutex() behavior.
SWDEV-272822: Remove MillerRabinTest side-channel protection
FWDEV-330: [RPL] Fixes for TOS initialization
SWDEV-272140 : [PSP TOS] Propagate Security Violation log from PSP BL to TOS
SWDEV-271190 [MI200][SR-IOV][Azure]: Enable DFC and CAP loading (GFX 9)
SWDEV-271189 [MI200][SR-IOV]: Move MEC VF FW into TMR
PLAT-78434: Add new SVC call Svc_TryAcquireMutex() which does not wait for mutex to be free.
SWDEV-263116:[Navi23] Add support for MACO resume in TOS
SWDEV-274746 : MI200[RAS] - Enable MP1 RAS Error and WAFLC correctable RAS error handling
PLAT-78823: [RMB] handle ACP DMA complete through RSMU
AER-581: New PMFW message for GFX TDR reset event
SWDEV-271188 [MI200][SR-IOV]: Decouple MM-SCH from VCN TMR and move to seperate TMR
SWDEV-270845:[Navi31]Add Navi31 register header files and enable compilation
SWDEV-273883: [Mi200] Disable SRIOV in non-production mode
FWDEV-328: Update PSP SMC message on RPL
PLAT-78140: AM5-stop execution on bixby/prom auth failure (2)
PLAT-78140: AM5- stop execution on bixby/prom auth failure
PLAT-76264: Hash 64K RO region on S3/S0i3 cycle
FWDEV-328: RPL - initialize TOS
PLAT-73721: Add debug unlock support with HSP
AER-577: Revert of "Remove setting ROMBIST_BYPASS while entering S3"
SWDEV-271909: Restore RLCV enable register
SWDEV-271194 [MI200][SR-IOV]: Enhance DFC to support TA whitelisting
SWDEV-272821: [NV31] Implement the ROM Image Parser in the PSP Sys Drv
PLAT-78366: Add zstate build flag
FWDEV-1271: [PHX] Power Management Firmware Interface FW Support
Revert "PLAT-75283: Add CCP Passthrough destination alignment checks"
SWDEV-211340:Rectify RAS Recovery handling in rsmu handling
RTGPLAT-5677 : [NAVI21][SRIOV][non_prod] Set DEBUG_UNLOCK after RegUnroll
SWDEV-273664: [NV21] Falcon display corruption - intermittent
FWDEV-319: Merge headers for MP2 SRAM and MSMU DRAM
SWDEV-271190 [MI200][SR-IOV][Azure]: Enable DFC and CAP loading (GFX 9)
SWDEV-253227: PSP Secure Kernel SVC Call - Interface Definition with Doxygen
SWDEV-270495:[Navi2x] Set TMZ registers as per HW recommendation in PSP TOS
SWDEV-271192 [MI200][SRIOV]: Disable MEC VF FW periodic validation
AER-577: Remove setting ROMBIST_BYPASS while entering S3
SWDEV-272635:MI200[RAS] - Added check for Ras Err Inj status for RAS TA
SWDEV-271191 [MI200][SR-IOV]: Disable Setup VMR/Destroy VMR support

fTPM
-----
PLAT-78364 [CZN]: Migrate to FTPM build using Conan

DRTM
-----
PLAT-78536: Migrate to DRTM build using connan


Release Version 0.11.0.69
-----------------------------------
*DRTM updated to version 04.11.00.20

Bootloader
----------------
PLAT-77348 [RA2] Add addr check for writable region absolute address for AB layout
PLAT-67300: [RN][RPMC]Enable Multiple Fuse Slots on MXIC Part
FEAT-33382: Consume spirom-configuration data

Trusted OS
----------------
SWDEV-272141: Update LIVMIN command for mode 2 reset
SWDEV-272178:[Navi2x] Remove unused structure from dGPU header
SWDEV-272086: Fix VCN counter address in RAM TMR
RTGPLAT-6510:Navi21:UMC MISC6 registers need to be accessed by MP1
SWDEV-270310: Update GCM Enable setting on mode 2 reset
PLAT-76263: Update fwatt loc table on S3/S0i3
PLAT-60779:[VN][HSP][DRTM] Send Hash Data to HSP-fTPM
PLAT-71773: Support PMFW command to clear only GC enable
PLAT-76558: [SP]: Add support for Stormpeak target in TOS
SWDEV-268766: Check last TA entry point type in LoadTa() before returning status
SWDEV-211340 : [PSP TOS][RSMU Violation logging] Revert change to legacy code
PLAT-66844: load iKEK TA into LSB4
SWDEV-211340 : [PSP TOS] RSMU Violation logging - avoid collision
PLAT-59672: [HSP][DRTM]HSP-fTPM Locality Control
AER-487: [AER] Disable TMZ
SWDEV-211340 : [PSP TOS] fix RSMU Violation logging
SWDEV-211340 : [MI200][PSP TOS] enable BUILD_RAP_V2 in SVL
SWDEV-270346:MI200 - Update the xgmi link records to pass to TA
SWDEV-211340 : [PSP TOS] Implement new RSMU Security Violation logging Scheme
PLAT-75283: Add CCP Passthrough destination alignment checks
SWDEV-270535: [Mi200] Enable SysHub Support
PLAT-76991: Rename PAGE_SIZE to ROM_PAGE_SIZE
PLAT-76887: Map USB config buffer using BiosMapSharedMemSmm
FEAT-33382: Enhance validation of spirom-config info in tOS
PLAT-64168: Handle SMI_SpiGetBlockInfo properly with enabled RA2
SWDEV-267746:MI200 - Enable DS_ENB bits for MP0, MPIO and MP1 in MP0 to allow SOCLK DS entry
SWDEV-264802 : [PSP TOS] validate RSMU AEB
PLAT-76251: Update bit configurations for MPM PCIe access

fTPM
-----
N/A

DRTM
-----
PLAT-59672: HSP-fTPM Locality Control Support
PLAT-74210: Conan Support Enabled

Release Version 0.11.03.68
----------------------------------
Bootloader
----------------
PLAT-84174:[Chrome]: Invalidate D-cache before ccp passthrough
PLAT-83939:[Chrome]: Add tests related to timer delay
PLAT-83939:[Chrome]: Add svc support for delay in micro seconds
PLAT-81600:[Chrome]: Reload coreboot from spirom in S3 resume

Trusted OS
----------------
PLAT-81601:[Chrome]: Skip initializing base offset for BSP
PLAT-84119: Workaround for HDT error during debug unlock

Release Version 0.11.02.68
----------------------------------
Bootloader
----------------
PLAT-83506: Determine and pass boot partition info to stage2 BL
PLAT-81879: Add support to invalidate cache in stage 1 BL
PLAT-81045: Add support to call bootrom RSA from stage 1
PLAT-81045: Add support to ccp_mod_exp operation in stage 1
PLAT-81045: Add svc call for ccp_mod_exp
PLAT-81045: Add ccp mod exp test case
PLAT-82508: Add secure rtc read and timer tick read support
PLAT-82508: Add svc call to get timer ticks
PLAT-82508: Add test case to read timer raw value
PLAT-83154: Reserve a field in amdtee mailbox for chrome info
PLAT-80978: Pass chrome info from bootloader to TOS

Trusted OS
----------------
PLAT-80978: Do not load TA in PSP chromebook developer mode

Release Version 00.11.01.68
---------------------------
PLAT-81044:[Chrome]: System reset SVC call in stage 1 BL
PLAT-81044:[Chrome]: Support warm and cold reset in stage 1 BL
PLAT-83047:[Chrome]: Use mapsyshub with ccp on dram addr for crypto operation
PLAT-82987:[Chrome]: Revert security policy applied in stage1
PLAT-83301:[Chrome]: Rebase to amd-staging till 00.11.00.68


Release Version 0.11.0.68
-----------------------------------
Bootloader
----------------
PLAT-76138: [RN/CZN][RPMC]Disable Root Key Auto Provisioning
PLAT-76349: Load the binary headers of ABL entries
PLAT-67300: [RPMC]Support Configuring RPMC Counter Address Multiple Times
PLAT-75744: [CZN]MP2 SRAM0 usage update for Walle-Lite PM logging.
FEAT-33382: Modify structure to adapt more vendor's models
PLAT-75821: Fix early unlock command reading
FEAT-33382: Allow system to boot even with no spirom model

Trusted OS
----------------
PLAT-75534: Update ROM-Armor enforcement status in HSTI-info
PLAT-76347 RMB: Pass PSP-FTPM as TPM config when HSP Disabled
PLAT-75884: System hangs in Storage-initialize loop
PLAT-67300: [RPMC]Support Configuring RPMC Counter Address Multiple Times
SWDEV-258122:[Navi2x] Correct the UMC channel numbers in the headers
PLAT-73457: [RMB] Add Doxygen/Sphinix support for HSP - PSP Interfaces
PLAT-75208: [RA2] Idle system hangs after resumed S0i3 successfully
SWDEV-211107:RAS Recovery handling enabled only for RAS enable
PLAT-75912: [RMB] Added Promontory V2 (PROM21) Device Authentication Key Set
SWDEV-253219: Comment correction; includes RMB
PLAT-75368: The screen will flicker black ... after resume from S4 while playing video...
PLAT-75719: Add USB configuration command support for HC3/7
PLAT-73964: New API to expose Host-OS-Down mode to TA
PLAT-75491: [RMB] Change which unlock policy is applied in unlock flow
PLAT-75305: [RMB] Send PMFW msg to enable smn routers during unlock
SWDEV-257413 [AWS][Navi12] PSP load Driver Cap FW failure
SWDEV-255756: Correct mailbox registers to not use IH (2)
SWDEV-255756:[MI200] correct mailbox registers to not use IH

fTPM
-----
N/A

DRTM
-----
N/A


Release Version 0.11.1.67
-----------------------------------
*fTPM updated to version 3.57.0.5

Bootloader
----------------
PLAT-69795: Allow SMU to access L3 DSM
PLAT-74123[BOOTLOADER] Add a SVC call to set the recovery type specified by ABL
PLAT-72196 : PLAT-73352 [CZN_FP6] SUT boot fail with ROM XM25QU128C/XM25RU128C
PLAT-67072:[RPMC]Adjust RPMC Root Key Programming Sequence

Trusted OS
----------------
TIC-71607: Revert "PLAT-73494: [AER] Save/Restore VCN IP Data (stack/heap/vars) with FW in S3/S4"
PLAT-69795: Allow SMU to access L3 DSM
PLAT-75047: Load VCN FW before UVD is powered on
PLAT-75292: Update RSMU timeout on RMB
PLAT-74494: rollback  [VGH/AER] Enhance S3 performance in stage1 BL
SWDEV-251833:[Navi2x] Prevent update of older USB PD Firmware
SWDEV-249289:[Navi24] Add Navi24 case in RevertRapPolicy_DGPU in PSP System driver
PLAT-74147: Restructure USB loading and validation (2)
PLAT-74147: Restructure USB loading and validation (1)
PLAT-74494: [VGH/AER] Enhance S3 performance in stage1 BL
PLAT-74300:[MI200] GPCOM ring fails due to GPU is fenced off from CPU
 MERO-944: Fix RSA OAEP encryption/decryption algorithms

fTPM
-----
PLAT-75282 CZN: Code Cleanup

DRTM
-----
N/A


Release Version 0.11.0.66
-----------------------------------
*fTPM updated to version 3.56.0.5

Bootloader
----------------
N/A

Trusted OS
----------------
SWDEV-262608: [Mi200]VCN Front Door loading failure (SPG/DPG/DPG SRAM mode)
SWDEV-264694: Fix Video playback issue after S3 resume
PLAT-61278: [VN] [HSP] PCR Measurements in tOS
SWDEV-260624 : [PSP TOS] validate RAP V2 logic
SWDEV-260624 : [PSP TOS] validate L0_EARLY_NONSECURE
PLAT-68230: Receive STB verbosity level through bios-cmd

fTPM
-----
PLAT-73255 : Modify fTPM folder structure to include TPM138 and TPM162

DRTM
-----
N/A


Release Version 0.11.0.65
-----------------------------------
*fTPM updated to version 3.55.0.5
*DRTM updated to version 04.11.00.1E

Bootloader
----------------
FEAT-33382: Modify logic of searching spirom model
PLAT-74020: Disable iGPU based on fuse value
FEAT-33382: Cleanup of spi-rom related code
PLAT-72860[BOOTLOADER]Prevent triggering recovery mode for entries 0x58/0x59
PLAT-72837: [RPMC]Fused ASIC Provision Key on Test Key Programmed SPI-ROM
FEAT-33382: Cleanup of spirom-config file

Trusted OS
----------------
SWDEV-262471: Add Smart Trace Buffer log for RSMU Timeout in Trusted OS
SWDEV-260624 : [PSP TOS][clean-up 6] fix sending SMU GFX On/Off
SWDEV-260624 : [PSP TOS][clean-up 3] for handling GFXOFF_EXIT
SWDEV-260624 : [PSP TOS][clean-up 2] move IsSecurityPolicyRequired() for common use
PLAT-73808: Allow BIOS to retrieve SPL value of presently booted system
SWDEV-260624 : [PSP TOS][clean-up 4] remove un-used argment
PLAT-71326: [RMB] update to support unified A0/B0 PSP FW
DERMBE-648:[RMB] Remove MP0_RSMU_CLK build flag
SWDEV-260624 : [PSP TOS][clean-up 1] use "rap_if.h"
SWDEV-264330: Update MI200 minimum BL version for SDU
SWDEV-262608: [Mi200]VCN Front Door loading failure (SPG/DPG/DPG SRAM mode)
SWDEV-249287:[Navi24] Add case to Identify Navi24 ASIC and set gAsicType
SWDEV-260860 : [PSP TOS] fix DrMapSharedMemSyshubMmhub
PLAT-65292: HSP S0i3 Support
AER-426: increase idle stack size
PLAT-71140: Enable ACP SRAM through mailbox
FEAT-32948: Store first 4 bytes of TA Uuid instead of PID
PLAT-73607: [AER] set registers before S3 entry
PLAT-73600: Load, authenticate and decompress WLAN driver
SWDEV-214841 - Update to Arm Compiler v6
PLAT-73494: [AER] Save/Restore VCN IP Data (stack/heap/vars) with FW in S3/S4
PLAT-7319: Remove FindEventId for pcr measurements buffer from BL
SWDEV-251569 : [MI200][PSP TOS] fix RAP V2 validation to ignore bit[1:0]
FEAT-33382: PLAT-64168: Consume spirom-config data in tOS
SWDEV-248568 : [MI200][PSP TOS][RAP V2] add supprt for MI200 unroll
PLAT-73428: Add support for compressed FW
SWDEV-262759 : [navi21][PSP TOS] RAP TA validation of L1 policy fails after VF_FLR
PLAT-70272: Add MP0_RSMU_CLK build flag to RMB

fTPM
-----
PLAT-73379 CZN: Update Makefile and dependencies.txt to build with Conan
PLAT-73263 CZN: Smart Trace in FTPM
PLAT-71169 CZN: Port backward compatible changes in TPM 1.38 Errata 1.4

DRTM
-----
SWDEV-256928: [SCPC] HVCI gets disabled when SMM Isolation gets disabled in the BIOS


Release Version 0.11.0.64
-----------------------------------
Bootloader
----------------
PLAT-72744: Allow initial SPL fuse value to be set during FAR enablement
FEAT-33382: Refactoring of spirom-config-binary related code
PLAT-73064: [RPMC]Using RPMC State Structure to Store RPMC Global Variables
PLAT-72860[BOOTLOADER]AB recovery cannot work when binary type 0x59 corrupted
SWDEV-220087: fix Coverity issue - HFA
PLAT-72909: Remove PLATFORM_MODEL_ID check for PSB enable
SWDEV-259407: Make TMZ_Key count ASIC specific
FEAT-33381: Pass appropriate information of SPI-ROM configuration to PSP tOS.
LWPQA-588: fix Coverity issues

Trusted OS
----------------
SWDEV-262269: [VGH/AER] S3 entry flow should save MSMU DRAM
PLAT-72744: Allow initial SPL fuse value to be set during FAR enablement
SWDEV-251895 [NV][SRIOV] Add SRIOV mailbox rate limiting in PSP.
SWDEV-262133: [NV23] Enable STB in PSP FW
SWDEV-253219-PSP-Gfx driver interface documentation
PLAT-73181: Applies unlocked sec. pol. for UVD
PLAT-73313: Change the Base address of HSP_PSP_COMM_BUF
PLAT-73316: [CZN] Checking size for IP FW Save/Restore breaks S3 suspend/resume
PLAT-73303: created RdrandThread for RMB
PLAT-72686: Organize use of shared DRAM - TOS
RTGPLAT-6123: [Navi12][AWS][SRIOV]: Disable VF Mailbox access to Trusted Applications
PLAT-67970: Setup Sec Interrupt FIFO on S3 exit
SWLSD-41: Porting AGA-03 and AGA-01 to amd-tee2.0
RTGPLAT-6111: [NV21]: Fix issue related to wrong check of device and revision id
PLAT-73202: Refactoring of code around STB
PLAT-72504: Enable RSMU interrupt for GFX (2)
PLAT-69424: PLAT-72841: [CZN] System hangs with post code A5F0 in stress test
SWLSD-40: Port over AGA-04 fix to amd-tee2.0
RTGPLAT-6086: Navi21 : MP1 need to access UMC MISC6 registers
FEAT-32948: Firmware Attestation Report NV23 TA support
PLAT-72744: Fix tOS builds
PLAT-58313: Add USB4 PHY loading
SWDEV-261431: [NV22] Enable STB in PSP FW
PLAT-72761: Add API to read from/write to MPM SRAM
PLAT-72949: [AER] Separate PSP FW tOS build targets AER from VGH
PLAT-72909: Remove PLATFORM_MODEL_ID check for PSB enable
PLAT-61278: [RMB] [HSP] PCR Measurements in tOS
PLAT-70811: Notify ASD driver of zstate entry and exit
SWDEV-260586: [MI200] Enable Trace Log in TOS
PLAT-72890: Reduce allocated stack sizes in System Driver
DERMBE-563: Enable posted writes for bootrom z-state exit
SWDEV-259407: Make TMZ_Key count ASIC specific
SWDEV-260011:Update MI200 TOS sign function
AER-355: [A1] Unsecure part will hang when entering S3/S4/reboot/shutdown
SWDEV-257413 [AWS][Navi12] PSP load Driver Cap FW failure
PLAT-68882: Add offset in MPM DRAM for AEPP buffer
PLAT-72504: Enable RSMU interrupt for GFX
PLAT-68881: Add functionality for WLAN access API
PLAT-67214: Enable FW Att on TOS for RMB
PLAT-67214: FWAR always maps SYSHUB on APU
FEAT-35003: Renaming Fw Att DB feature from fwar to fwatt
PLAT-64168: ROM Armor v2 for clients - phase10
SWDEV-249286:[Navi24] Add Navi24 register headers and enable compilation for Navi24.
SWDEV-249290:[Navi24] Use the right number of UMC channels
PLAT-67214: FWAR uses SYSHUB if no GPUVA
PLAT-71511: [RPMC] Report Current RPMC Counter Addresses to BIOS
PLAT-71181: [RMB] Update A0 fuse addresses
PLAT-67970: [RMB] Skip RSMU programming for sec interrupts
PLAT-70276: Save Mp0 status regs across z-state
PLAT-71707:[RMB] Set S3 bit in MP2 OVERRIDE on S3 entry
PLAT-72299: Remove MFD_VALIDATED check for BIOS cmd 0x49

fTPM
-----
N/A

DRTM
-----
N/A

Release Version 0.11.2.63
-----------------------------------
Bootloader
----------------
NA

Trusted OS
----------------
PLAT-69424 : [CZN] System hang with post code A5F0 in BIOS flash stress test - reverted old workaround
                   and provided a proper fix

fTPM
-----
N/A

DRTM
-----
N/A

Release Version 0.11.1.63
-----------------------------------
* CZN SPL table updated to v05.11.01.63

Bootloader
----------------
PLAT-71974: Legacy recovery process stuck in 0xEEA90022
PLAT-71710: Fix fusing of Bios Key Revision ID
PLAT-70156: SUT stuck at Postcode 00000000 with ROM MX25U25673G
PLAT-71863: Update BL/debug_unlock to armcc v5.06
PLAT-69014: SVC call to disable RDRAND enhancement

Trusted OS
----------------
PLAT-69424 : [CZN] System hang with post code A5F0 in BIOS flash stress test.
PLAT-71710: Fix fusing of Bios Key Revision ID
PLAT-64628: Adds cmd to show security violation timestamp
SWDEV-258598: Interleave dis-assembly with source code
LWPQA-564: Dead default in switch statement
LWPQA-561: Dead default in switch
LWPQA-562: Unnecessary header file
LWPQA-563: Unnecessary header file
LWPQA-560: Unnecessary header file
PLAT-71511: [RPMC] Report RPMC Available Counter Addresses to BIOS
RTGPLAT-5747:[NV2x]:Debug unlock thread in trusted OS need not be killed for unlocked device.
SWDEV-257638: Dont error out loading of USB PD FW when TMR is not present
PLAT-71433: Document the used bits of C2PMSG_38 register
PLAT-71181: Align RMB header files to MTO 1322172
PLAT-70273: Wait for DF restore on z-state exit

fTPM
-----
N/A

DRTM
-----
N/A


Release Version 0.11.0.62
-----------------------------------
* DRTM updated to v04.11.00.1D

Bootloader
----------------
PLAT-71298: Add corruption info for recovery mode in tOS.
PLAT-64168: ROM Armor v2 changes - phase9
PLAT-70258: Support 2 instance type 0x62 for A/B recovery
PLAT-71042: Fix smn_with_size mapping/unmapping bugs
PLAT-71380: Add missing Svc_BIOSDirectorySearchV2 declaration
PLAT-71091: Fix BIOS OEM leaf key validation
PLAT-70767: [RPMC] Handle Counter Reading Fail Case
PLAT-68343: [RPMC] Update RpmcAvailableFlag in RPMC disabled case

Trusted OS
----------------
PLAT-71298 Add corruption info for recovery mode in tOS.
PLAT-64168: ROM Armor v2 changes - phase9
RTGPLAT-5690: Resolved Guest Fw load failure
RTGPLAT-5765: [NV2x] RAP L0 Rollback Validation failure via RAP-TA
SWDEV-256542: [Mi200] Flip override bit UTCL2IUGPAOVERRIDE
SWDEV-256542: [Mi200] Override CP Guest Phy Addr bit for UTCL2
AER-232: [A1]Secure part can't load win GFX driver
PLAT-70750: Rollback of [AER][VGH] Binaries named in the TypeId format.
PLAT-66360: [RMB] Update CS-SEED-based KDF and Key Unwrapping
PLAT-70811: Add zstate entry/exit driver command IDs
PLAT-70274: Added Z-state init to S3-resume
PLAT-70268: Unpowergate CCP on z-state exit
MNTPLAT-745: HID-SPI banged after S0i3 with DRTM enabled
PLAT-68879:Add functionality to MPM read/write reg API
PLAT-70272: Change TOS to use MP0 RSMU clock
AER-206: Move UVD security accesses to UVD PG programming
PLAT-63918:[Navi] Enable protection bit for CCP side channel protection
SWDEV-240041: Resolving a bitwise and typo and coverity defect
PLAT-70274: Moved z-state setup code out of z-state entry
PLAT-70079: TOS should ensure driver sets up TMRs before allowing loading of gfx fw
PLAT-68839:Add functionality to MPM memory mapping API
SWDEV-213799: MPIO RAS error handling in TOS
PLAT-68882: Add API to restore and verify AMF FW in MPM DRAM
SWDEV-251569: [MI200][tOS][RAP] RAP V2 validation integration via RAP TA
DERMBE-439: Unmask SMU cmd interrupt on z-state entry

fTPM
-----
N/A

DRTM
-----
MNTPLAT-745: HID-SPI banged after S0i3 with DRTM enabled

Release Version 0.11.0.61 (Cancelled)
-----------------------------------
Bootloader
----------------
PLAT-70737 Fix SPI FIFO size
PLAT-70767 RPMC read counter before releasing cores
PLAT-70595: Remove alignment constraints when copying from SPIROM
FEAT-33379: Configuration of ROM through SPI-ROM Configuration external binary
PLAT-70761: Refactor PSP-SMU mailbox commands for APU
PLAT-64168: Changes for ROM Armor v2 - phase8
DERMBE-337: Apply GFX DLDO policy on PMFW cmd 0x1B
PLAT-70432 RPMC handle extended status 0x00
PLAT-70464: Make MP2-SFH default
PLAT-70346: Remove unnecessary debug prints

Trusted OS
----------------
LWPQA-462: Replacing _smc(0) syntax on SmcCall
SWDEV-255293 - [MI-200]: Mode 2 Reset - suppport GFX SDP Port disable
LWPQA-510: Unnecessary header include
LWPQA-508: Added #ifdef guard on include for RMB
PLAT-70522: [RN] Adding ATAG parameters to pass on DMAr information to KVM.
AER-165: Do not enable UVD_REG_FILTER_EN in non-secured BIOS on Chachani systems
SWDEV-255233: Update MI200 TOS FW Id
PLAT-60666: [VGH] Implement TMZ in PSP TOS
PLAT-70465: RN support for X470 annd B450 Promontory Chipsets
PLAT-60176: Updates gfx component list for RMB
PLAT-70750: [AER][VGH] Binaries named in the TypeId format.
PLAT-64168: Changes for ROM Armor v2 - phase8
FEAT-34947: [tOS][RAP] Robustness improvements for GFX DPM handling for RAP validation
SWDEV-249497: [Mi200] Save/ Restore bootrom table fields into SRAM
SWDEV-251569 : [PSP TOS] RAP v2 support in RAP TA
DERMBE-337: Apply GFX DLDO policy on PMFW cmd 0x1B
PLAT-70625: [CZN] PRO fuse data register change
DERMBE-298: [RMB] Apply UVD policy after UVD power up
PLAT-70616: Add mutex to SendPspSmuMessage function
SWDEV-248735:MI200 Rectified internal VCN register offsets
PLAT-70549: Set API permissions for MFD
SWDEV-251576 : GFX DPM: Restore CLKB / VDD_GFX L0 Security Settings on GFX OFF exitT
SWDEV-252903: [MI200][tOS][RAS] Whitelist Register Access Failure
SWDEV-248568 : [PSP TOS] RAP v2 Update Based on additional comments
PLAT-70349 VGH: Add function for DRV_SYS_CMD_ID_PRIV_GET_HSP_SRAM_SMN_ADDR
PLAT-60493: save MSMU dRAM on S3
PLAT-70063: Include tee_crypto.h in tcg_logs.h
PLAT-70080: [VN][RMB] Update VCN internal reg offsets
SWDEV-248568 : (amd-tee2.0) Update RAP V1 EventTypes
PLAT-67368 : System BSOD 0xEA in S4/S5/Reboot loop.
SWDEV-253502 : fix pointer issue (because of RAP V2 change to PSP TOS)
SWDEV-253120: Apply GRBM CAM policy on non-secure or unlocked part
SWDEV-253168: Enable TOS profiling for Navi21
RTGPLAT-5037:[Navi2x] LIVMIN/D0I3 support
SWDEV-248568 : RAP V2 Integration in Trusted OS for L1 policy apply
FEAT-34773: Caller side implementation of fwar
FEAT-32981: Fw Attestation Database API
SWDEV-247728 [NV][SRIOV]Introduce a PF command for VF FW clean

fTPM
-----
PLAT-66418 VGH: SWDEV-229523 Merge HSP NV Support changes to amd-staging branch
PLAT-70462 VGH: [FTPM] Get HSP SRAM address from PSP
PLAT-68945: FTPM TA code enhancement against CERT violations

DRTM
-----
PLAT-68805: DRTM TA binary name enhancement and minor compile error fix.


Release Version 0.11.0.60
-----------------------------------
Bootloader
----------------
N/A

Trusted OS
----------------
PLAT-64168: Enforce ROM Armor v2 - phase7

fTPM
-----
N/A

DRTM
-----
N/A

Release Version 0.11.0.5F
-----------------------------------
Bootloader
----------------
PLAT-69153 [BOOTLOADER]RPMC tool reports incorrect status after resuming from S0i3
PLAT-69745[BOOTLOADER]A/B Recovery reason logging support
PLAT-68205: [RPMC] Remove Duplicate Macro Definitions

Trusted OS
----------------
PLAT-69289: [tOS] Pass Tpm Ext NV information using FLAG_ID_TPM_EXT_EN
PLAT-69716: Armcc Compiler upgrades from v5 to v5.06
PLAT-68862: [TOS] Add data checking to the CcpGenerateRandom
PLAT-61278: [VN] [HSP] PCR Measurements in tOS
PLAT-69710:Replace hardcoded values
PLAT-66316 VGH: Set HSPNV buffer CmdResp field Bit 31 to 1 by HSPNv thread in system driver during Interface Setup

fTPM
-----
PLAT-68945: FTPM TA code enhancement against CERT violations.

DRTM
-----
N/A


Release Version 0.11.0.5E
-----------------------------------
* Cezanne: Switched to Cezanne-specific signing keys

Bootloader
----------------
PLAT-69759: SVC call to enable extended fTPM storage
FEAT-33378: Configuration of ROM through SPI-ROM Configuration external binary
PLAT-67627 [BOOTLOADER]System can't boot with case 2&3 of BIOS layout
PLAT-61152: [RPMC]Support of RPMC Capable Macronix SPI-Parts
PLAT-69289: [BOOTLOADER] Pass fTPM extended storage flag to TOS
PLAT-57225: RDRAND performance enhancement
PLAT-66438: remove incorrect code from RPMC
PLAT-67620: SUT failed to boot the first time with GD25LQ128D QE bit cleared
PLAT-60739: [RPMC] Remove Redundant Code
PLAT-68679: Clear the MMU page tables on startup
PLAT-67218: [RPMC]Add ADS Check for Giga Device Parts

Trusted OS
----------------
SWDEV-252142: [MI200][RWL] Fix build error due to misaligned concatenation
SWDEV-214841 - Update to Arm Compiler v6
SWDEV-249184: Disable TOS profiling for Navi21
SWDEV-251923: fix usbpd update issue
PLAT-69694: [REV] Disable HSP in default on ToS
SWDEV-214841 - Update to Arm Compiler v6
PLAT-68599:Add API to Initialize MFD
SWDEV-250905:[Navi2x] Clear the "boot mode" after the BACO boot
 FEAT-33002: enable spi access functions for NV21
DERMBE-231: Run USB configure command to only in SMI mode
DERMBE-325: Add SMU load USB FW cmd arguments for RMB
PLAT-57225: RDRAND performance enhancement
SWDEV-250408: [MI200] Fix RWL binary load failure due to skipping PSP-FW-header twice
PLAT-67835: [AER] exclude CVIP and CLKA3 on RSMU table
SWDEV-247524: [NV21][tOS] Skip GFX Sec-Pol reapplication in secure-unlocked state
PLAT-69000: [CZN_AM4] No video with hang PC: A69B while running reboot
PLAT-68843:Add functionality to MPM SRAM mapping API
SWDEV-211107:MI200-RAS: Rectify bug in MCA Syndrom register access
SWDEV-211107:MI200-RAS:SMN Slave Timeout and SMN Data Parity handling
SWDEV-250303: Update PSP TOS to pass down VFID from GFX Mailbox
SWDEV-211109: [Mi200] Handle Poison Data conumption (dGPU)
PLAT-68190: Pass MPM config and DRAM address to BIOS
SWDEV-246861:MI200-RAS : Handle WAFLC interrupt
SWDEV-248518:MI200-VCN 0/1 FW move Cache/Data in seperate TMRs

fTPM
-----
PLAT-68805: FTPM TA binary name adjustment.
PLAT-69442 CZN: [FTPM] Configure TPM NV size to 32K/16K based on FLAG_ID_TPM_EXT_NV_EN from PSP tOS

DRTM
-----
N/A


Release Version 0.11.0.5D
-----------------------------------
Bootloader
----------------
PLAT-65875: Add defines for hard-coded values in TPM SVC Call
PLAT-68637: System can't boot with ROM XMC25QH256B
PLAT-68593: Cezanne signing for firmware components
PLAT-68343: [RPMC] Provisioning RPMC Key on SPI Parts already Programmed

Trusted OS
----------------
SWDEV-248077: Fix return value during error case
FEAT-33002: [NV21] enhace block protection for SPI access
PLAT-68494: Add API function calls to PrivDispatch_v2
FEAT-33002:[NV21] use the hard coded hmac key from BL
PLAT-68090:Update firmware file names
PLAT-67722: Skip MPM RSMU interrupt setup when MPM is disabled
PLAT-68593: Cezanne signing for firmware components
PLAT-66947: Add SMU-to-PSP cmd for CLKB GC sec policy
PLAT-68504: Update USB unified binaries to search by SocFwID for relevant programs
SWDEV-211109: [Mi200] Handle Poison Data conumption (A+A)
PLAT-68343: [RPMC] Provisioning RPMC Key on SPI Parts already Programmed
PLAT-66314: support Aerith on amd-tee2.0
PLAT-68510: [VN] ISP FW loading GFX-9 conditional compiling bug fix
SWDEV-240694: [NV12][Virtualization] Resolve AWS EventGuard5 test

fTPM
-----
N/A

DRTM
-----
PLAT-68541: Update SOC FW ID of DRTM TA in PSP FW Image Header
PLAT-67985: DRTM TA code enhancement against CERT coding standard violations



Release Version 0.11.0.5C
-----------------------------------
* Renoir L0 Security policy is updated to B.9.0.78
* Renoir L1 Security policy is updated to B.9.1.78
* Renoir SPL table  5.11.0.5C
* Cezanne SPL table 5.11.0.5C

Bootloader
----------------
PLAT-68313: Remove Svc_ReadSecureRTC implementation
PLAT-66438: avoid legacy registers in RPMC
PLAT-64168: ROM-Armor ver2 for client - phase5

Trusted OS
----------------
RTGPLAT-4734: [Navi22] TMR setup of VCN1 shall be done based on Clock setting.
PLAT-68387: Unified table entries need to adhere to specified struct
PLAT-67407: [VRMR]: Fix the coverity defects
PLAT-64168: Enforce ROM Armor v2 security-policy - phase6
FEAT-33001:Boot config data bug fix
DERMBE-279:[RMB] Update security violation logging
PLAT-67804:update reg to LSE 1294576
SWDEV-246295:NV21 - Enabled the sharing of XGMI Topology to SMU
PLAT-64168: ROM-Armor ver2 for client - phase5
SWDEV-248234: [Navi23]Enable NP mode for nv23
PLAT-68081: FwType and Subtype must be enforced when loading/validating USB PHY FW
PLAT-68076: Fix dGPU compile warning
SWDEV-245537: [NV21] Support preset Trace Log message in the TOS System Driver

fTPM
-----
N/A

DRTM
-----
N/A



Release Version 0.11.0.5B
-----------------------------------
Bootloader
----------------
PLAT-67894: Add BIOS Key antirollback enforcement
PLAT-67664: Increment SPL value for Renoir PSP components for FAR deployment
PLAT-67810: [BOOTLOADER] Make key derivation compatible with TOS
PLAT-67015: Support of RPMC Capable Giga SPI-Parts
PLAT-66702:[BOOTLOADER]Emit Morse coded sound on errors
PLAT-66608: [RPMC]Remove Redundant Code and Add More Annotations

Trusted OS
----------------
PLAT-60855: [TOS] Add APCB sign/validate BIOS commands
SWDEV-247939:[Navi2x] Fix Debug unlock failure issue
SWDEV-248077: Fix the coverity errors
PLAT-67664: Increment SPL value for Renoir PSP components for FAR deployment
SWDEV-240996:Updated TMR Fabric ID and VCN/VCN1 defines for LSE
PLAT-67579: update A/B recovery in ToS
DERMBE-272: [RMB] Remove MMHUB reg s0i3 save/restore
PLAT-62057:[RMB] remove the saving of MSMU7 in s0i3
RTGPLAT-4707:[Navi23] Correct the MMHUB0 FID value
SWDEV-247528: Reset VCN counters on VCN FW load in TMR region
SWDEV-246727: Fix encrypted counter location in VCN TMR memory
SWDEV-246727: fix build flag issue to get VCN encrypt conter offset
PLAT-66446: [CZN]pre-requisite check control to manage DRTM enablement
SWDEV-245749: [MI200][RWL] Update Register Access Whitelist (RWL) for RAS section
SWDEV-241899: [MI100][tOS] Bug Fix in xGMI-TA read-write API core function
PLAT-66608: [RPMC]Remove Redundant Code and Add More Annotations
SWDEV-244681: Add Write enablement/ disablement to DF Fence macro
PLAT-58030: Move rsmu_config.h for RMB and VGH to shared_bl2os
SWDEV-246092: RMB [VN] S0i3: DMCUB sequence for S0i3
SWDEV-240996:MI200 - Header files updated to LSE bootcode
FEAT-33001: Cleaning up SPI controller

fTPM
-----
PLAT-67820: MakeFile change to add SPL Value in FTPM FW Header

DRTM
-----
PLAT-67293: Enable DRTM service only on FAR-enabled system


Release Version 0.11.0.5A
-----------------------------------
Bootloader
----------------
PLAT-66529 new Soft Chain Fuse bit for port 80 writes

Trusted OS
----------------
PLAT-67370, PLAT-67405: Promontory LP chipset support for CZN
PLAT-66529 new Soft Chain Fuse bit for port 80 writes
SWDEV-245870: [Mi200] Protect BL reserved SMN TLB
PLAT-66825: [TOS] Align the BL_TMR_INFO's address fields
PLAT-67400: [VRMR]: Correct the number of TMR slot
PLAT-65009 RN: Provide increment of SMC transaction status back to fTPM driver
DERMBE-231: Read from and write to USB configuration registers
DERMBE-233: [RMB] Update DMUB soft reset register
FEAT-33357: [NV21] [tOS] Trigger SMU to exit GFX-OFF before validating L0 and GFX_ON RAP validation

fTPM
-----
PLAT-65009 RN: FTPM wait for PSP Storage update completion before responding to TPM2_Shutdown

DRTM
-----
N/A

Release Version 0.11.0.59
-----------------------------------
Bootloader
----------------
LAT-67069: Fix MP0_OVERRIDE Register Definition Overlapping Issue
PLAT-66608: [RN] RPMC Enalbe Fail on SPI ROM
PLAT-60843: Add back the build change to sort linked files
PLAT-63504: [BOOTLOADER] Move PSP DRAM mapping after it is ready
PLAT-65714: [RPMC] Fix Root/HMAC Key Update Fail Issue

Trusted OS
----------------
PLAT-66652: Load MFD from secure DRAM region
SWDEV-244097:MI200 Update MAX_HD_LINK macro to support 128 link records
FEAT-33002: [Navi21],bug fixes for boot config feature
PLAT-67136: Set Recovery flag when booting from partition B
SWDEV-245982: fix TOS to return the error code during PDFW update sequence
PLAT-67012: [RMB] Update PSP only registers saved to MP2 SRAM
PLAT-60183: [RMB] Power gate CCP when MP0 is idle
PLAT-66136: [RMB] Add Z-state CCP register Save/Restore
SWDEV-245706 Remove vfgate auto-disable.
SWDEV-245704 Check CAP-loaded for all gest FW, including ones not in DFC.
SWDEV-245702 Stop clearing DFC immediately after it is loaded.
SWDEV-245701 Clear driver CAP binary for VF on VFGATE_ENABLE.
SWDEV-245699 Go back to using known-working MMHUB mapping function for DFC TMR.
SWDEV-245696 Fix setting of DFC-loaded flag for host-guest compatibility.
FEAT-33004: [NAVI21], support new GFX command to get set or invalidate
PLAT-66608: [RN] RPMC Enalbe Fail on SPI ROM
PLAT-66968: Trigger recovery in TOS when FAR enforcement fails loading modules
PLAT-66841: [RMB] Change MSMU instance used for MSMU save/restore
SWDEV-244739: [MI200] [tOS] Bug fix for searching into hashtable for whitelisted registers
RTGPLAT-4013: Navi21: Fix SMU timeout issue if main PMFW is not loaded
RTGPLAT-4013: Fix TMR address issue while updating USBPD update
RTGPLAT-4941: [RMB] Change MSMU scratch regs used for RLC info
PLAT-66133: Fix virtual address mapping in MSMU dRAM save
PLAT-60843: Add back the build change to sort linked files
SWDEV-244739: [MI200][tOS] Implement DrvSys RAS whitelist register access API Functions
SWDEV-245308: use feature specific build options in VGH / RMB
PLAT-65447: [RMB] Expand VCN TMR in PSP
DERMBE-206: Add check if RLC TOC is loaded before use
FEAT-33004: remove obsolete function.
SWDEV-242749: Fix for firmware coding standard (2)
FEAT-33001: Temporary commenting out SPI init until integration testing
SWDEV-244420:[Navi23] Use the right number of UMC channels

fTPM
-----
N/A

DRTM
-----
PLAT-66955: DRTM TA SPL value injection via TA property
PLAT-66830: DRTM TA minor code enhancement(debug/production version differentiation, error code optimization, address assignment optimization)


Release Version 0.11.0.58
-----------------------------------
Bootloader
----------------
SWDEV-243209: [NV21] Load Boot Config data in PSP BL

Trusted OS
----------------
FEAT-33001: Update SPI controller interface
SWDEV-233192: gAsicType = ASIC_VGH breaks GFX HMD
SWDEV-244681: [Mi200] Support for UMC GPU Fence register modifications
PLAT-61278: [VN] [HSP] PCR Measurements in tOS
PLAT-66342: [CZN] Wireless Manageability should not be enabled on non-pro SoCs
[RELEASE][Navi12][SRIOV] Release Version 00.18.00.56
SWDEV-241899: Generalize Hashtable Interface, Improve Internals & Map WL entries to WL-Hashtable
PLAT-66446: Enable_PRO_Check for FW to check and control L3 security feature
FEAT-33001: Read SPI FW through SMU IO interface
SWDEV-232438: Update TOS SDU for MI200 MP1 unlock
[RELEASE][MI200] Release version 00.27.00.58
SWDEV-242889: [NV21] Add further validation to driver TMR region creation
DERMBE-165: [RMB] Update GFX TOC FW IDs
SWDEV-243799: MI200 - Disable sharing of Topology for XGMI DPM

fTPM
-----
N/A

DRTM
-----
N/A


Release Version 0.11.0.57
-----------------------------------
** SPL table version 5.11.0.56 is included

Bootloader
----------------
PLAT-65714: RPMC separate status and response

Trusted OS
----------------
SWDEV-243807 Add DFC case to ResetIpFw().
PLAT-66297 Corrupted the entry 0x44/0x58/0x59 can't enter recovery mode
SWDEV-243808 Fix DRV_CAP alignment, must be 16 for CCP copy.
SWDEV-211109: [Mi200] Handle Sync Flood exeption as a result of DF Freeze
SWDEV-243799:MI200 Enabled loading and reloading of PMFW
SWDEV-228638: AMDSPI OS driver caused DRTM Failure in OS
PLAT-66135: Move Z9 entry message ack to start of handler
SWDEV-242868: [Mi200] Get RAS error inj permission from either mbx or GPIO
SWDEV-243591:[Navi22] Fix build flag for VCN1 TMR set up
SWDEV-240041: Removed typedefs due to coverity defects
RTGPLAT-4852: Navi22 Non-production enablement Navi22
PLAT-65823: FAR/SPL state check feature of DRTM Sequence
RTGPLAT-4852:[Navi22], fix number of TMZ index/data
RTGPLAT-4013: Navi21: Fix SMU timeout issue if main PMFW is not loaded
SWDEV-236998: Navi21: fix BSOD issue when copying FW from System memory to LFB
SWDEV-211107: [Mi200] Support mode1 reset
SWDEV-216591: Secure BIO - ISP FW authentication and loading
SWDEV-237329: [Navi 1x, 2x]: psp_os: Enable profiling for TOS
SWDEV-237329: [NAVI 1x, 2x]: psp_os: Add capability to profile TOS
SWDEV-241899: [MI200][tOS] Init register access whitelist binary
SWDEV-242924: [NV21] Enable STB support in TOS

fTPM
-----
N/A

DRTM
-----
PLAT-65823: FAR/SPL state check feature of DRTM Sequence
PLAT-64523: SMM Supervisor Production Key & SPL Enforcement

Release Version 0.11.0.56
-----------------------------------
Cancelled

Release Version 0.11.0.55
-----------------------------------
Bootloader
----------------
N/A

Trusted OS
----------------
RTGPLAT-4780:[Navi2x] Correcting the COMMON_COMPILE_TIME_ASSERT on FW ID table
SWCSD-1364: Fix issues reported by legal scan's tool
RTGPLAT-4780:[Navi2x] Add the missing FW ID table entry
SWDEV-216591: Secure BIO - ISP FW authentication and loading
PLAT-63640: [RMB][HSP] Add PCR measurements in TOS

fTPM
-----
PLAT-65812 RN: Fix for TPM vulnerability--non-orderly shutdown-failedTries

DRTM
-----
NA


Release Version 0.11.0.54
-----------------------------------
Bootloader
----------------
PLAT-64168: ROM-Armor ver2 for client - phase4
PLAT-63653 Properly serialize SPI commands

Trusted OS
----------------
PLAT-62057: Revert change in SaveMSMUdram
SWDEV-241508 Changed FW clear command to use actual FW size.
PLAT-65659: Access SECIP13 through SMN in kernel suspend
SWDEV-206580: Encrypted FW - use feature specific flags
SWDEV-241482: Add asic specific build option file
PLAT-62057: [RMB] Save MSMU dRAM contents on S0i3 entry
DERMBE-134: [RMB] Update MMHUB FID from 0x6 to 0x9
SWDEV-214033: TOCTOU in validation of GPU IP firmware enables loading unvalidated image data
PLAT-63431: Return SPL fuse value on query command from BIOS
SWDEV-241863: Fix compilation warning in SYS DRV for non-dGPU targets
PLAT-64921: [RMB] added new line to rmb_hw_regs.h
PLAT-64921: [RMB] Update register defines to LSD CL 1269420
SWDEV-241654: Revert non-volatile register types
SWDEV-241046: [MI200][tOS] Load register access whitelist binary
DERMBE-134: [RMB] Increase define for MAX_SDMA_FW_SIZE to 8320 DWORDs
DERMBE-134: [RMB] Update MMHUB FID from 0x6 to 0x9

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.53 (Not promoted)
-----------------------------------
Bootloader
----------------
PLAT-60317 : SUT not boot with ROM XM25QU128BH
PLAT-63845: [RN] Use RPMC fuse and BIOS command as condition to program RPMC Prod Root Key
PLAT-59100:[BOOTLOADER]fixed the compiling warning of type case

Trusted OS
----------------
TGPLAT-4707:[Navi23] Correct the MMHUB FID
RTGPLAT-4642: Navi22: Enable VCN1 in Trusted OS
PLAT-62746: Log agesa driver load status
SWLSD-12: Address concern of privilege escalation from Driver to tOS or DrvSys.
SWDEV-240325: [Mi200][RAS TA] Add RAS TA permission list based on KeyID
SWDEV-240041: Added in-line suppression for discussed errors
FEAT-32964: Send max number of VFs to TAs.
FEAT-32965: Adding new GFX command to get number of VFs from GIM driver
FEAT-32969: CLean up TA session context for specific Vfid:
SWDEV-232312 TOS saves CCXSEC MSMU dRAM to PSP private memory
FEAT-32964: Increasing MAX TA session from 16 to 32:

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.52 (Not promoted)
-----------------------------------
Bootloader
----------------
PLAT-64900: [BUILD] Revert "Make build identical on different environments"
PLAT-63500: [RPMC]Add BIT9 in HSTI to specify if RPMC SPI-ROM is avilable
PLAT-63843: [RN] RPMC Root Key provisioning at Manufacture
PLAT-60256: Fix SPL value fuse issue identified from FAR testing on Renoir

Trusted OS
----------------
PLAT-64900: [BUILD] Revert "Make build identical on different environments"
PLAT-63500: [RPMC]Add BIT9 in HSTI to specify if RPMC SPI-ROM is avilable
SWDEV-231923: Store HSP data when PSP enters to S0i3
PLAT-63843: [RN] RPMC Root Key provisioning at Manufacture
SWDEV-206580: Encrypted FW - use iKEK/tKEK in CCP LSB slot 4
PLAT-64785: [RMB] Re-enable interrupts on z-state exit
FEAT-32799: [Navi21] [tOS] Validate duplicated RAP registers across subsections
PLAT-64769: [RMB] Move BL2TOS mailbox SRAM location
SWDEV-240041: 7 Coverity Defect Fixes
PLAT-64836: "Change HDP flush register and add poll for completion"
FEAT-31759: [Navi21][tOS]Combine GC_INTERNAL_INDEX_DATA_PAIRS_SRIOV RAP w/ GC_INTERNAL_SRIOV RAP
PLAT-60256: Fix SPL value fuse issue identified from FAR testing on Renoir
PLAT-58012: Improve PSP's traces in smart trace buffer
PLAT-61976: [RMB] Restore VCN DPG RAM on Z9 VPB exit
SWDEV-239307: [NV21] Ensure SMU FW is loaded before sending GFXOFF disable/enable commands in debug unlock sequence
PLAT-63772: [RMB] Remove accesses to B0 RSMUs

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.51
-----------------------------------
Bootloader
----------------
PLAT-55947 : [RN_FP6] SUT not boot after set to Quad mode with ROM GD25LQ128D
PLAT-59100[BOOTLOADER]loads either MP2-SFH or MP2-I2C based on AMD PBS option
PLAT-61455: [BOOTLOADER] Trigger recovery when BIOS FW fails to load

Trusted OS
----------------
PLAT-64900: [BUILD] Revert "Make build identical on different environments"
PLAT-63500: [RPMC]Add BIT9 in HSTI to specify if RPMC SPI-ROM is avilable
SWDEV-231923: Store HSP data when PSP enters to S0i3
PLAT-63843: [RN] RPMC Root Key provisioning at Manufacture
SWDEV-206580: Encrypted FW - use iKEK/tKEK in CCP LSB slot 4
PLAT-64785: [RMB] Re-enable interrupts on z-state exit
FEAT-32799: [Navi21] [tOS] Validate duplicated RAP registers across subsections
PLAT-64769: [RMB] Move BL2TOS mailbox SRAM location
SWDEV-240041: 7 Coverity Defect Fixes
PLAT-64038 : Remove bad words from release notes
[RELEASE]: [Navi 10, 14]: PSPFW Release Version 00.1x.00.55
PLAT-64836: "Change HDP flush register and add poll for completion"
FEAT-31759: [Navi21][tOS]Combine GC_INTERNAL_INDEX_DATA_PAIRS_SRIOV RAP w/ GC_INTERNAL_SRIOV RAP
PLAT-60256: Fix SPL value fuse issue identified from FAR testing on Renoir
PLAT-58012: Improve PSP's traces in smart trace buffer
SWDEV-239359: [RELEASE] [Navi21] PSP TOS FW release version 00.21.00.51
PLAT-61976: [RMB] Restore VCN DPG RAM on Z9 VPB exit
SWDEV-239307: [NV21] Ensure SMU FW is loaded before sending GFXOFF disable/enable commands in debug unlock sequence
PLAT-63772: [RMB] Remove accesses to B0 RSMUs


Trusted OS
----------------
PLAT-64168: ROM-Armor ver2 for client - phase3
RTGPLAT-4197: Disable GFXOFF before starting debug unlock
PLAT-64417: [VN] ISP FW memory size reduction
RTGPLAT-4250: [Navi2x] Handle DF C-state change via PMFW
RTGPLAT-4301: [MMSCH], MMSCH init for VCN1
FEAT-32200: [Navi21] [tOS] [RAP] Validate index-data pair RAP
PLAT-64168: ROM-Armor ver2 for client - phase2
PLAT-64168: ROM-Armor ver2 for client - phase1
PLAT-64279 RN: Remove unused API DRV_SYS_CMD_ID_PRIV_SMI_SPI_READ_MC and the associated functions
PLAT-64248: [MVG] A bug in the Gfx-10 HW IP TAP_DELAYS & SE0_TAP_DELAYS mapping
SWDEV-237043:MI200 - Updated the SDMA FW destination size

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.50
-----------------------------------
Bootloader
----------------
N/A

Trusted OS
----------------
PLAT-63773: [RMB] Add RSMUs for CCX, DF, and UMC MSMUs to config
PLAT-63847: [RMB] Correct the MP0 unit ID bit positions in mmHUB TLB2 register
SWDEV-237624: TL print additional check
RTGPLAT-4500: fix Navi22 DrvSys build issue
SWDEV-237788 VFGATE: clear pending VF interrupt flag before interrupt re-enable.
PLAT-63481 VGH: Create Thread to Parse HSP Shared buffer contend
SWCSD-1364: Fix issues reported by legal scan's tool
PLAT-63629: Vangogh: Add support for SMU message to trigger RLC AutoLoad and RLC enablement
PLAT-63601: Update MP0_DFP_PGRAM_CPU_CNTL__PGFSM_MEM_SDDS* reg shift and mask definitions
SWLSD-12: Additional validation of pointers in kernel syscalls.
RTGPLAT-4105: Add missing header defines for MI-200/NV21
PLAT-61278: [VN] [HSP] PCR Measurements in tOS
RTGPLAT-4105: [Navi21] Add node ID to TMR fid
SWDEV-226358: Enable logging in TL in TOS

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.4F
-----------------------------------
Bootloader
----------------
N/A

Trusted OS
----------------
SWDEV-237050 Have NV12 change DF C-State directly as is done in NV10/NV14
PLAT-58331 verify singanture and add TMR protection to DMCUB
PLAT-63779: [VN] MMHUB spec AxUSER definition changed causes bad TMR mapping
SWCSD-1364: Fix Knoll code's license issue
PLAT-63635: Fix enforcing security policy on non-secure parts
Revert "PLAT-61974: [RMB] Skip switching DPM states in TOS"
SWDEV-235126: Do not fail the CVIP load query command.
SWDEV-229327: HDMI Certification HDCP 1.4 1A-08 item - Error
RTGPLAT-3982:[Navi2x] Add FW ID fields for Navi2x in header file
FEAT-30987: [Navi 21] bug fix for AC timing table
PLAT-63104: [RMB] Update Register Header

fTPM
-----
NA

DRTM
-----
PLAT-63484: Add support for version number display in BVM

Release Version 0.11.0.4E
-----------------------------------
Bootloader
----------------
PLAT-61966: [RN] Update PSP_BL_AMD_TEE_SHAREDDATA RpmcErrorCode Field
PLAT-61258: [BL][CZN]Verify CS-SEED fusing
PLAT-63450: [BOOTLOADER] Correcting CS-Seed test vector
SWDEV-220087: Fix Coverity issue - unused value

Trusted OS
----------------
PLAT-63362, PLAT-63361, PLAT-61707: Add CZN CS-SEED based keys (Promontory, Knoll)
PLAT-61966: [RN] Update PSP_BL_AMD_TEE_SHAREDDATA RpmcErrorCode Field
PLAT-60172: [RMB] Re-enable TMR, IOMMU, and Security Policy support for HSP-fTPM
SWDEV-230041 [Navi12][PSP] New command to clear up FW in TOC/TMR when VF driver gets unloaded
PLAT-60967: Re-enable RPMCSetConfiguration
PLAT-61278: [VN] [HSP] PCR Measurements in tOS
PLAT-63107: [VN] Save/Restore FMR registers in/from MP2 SRAM through S0i3
RTGPLAT-4253: Navi 1x: Check PGFSM power status before doing forced bank display
RTGPLAT-4253: Navi 1x: Add registers required for PG status checking
PLAT-62175: Prohibit to MMIO access 0xFED80D00-0xFED80DFF due to FCH security policy
SWDEV-235366: [NV12] VF Gating causes intermittent PSP hang
FEAT-30990: [Navi21], adding more permission for PPLIB TA
FEAT-31759: [Navi21][tOS][RAP] Validate 1VF L1 Policy
RTGPLAT-4316:[Navi2X] TMZ sequence for navi21 during GFX OFF exit

fTPM
-----
NA

DRTM
-----
NA



Release Version 0.11.0.4D
-----------------------------------
Bootloader
----------------
PLAT-60733: [RN] Initialize PSB fusing values from BIOS key token
PLAT-61856: Adapt new design for bios cmd for storage health

Trusted OS
----------------
RTGPLAT-4140: NV21- Replace Blank SRAM with TRNG for CCP clear
PLAT-60733: [RN] Initialize PSB fusing values from BIOS key token
SWDEV-234631:Trace log in TOS, call to integrate lib restore function
PLAT-61856: Adapt new design for bios cmd for storage health
SWDEV-230737 - Re-synchronize the PSP GFX Interface between PSP FW and GFX driver in swPSP
SWDEV-216591: Secure BIO - ISP FW authentication and loading
PLAT-62192: [VN] Expand TMR for VCN FW to 2MB and set separate TMR for VCN data
SWLSD-6 Pass VfGate pResp pointer inside of Buf[] array.
RTGPLAT-4128:[Navi23] Add Navi23 register headers and enable compilation
SWDEV-234173:MI100 - Apply changes for one VF mode
PLAT-63056: Add validation of parameters in kernel and DrvSys functions.
SWDEV-226358: Trace log in TOS: calling tl_print_s
SWLSD-6: Add validation of pDomain pointer for ECC point multiplication.
SWLSD-11, SWLSD-9: Fix address validation in DrvSys.
SWDEV-226306: TL 2.0, dump CLB in DRB
SWLSD-8: Fix issue in tOS where Drivers from inferior Trust Level can access System Driver stack.
SWDEV-226359: MP0 TRACE LOG, HDT command handler
PLAT-62185 VGH: Add functions for DRV_SYS_CMD_ID_MAP_SMN and DRV_SYS_CMD_ID_UNMAP_SMN
SWDEV-226754: Navi 1x: Indicate VBL to skip USB init in Mode 1 reset


fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.4C
-----------------------------------
BootLoader
----------------
PLAT-57221: [BOOTLOADER] Fix incorrect FwType in recovery BL
PLAT-61634: Enforce specific fw types validated by TOS
PLAT-62262: [BOOTLOADER] Add CZN signing
PLAT-62277: [BOOTLOADER] Support Cezanne bootrom layout

Trusted OS
----------------
PLAT-61634: Enforce specific fw types validated by TOS
FEAT-30991: [Navi21]Uncommenting permission bit for PPLIB TA permission check
FEAT-30992: [Navi21]: Adding new permission check for PPLIB SVC
FEAT-30991: Navi21: Adding new key ID for new PPLIB key
FEAT-31759: [Navi21]: [tOS][RAP] Apply 1VF L1 policy.
SWDEV-216591: Secure BIO - ISP FW authentication and loading
SWLSD-5: Fix fTPM issue introduced by bug in parameter cheks.
MERO-19 Add support for new Crypto Algorithms supported in CCP 12.0
PLAT-60553: Adds kernel API for tOS to enter into debug mode
PLAT-56608: Workaround for BSOD A006 issue
SWLSD-13: [Kernel] Restrict Svc_CreateUserThread() to System process.
SWDEV-228332: Enable CVIP security policy
SWDEV-220638: SWDEV-220798: Set GC AEB[56] = 1
SWDEV-226901: Navi21: Read VCN counters from VCN1's cache1 location
RTGPLAT-4244: Revert "PLAT-58139:[Navi2x] Support DF Cstate toggle via PMFW"


fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.4B
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
SWDEV-230950: [VGH] Pass HSP measurement to TOS
SWLSD-12:     Add validation of pointers in kernel syscalls
SWDEV-232689: Access violation reading CVIP carveout address
PLAT-57481:   Add Initial Z-state support
PLAT-60437:   [RMB] Remove unneeded RSMU ID from config
PLAT-60505:   PSP FW changes for GFX FLR
PLAT-61974:   [RMB] Skip switching DPM states in TOS
FEAT-30987:   [NV21] AC timing table, UMC reg read write
RTGPLAT-4010: [Navi2x] Clear asynchronous abort condition without handling the abort
PLAT-58139:   [Navi2x] Support DF Cstate toggle via PMFW
PLAT-61981:   VG EMU SECUREGFXOFF MP0 Write to TMR causes SyncFlood
SWLSD-5:      Fix S0i3 issue introduced by kernel parameter checks
SWDEV-233192: gAsicType = ASIC_VGH breaks GFX HMD driver

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.4A
-----------------------------------
*DRTM TA updated to version 04.11.00.13

Bootloader
----------------
PLAT-61003 Use ADS bit to locate SPI ROM specific UID

Trusted OS
----------------
PLAT-61843: [TOS] Add back support in PROM B550A
FEAT-30986: [Navi21]: AC Timing Table: copy AC table from TMR to TA
SWLSD-5: Add more address checks in tOS kernel.
PLAT-61322: Update security violation logging implementation
SWLSD-4: Fix possible TOCTOU issues in DrvSys interface.
PLAT-61412: Fix TOS initial DPM value
SWDEV-216591: Secure BIO - ISP FW authentication and loading

fTPM
-----
NA

DRTM
-----
Add STB (Smart Trace Buffer) support in DRTM TA

Release Version 0.11.0.49
-----------------------------------
Bootloader
----------------
PLAT-60967: Enable RPMC feature
PLAT-59673[DRTM]Feature disable with PSP-fTPM
PLAT-61266: [RN] Add option for BIOS to control RPMC
PLAT-61512: MP0 hard hang with status 80060000
PLAT-59883 : [RN] Add support for SPI ROMs that without enable QE in default.
PLAT-61517: [BL] Refactor headers and version management

Trusted OS
----------------
PLAT-59673[DRTM]Feature disable with PSP-fTPM
SWDEV-230017:MI200-Migration to LSD model
SWDEV-227728: [NV21] Apply ENTRY_TYPE_POLICY_GC_INTERNAL_INDEX_DATA_PAIR_SROIV security policy
PLAT-61511: [VGH] [tOS] Fix RLC TMR base address loaded to the RLC BootLoad Address h/w registers
PLAT-56608: Workaround for BSOD A006 issue
PLAT-60780: [RMB] Remove support for TMR, IOMMU, and DRTM sec policy
PLAT-60780[VN]Revisit TMR, IOMMU, Security policy for VN/HSP-fTPM
PLAT-61179: BSOD 0xEA occurred when running reboot
SWDEV-211101: MI200 TOS 4k Secure debug unlock support
RTGPLAT-3918: [RMB] Load MSMU Scratch Registers with RLC bootloader address/size
PLAT-61452: [RMB] Set asic type value
PLAT-61378: VG - Mismatch between PSPFW and PMFW loading USB PHY for USB1/2 instances
PLAT-58627[VN]-Add a new RevID for PRO part checking
PLAT-61154 VGH: PLAT-61155 VGH, Add function in sys_drv for DRV_SYS_CMD_ID_PRIV_GET_TPM_CONFIG and DRV_SYS_CMD_ID_PRIV_GET_DOORBELL_EVENT_HANDLE
FEAT-30985: [Navi21]: Share the TMR address of AC timing table with TOS
SWDEV-216591: Secure BIO - ISP FW authentication and loading
PLAT-61139 Skip CCX1/WLAN for secure policy
RTGPLAT-3852: [NAVI 1x]: drv_sys: Fix TOC TMR boundry TOC id based on latest TOC design
SWDEV-228334: Release the CVIP HW from reset.
SWDEV-231110: Remove CVIP FW load test code.
SWDEV-228317: Return actual CVIP Key usage flag.
RTGPLAT-4056: Navi22: Add register headers for Navi22


fTPM
-----
NA

DRTM
-----
N/A


Release Version 0.11.0.48
-----------------------------------
*DRTM update to 4.11.0.12
*fTPM update to 3.42.0.5

Bootloader
----------------
PLAT-60919: PSP incorrectly to clean status on FCH::PM::S5_RESET_STATUS register.
PLAT-60451: Skip MMHUB enablement with iGPU disabled

Trusted OS
----------------
SWDEV-227305: Updating release TMR flag when sending USB PD FW via I2C
PLAT-61264 Remove SKINIT SLB DMA Protection after DRTM launch
SWDEV-228334: Release the CVIP HW from reset.
SWDEV-221737: [SRIOV] [NV12] [AWS] Add support for host compatibility and guest capability features.
SWDEV-229688: MP0 trace log,updating TL init to match TL lib
SWDEV-229408: Ignore Coverity parse error on mailbox_blbros.h
SWDEV-230347: addressing warnings for Disabling UUID search in DLM printf
PLAT-56326: Manage 16MB DRAM space for HSP, DRTM and SKINIT
PLAT-60891: AEB_BLOCK_UPDATE bit has to be clear before unlock MP2
SWDEV-230347: Disable UUID search in DLM print if MP0 Trace Log is disabled
SWDEV-228324: Develop TOS handler for the SMU_PSP_CVIP_POWER_ON message
SWDEV-228335: Complete the CVIP Firmware Load Status Polling API

fTPM
-----
Modify FTPM Makefile to add FW version and type in PSP Fw Header and to correct the Signing function used for RV

DRTM
-----
PLAT-61264: Remove SLB DMA protection after DRTM Launch to help DRTM Stability issue.


Release Version 0.11.0.47
-----------------------------------

Bootloader
----------------
[PLAT-60385] Fix Hard-Coded Index in UMC

Trusted OS
----------------
SWDEV-216591: Secure BIO - ISP FW authentication and loading
PLAT-58717: Disable mp0 power gating feature
SWDEV-216591: Secure BIO - ISP FW authentication and loading
LWPQA-204: Add key tokens for mi200 pre-si signing
SWDEV-228324: Develop TOS handler for the SMU_PSP_CVIP_POWER_ON message
PLAT-60953: [RMB] Update registers for PPR 0.14
SWDEV-228833: GFX10 SR-IOV: Add MEC ucode version to CP address space
[RELEASE] [NAVI 10] PSPFW Release Version 00.10.00.47
SWDEV-216591: Secure BIO - ISP FW authentication and loading
SWDEV-227677: Modify tOS kernel reset sequence to allow DRAM to be not one-to-one mapped.
SWDEV-226303: MP0 Trace Log: Adding link to tl_lib for NV21
SWDEV-229688: MP0 Trace Log: calling TL init-deinit in drv sys
PLAT-60960: Expose API for putting trace in smart-trace buffer

fTPM
-----
NA

DRTM
-----
N/A


Release Version 0.11.0.46
-----------------------------------
* L0 Security policy is updated to B.9.0.75
* L1 Security policy is updated to B.9.1.75
* DRTM is updated to 4.11.0.11

Bootloader
----------------
[BOOTLOADER] PLAT-60842 Remap entire SRAM before jump to TOS
PLAT-60843: [BUILD] Make build identical on different OS

Trusted OS
----------------
PLAT-60843: [BUILD] Make build identical on different OS
PLAT-58942 SMM Isolation Support
[PLAT-58508]Update structure SUSPEND_DRAM
PLAT-60695: [TOS] Remove support for PROM/PROM LP
PLAT-60855: [TOS] Add APOB/APCB signing/validation service (WIP)
PLAT-59472 - [RMB] TOS Initialization (Phase-1)
[PLAT-58508]Update structure UMC_STATE_INFO with macro UMCCH_MAX_NUM
SWDEV-216591: Secure BIO - ISP FW authentication and loading
PLAT-54423: Enforce ROM-Armor policy on S3/S0i3 resumes
SWDEV-226356: MP0 Trace Log: Reading Source ID from UUID
[SWDEV-228330] TOS CVIP Carveout Use Preparation
[SWDEV-228327] CVIP SRAM Initialization - Crack the CVIP FW Image
SWDEV-228377:MI200-TOS: RSMU MMIO Start address modified
SWDEV-228315: Shift new TLB value for SMNv13 support 8-bits hops count in SMN TLB
SWDEV-216591: Secure BIO - ISP FW authentication and loading

fTPM
-----
NA

DRTM
-----
PLAT-58942 SMM Isolation Support.


Release Version 0.11.0.45
-----------------------------------
Bootloader
----------------
N/A

Trusted OS
----------------
Revert "SWDEV-227677: Modify tOS kernel reset sequence to allow DRAM to be not one-to-one mapped."
SWDEV-226306: Trace Log in TOS - support copy of CLB to DRB
SWDEV-228329: MP0 Trace Log: Adding verbosity level to Drv_Sys DLM print
[SWDEV-228781] Structure for HSP messages should be packed

fTPM
-----
NA

DRTM
-----
PLAT-59467: Report ACPI device in IVRS table during DRTM boot

Release Version 0.11.0.44 (Rejected)
-----------------------------------

Bootloader
----------------
[PLAT-58508]Update UMC Configuration
[BOOTLOADER]PLAT-60374 Add the Error logging when triggered the recovery mode
[BOOTLOADER]PLAT-59782 Pass TPM selection info from BIOS -> ABL -> PSP

Trusted OS
----------------
SWDEV-216591: Secure BIO - ISP FW authentication and loading
SWDEV-225191: enable External aborts for Navi 1x platform
SWDEV-227305: Updating release TMR flag when sending USB PD FW via I2C
[SWDEV-221391] Pass the CVIP carveout from BL to tOS
RTGPLAT-3917: [MVG] PSP needs to load MSMU scratch registers with RLC bootloader address/size
SWDEV-227728: Populate only mismatch information in RAP output_param.
PLAT-60547: [VGH/VN] [tOS] Modification of the TMR physical address conversion from the GPU virtuall address
SWDEV-227437:MI200-TOS: Enable MMHUB initialization for MI200
SWDEV-227677: Modify tOS kernel reset sequence to allow DRAM to be not one-to-one mapped.
RTGPLAT-2717: clear external aborts on Navi 1x
[TOS] PLAT-60379: Storage thread to use kernel event
PLAT-59467: Report ACPI device in IVRS table during DRTM boot.
RTGPLAT-3851: XGMI: Ensure that current Die is not Node Fenced on Mem Sharing Disable
FEAT-30961 [Vega10][SRIOV][Azure] Report last-attempted driver version in VF_GATE status response.
PLAT-60471: [VGH/VN] bug in RSMU ID definitions

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.43
-----------------------------------

Bootloader
----------------
N/A

Trusted OS
----------------
PLAT-60371: S4 suspend fails after S0i3 resume
PLAT-58150: [VMR]: RAS: Handle TWIX errors in Trusted OS
PLAT-58154: [VMR]: RAS: MBAT Re-init for power gated NBIO/PCIe instances
[TOS] PLAT-58798: Allow MP2 FW to write to PSP storage
[SWDEV-206589] support for IP FW loading
FEAT-29971: retiring MPV unlock and xgmi reg list for non prod mode
SWCSD-1364: Legal scan for Renior release to customer
PLAT-57915, PLAT-57917: Fix tOS kernel issue that migh cause race conditions between threads.
[SWDEV-206589] [tOS] Support for IP FW loading

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.42
-----------------------------------
* PLAT-59351 Update CCP HAL library for new SHA engine

Bootloader
----------------
N/A

Trusted OS
----------------
PLAT-59983 - Avoid DRTM TMR setup range check with SMM TSEG region
FEAT-30956:[Navi2x] Remove APCC register save/restore from PSP
[PLAT-58736] Rev Header version in Headers for TOS and DRVSYS

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.41
-----------------------------------

Bootloader
----------------
PLAT-59615 Fix Index out of Bound Issue in RPMC
[PLAT-58736] Update offset of FwType field in PSP signing header
[PLAT-59075] Add test mode for anti rollback feature

Trusted OS
----------------
[TOS] PLAT-57225: Disabling late DF security policy
PLAT-58665: System hangs when resuming from S0i3, when VBS enabled
[TOS] PLAT-57939: Fix Crossfire enablement
FEAT-30095: non prod TA Key ID
RTGPLAT-3763: PSP should respond to RESET command from PMFW
PLAT-56411: Enable enforcing of DF & FCH security-policies

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.40
-----------------------------------
* L0 Security policy is updated to B.9.0.74
* L1 Security policy is updated to B.9.1.74
* DRTM is updated to 4.11.0.F

Bootloader
----------------
PLAT-58094 Provision RPMC with temporary root key
[BOOTLOADER]PLAT-59185[RN] BIOS in ROM2 32M support (case 4)
[BOOTLOADER] Remove unnecessary header include
SWCSD-1364: Legal scan for Renoir release to customer

Trusted OS
----------------
SWDEV-222509:[Navi2x] Update the DMCUB sequence as per DMCUB_design_spec
RTGPLAT-3688:[Navi2x] Save the APCC tuning register values for later restore
SWDEV-221891: [TOS] Handle command GFX_CMD_ID_SAVE_RESTORE for GFX_FW_TYPE_VCN1
SWDEV-219157 - MI100 TMR: mGPU Address Calculation and FabricID Update
SWDEV-224787: Use of pCmd in CVIP Load Thread crashes the code.
RTGPLAT-3571: Navi21: Remove size check for VCN RAM firmware
RTGPLAT-3522: Navi21: Move DRAM accesses before reset by SMU
PSP-2626: Updating PSP 10 Secure OS.

fTPM
-----
NA

DRTM
-----
PLAT-58191- IOMMU hand-off / configuration deficiencies during DRTM Secure Launch + DMAr disabled fix


Release Version 0.11.0.3F
-----------------------------------

Bootloader
----------------
[BOOTLOADER] PLAT-59196: Remove programming of GPIO21/22
[BOOTLOADER] PLAT-56684 Decrease Key DB SRAM region size
[BOOTLOADER] PLAT-57929 Fix FRA-unlock issue
[BOOTLOADER] PLAT-58708 - Program SPI mode and speed in A/B recovery
[BOOTLOADER] PLAT-58456 - [RN] Load VBL in recovery mode
[BOOTLOADER] PLAT-56658 Prevent address from returning as error from syscall

Trusted OS
----------------
RTGPLAT-3565: The TMR region setup return status must be validated
PLAT-58798: Add Mp2-to-PSP mailbox
[TOS] PLAT-58567: Add Support for CS2019.B Promontory
PLAT-59025: Release other TMRs before MP0 TMR in DestroyTmr()
PLAT-58996: [VGH] [tOS] Update conversion virtual-2-physical addresses base registers for TMR
FEAT-30093: Navi21: Implement non production APIs
PLAT-58996: [VGH] [tOS] Update conversion virtual-2-physical addresses base registers for TMR
RTGPLAT-3597: Navi1x: Fix ROS0 toc size to align to 64KB
PLAT-58991: Allow BIOS cmds without parameters
RTGPLAT-3597: Navi1x/2x: Align the size of RWS section to 64KB
RTGPLAT-3597: Navi: Fix TOC TMR boundry TOC id based on latest TOC design

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.3E
-----------------------------------

Bootloader
----------------
[BOOTLOADER] PLAT-58787: Stagi1 BL - System can't resume from S0i3 on 32MB BIOS
[BOOTLOADER] PLAT-58957: Remove PEI validation on s0i3
[BOOTLOADER] Improve SMN single-access functions

Trusted OS
----------------

FEAT-30094: NV21: update access permission for Non Production Trusted OS mode
SWDEV-223228: [DRV_SYS] Provide finer grainer debug info to better facilitate Security Policy debugging capabilities
RTGPLAT-3522: Navi21: Clear pending security violations before jumping to Bootrom.
[SWDEV-223509]MI200:TOS-Update SMU-13 Public/Private CRU based on LSC+
Revert "PLAT-58139: Navi21: Support DF Cstate toggle via PMFW in Trusted OS"
[SWDEV-223417]MI200:TOS - Support for SDMA[0-4] FW load in TOS
RTGPLAT-3551: [TOS] Skip SMU FW load if system exited from BACO/BAMACO
PLAT-58744: [VRMR]: Windows restart fails with data abort
RTGPLAT-3471: Navi21: Fix extracting of SMU command in mode1 reset sequence
PLAT-58191- IOMMU hand-off / configuration deficiencies during DRTM Secure Launch
FEAT-27282 [Navi12][VG10][SRIOV] MARC_0 Register programming.
PLAT-58788: TOS: Fix the register addresses of BLOCK_CPU
PLAT-58696: [VMR]: Fix the build warnings in the amd-tee2.0
PLAT-58755: Update tOS build procedures in accordance with the new FWType field and values
RTGPLAT-58427: Renoir: Added detection of major revID 0xE for DRTM feature verification
FEAT-29979 - SR-IOV: Disable VMR for GFX 10 SR-IOV products
SWDEV-217840: [VGH] AMD ROM Armor

fTPM
-----
Rebuilt with updated library, no code changes.

DRTM
-----
NA


Release Version 0.11.0.3D
-----------------------------------

Bootloader
----------------
PLAT-58405: Workaround for PKG_TYPE lost

Trusted OS
----------------
RTGPLAT-2776:[Navi2x] Load DMCUB to the TMR region set by PSP BL
SWDEV-216603: Asynchronous CVIP FW loading.
RTGPLAT-3307:[Navi2x] Clean reset of DMCUB when loaded from tOS
SWDEV-222554: Create Cvip FW variants of PSP IP FW download functions
SWDEV-214037: NCC: checking Process permission before accessing kernel syscalls
PLAT-58012: Add smart-trace-buffer (aka Mp2-trace) with MP0 traces
PLAT-54423: [RN] ROM-Armor feature
PLAT-58139: Navi21: Support DF Cstate toggle via PMFW in Trusted OS
PLAT-58152: [VMR]: RAS: MP1 Fatal Error Handling
PLAT-52750: Add support for RSMU configuration for Vermeer

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.3C
-----------------------------------

Bootloader
----------------
[BOOTLOADER] PLAT-56060 Fix fusing code in PSP BL
[BOOTLOADER] Refactor serial print function
[BOOTLOADER] Port Coverity Dead Code Fix
[RMB] Add ASIC Type for Rembrandt

Trusted OS
----------------
PLAT-55003 - [amd-tee-api-lib] Update DRV_PARAMS to match the size of SYS_DRV_PARAMS
PLAT-58429: Destroy-TMR a GFX cmd should not release all TMRs allocation
RTGPLAT-2679: Navi21: Update mininum bootloader version for debug unlock support
RTGPLAT-3423: Navi21: Set VCN unitid for VCPU instruction fetches
RTGPLAT-3457: [Navi21] [TOS] Set MP1_FW_OVERRIDE.AEB_BLOCK_UPDATE upon BACO entry
PLAT-57938 Support Recovery mode for DRTM
SWDEV-207563 - NV21 SRIOV: VCN VF FW Loading in TMR
RTGPLAT-3415: Navi21: Fix data type of RsmuId variable
[TOS] MERO-441 Add support for TA to determine the caller interface (TEE vs. TEE2)
FEAT-30115 - NV12 SRIOV: Clear GFX/MM Load Vectors during VF FLR
PLAT-58163: [VGH] [tOS] [ BL] Adopt TMR registers h/w changes.
SWDEV-220649:[VGH] HSP interface support
PLAT-58163: [VGH] [tOS] [ BL] Adopt TMR registers h/w changes.
PLAT-58163: [VGH] [tOS] [ BL] Adopt TMR registers h/w changes.
RTGPLAT-3252: fix PnP issue on Navi 1x
SWDEV-219857: NV21/MI100/MI200 Clear dgpu encryption keys if enabled
SWDEV-207563 - NV12 SRIOV: VCN VF FW Loading in TMR
SWDEV-216603: Skeleton implementation of asynchronous CVIP FW loading.
PLAT-57655: [TOS]: [VRMR]: Enable applying of the late DF policy
RTGPLAT-3386: Navi21: Add support for SE tap delay firmware type
FEAT-29637: [tOS] RAP TA SVC call backs in TOS System Driver

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.3B
-----------------------------------

Bootloader
----------------
[BOOTLOADER] Fix stage1 bootloader build

Trusted OS
----------------
SWDEV-216605: Add new Gfx-to-PSP API for asynchronous CVIP FW loading.
[Mero] Fix compiler warning due to change 310284 in smu_mailbox

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.3A
-----------------------------------

Bootloader
----------------
[BOOTLOADER] Fix modulus copy buffer overrun
[BOOTLOADER] Free LSB slots in CryptoShaFromLsb
[BOOTLOADER]PLAT-57760: Fix boot mode detection
[BOOTLOADER] PLAT-55651 - Remove L2 BIOS directory loading in recovery
[BOOTLOADER] PLAT-57622 Resolving Coverity scan errors
[BOOTLOADER] DESPCPSP-59:Add FT5 package type definition for Pollock.
[BOOTLOADER] PLAT-56684: Remove unnecessary global buffer
[BOOTLOADER] PLAT-56302 MP2 needs power gating on RN AM4
[BOOTLOADER][TOS] PLAT-53198 - [RN] Skip RSMU interrupt for CLKB registers when iGPU is disabled
[BOOTLOADER] PLAT-57229: Resolve Coverity Errors for NULL Pointer Dereferences

Trusted OS
----------------
PLAT-58007: Integer Overflow in SMI INFO in BIOS command handler
SWDEV-218805 - NV12 SRIOV: L1 Policy Update for 1VF Mode
[PLAT 57915, PLAT- 57917] Add mutex logic and 2-retry on IP FW signature validation failure
PLAT-52749: [TOS]: [VRMR]: Add support for Secure Debug Unlock for Vermeer SoC
[Mero] Glitch attack mitigation - Cold reset message to PSP from MP1
PLAT-57707: ACP change to not hinder SMN adjustment
PLAT-56502 [RN] - System Reboot during DRTM sequence due to TMR violation
SWDEV-218550: Refactor hashtable to maintain RO & RW whitelisted registers for both MGPU & SGPU in a single unified hashtable for loop-back testing
[TOS] FEAT-29639 - Add support for Wireless Manageability
[213882]MI200:TOS: Add support for VCN 0 and VCN 1 RAM commands for GPU PA programming
RTGPLAT-3200: drv_sys: Palamida scan: Use standard AMD copyrights
Add initial support for building RMB
PLAT-57343 Renior AM4 can't power on with PT B550A(0x43D1)
PSP-3521: Complete implementation of TA-to-TA communication.
RTGPLAT-3284: Navi21: Add support for TOC version #6
NV PORT of FEAT-29964 [Vega10][SRIOV][Azure] SRIOV Mailbox Gating
[SWDEV-213847]MI200:TOS-Updated Fabric ID for MMHUB settings
MERO-298 Add support for Keep-Alive TA property
PSP-3521: Handle TA parameters in TA-to-TA communication.
SWDEV-219199 - NV12 SRIOV: VMR Setup Size Verification
[SWDEV-213847]MI200:TOS-Add support for TMR fencing
RTGPLAT-2776:[Navi2x] Enable DMCUB firmware load from SYS DRV
PLAT-57205: TOS: Remove firmware validation using Root key in Trusted OS
PLAT-57202: TOS: [VRMR] Add members to AMDTEE mailbox
PLAT-57421: [Renoir] Limiting KVM feature to Ryzen Pro OPNs
PLAT-53905:[VRMR] Add support for Unwrapping Promontory Key
SWDEV-215018 Support for CCP SECIP13
SWDEV-218885: [NV21] Enable XGMI APIs for MCM builds
PSP-3521: Handle TA parameters in TA-to-TA communication.
SWDEV-218885: [NV21] Enable XGMI APIs for MCM builds
SWDEV-218807 - NV12 SRIOV: Revert VDDGFX Section on Debug Unlock
[SWDEV-218783]MI200:TOS Implement legacy RSMU AEB settings
RTGPLAT-3213: PSP-TOS: Palamida scan: Fix files without copyrights
RTGPLAT-3214: TOS: Palamida scan: Use standard AMD copyrights
[PLAT-57281] Add drv_sys function to access RSA CcpModExp directly
[TOS] Update for CCP HAL SHA changes
PLAT-56164: Set default DPM level of all threads to low.

fTPM
-----
Added  Mutex logic to acquire and use mutex shared with system driver

DRTM
-----
Initial production release


Release Version 0.11.0.39
-----------------------------------

Bootloader
----------------
[BOOTLOADER] Fix CCP double LSB slot allocation
[BOOTLOADER] PLAT-56090 AB Support directory addr mode 2 in stage1 BL
[BOOTLOADER] PLAT-57038 Support new layout for PSP in ROM 1 and BIOS in ROM2
[BOOTLOADER] PLAT-57159 System can't resume from S0i3 on 32 MB BIOS
[BOOTLOADER] Resolve Coverity Errors - Unnecessary Headers(HFA)
[BOOTLOADER] Remove Deadcode in InitDataScrambleKeyAllUmc
[BOOTLOADER] Resolve Unused value Coverity Errors
[BOOTLOADER] Use constant-time memcmp when comparing HMAC
[BOOTLOADER] PLAT-57015 Refactor ValidateOEMPublicKey in PSP BL
[BOOTLOADER] Fix buffer overflow in key derivation
[BOOTLOADER]PLAT-56498: Implement reset-based legacy recovery
[BOOTLOADER] Fix crypto cache maintenance bugs
[BOOTLOADER] PLAT-56606: Add support for legacy compression
[BOOTLOADER] PLAT-55776: Implement Svc_SetBixbyInfo
[BOOTLOADER]PLAT-54956: Enable SMU paging from ABL

Trusted OS
----------------
RTGPLAT-3155: TOS: Palamida scan: Strip out internal amd server URL
RTGPLAT-3214: use AMD standard copyright
PLAT-56922: PlayReady test is failing post S4 wakeup on Renoir
PLAT-56164: Rename PlayReady APIs to HW DRM
RTGPLAT-2179: [Navi1x]: Implement new command to read USB-PD firmware from LFB
RTGPLAT-2179:[NV1X]: Apply TMR fence for USB-PD firmware
RTGPLAT-1901: Navi21: Add support for PM firmware load in trusted OS
RTGPLAT-3090: Navi21: SMNIF TLBs restore as part of mode1 reset sequence in trusted OS
RTGPLAT-3168: Fix memory leak in Usbpd_GetFwVersion
RTGPLAT-2179: [Navi21]: Enable USB-PD for Navi21
FEAT-29981 [Vega10][SRIOV][Azure] Support for driver capability table (CAP). Front-door loading support and encoding
PLAT-56741: Update failure in PSP on S0i3 resume to SMU
RTGPLAT-2179: implement get USB PD FW version from device over I2C
RTGPLAT-2179: Implement system call to map system memory
RTGPLAT-2179: Use memory type in Mmhub map function
RTGPLAT-2179: [NV1X]: Trigger USB-PD firmware update
RTGPLAT-2179: [NV1X, NV2X]: Interface to receive command from external host tool
RTGPLAT-2179: update the PD update sequence as per PD device vendor recomendation
RTGPLAT-2179: Move "AsciiToDec" function to utilities.c file
RTGPLAT-3091: Use ASIC specific definition for address of GCMC_VM_FB_LOCATION_BASE register
SWDEV-21388 - MI-100: VCN1 TMR Offset Update
FEAT-29972 - MI-100 SRIOV: MMSCH-PSP Communication for VCN0/VCN1 FW Loading in TMR
PLAT-56164: Performance optimization of PlayReady transcription
PLAT-56164: Rename PlayReady APIs to HW DRM
RTGPLAT-2937: MI-100: Update XGMI Topology constraints for 8P
[TOS] Fix a bug in TeeOpenPersistentObj
SWDEV-213008: Add support for SMU13 SoC in managing SMN TLBs

Release Version 0.11.0.38
-----------------------------------

Bootloader
----------------
[BOOTLOADER] Load iKEK from L1 directory

Trusted OS
----------------

PLAT-56164: Add Playready specific SysDrv API calls.
PLAT-56505: MP0CLK DPM Updates
PLAT-56424: Update PSP to SMU mailbox interface in TOS
PLAT-56500: [tOS] AMD-TEE 2.0 tOS versification
FEAT-29976 - MI-100 SRIOV: VCN0/1 FW Loading in PF TMR for PF/VF
PLAT-53903:[VRMR] Add support for PCIe Gen4 enable/disable
RTGPLAT-2179: [NV1X]: Fix multi-byte read issue
PLAT-52328 - RN - DRTM support in PSP tOS
SWDEV-213882 : MI100: add support for VCN1 RAM programming
FEAT-29974 - MI-100 SRIOV: TMR Fence Configuration for VCN0, VCN1, MMSCH
RTGPLAT-2174: Navi21: Add support to load VCN firmware on VCN1 PF instance
SWDEV-207568: Navi21: XGMI TA enhancements and topology support in GIM
RTGPLAT-2174: Navi21: Add support for RAM1 firmware for VCN1 PF instance.
DIAG-6427: MI-100/MI-200/Navi2x - xGMI TA to support xGMI loopback registers accesses
[tOS] Fix tOS to BL mbox bug
PLAT-56243: PSP FW accessing Invalid RSMU address


Release Version 0.11.0.37
-----------------------------------
*rsmu_sec_policy.rn_L0.sbin reverted to version: B.9.0.4C*
*rsmu_sec_policy.rn_L1.sbin reverted to version: B.9.1.4C*

Bootloader
----------------
PLAT-56170 Program GC RSMU Timeout

Trusted OS
----------------
PLAT-56175: Fix error in response to BIOS cmd
SWDEV-195709: [tOS] Trusted OS: DRAM reserved space for MP0 Trace Buffer
PLAT-52747: TOS: [VRMR]: Add S3 support in amd-tee2.0
PLAT-56175 : [tOS] Fix error in response to BIOS cmd
[TOS] RN: Enter Safe Idle mode in S0i2.X

Release Version 0.11.0.36
-----------------------------------
*Legacy & A/B Recovery Enabled*
*DRTM Disabled*
PLAT-55841 - Revert Security Policy 53 to 4C
*rsmu_sec_policy.rn_L0.sbin reverted to version: B.9.0.4C*
*rsmu_sec_policy.rn_L1.sbin reverted to version: B.9.1.4C*

Bootloader
----------------
[BOOTLOADER] PLAT-56065 - Disable RPMC Availability
[BOOTLOADER] Separate debug unlock and boot loader builds
[BOOTLOADER] Prevent reading past L1 table
[BOOTLOADER] Add function to simplify loading RSA Key components
[BOOTLOADER] Load soft fuse in recovery
[BOOTLOADER] PLAT-55065 Add BUILD_APU_CPU compile flag

Trusted OS
----------------
SWDEV-211148: Bug in TLB Address Calculation on MCM GPUs
[TOS]PLAT-56007: New SMU message for ACP SMA DMA Completion
PLAT-53906: TOS: [VRMR]: Fence register programming
PLAT-55765: [tOS] Cleaning static TMR allocation.
PLAT-54423: ROM-Armor feature implementation (phase-3)
SWDEV-211102 - MI-200 - Add MI-200 Asic Type
[TOS] Add BIOS CMD handler to set active partition
[PLAT-55003] Increased size of DRV_PARAMS to match up with SYS_DRV_PARAMS
[TOS] Update BIOS to PSP mailbox interface
[TOS] Notify BIOS of recovery state
FEAT-29047: [Navi21] Enable TOS support for XGMI use cases
SWDEV-214476: MI-200 TMR MMHUB1 FID Update
[TOS] Add definitions for A-B recovery
[TOS] Run scheduler if interrupts are handled
PLAT-55765: [tOS] Cleaning static TMR allocation.
[TOS] PLAT-54301 Initialize Current Timestamp
Address Coverity Issues for PDS Feature

Release Version 0.11.0.35
-----------------------------------
*A/B Recovery Enabled*
*DRTM Enabled - added dr_drtm_prod_RN.csbin version: 4.11.0.C*
PLAT-55653 - [RN] Security Policy v53
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.53*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.53*

Bootloader
----------------
[BOOTLOADER] PLAT-55651 - TEMP: Load L2 BIOS directory on Recovery
[BOOTLOADER] Remove incomplete type references
[BOOTLOADER] PLAT-53166 - Enable PSP debug print flag support
[BOOTLOADER] Notify tOS of SBIOS Layout
[BOOTLOADER] Recovery fixes/improvements
[BOOTLOADER] PLAT-53665 Save/Restore spi-controller registers on S0i3 resume
[BOOTLOADER] Add L2 directory table check
[BOOTLOADER] Disable port80 write until initialized

Trusted OS
----------------
PLAT-55507 - PSP to unhalt SDMA on S0i3 resume
[TOS] Bug fix when initalizing persistent object
PLAT-54423: ROM-Armor feature implementation (phase-2)
SWDEV-214476: MI-100 TMR Setup - Update MMHUB Fabric ID Values
SWDEV-209874 - MI100 SRIOV: Remove BACO Exit Check on SMU FW Loading
PLAT-55343: PSP to not unhalt SDMA
PSP-3515 - Address Coverity issues for tOS.
PLAT-54423: Build fix for VRMR
SWDEV-206584: [VGH] [tOS] Basic initialization
PSP-3521: implement TEE calls for TA-to-TA communication.
SWDEV-214035: MI200: compiling TOS for MI200
RTGPLAT-2177: Navi21: Update TMR_BASE_NEXT_OFFSET
[TOS] Implementation to save persistent object to NVRAM
PLAT-54423: ROM-Armor feature implementation (phase-1)
SWDEV-211148: MI200: adding hops to current smn functionality
PLAT-55278: [RN] Bug in RSMU Security Violation logging
PLAT-52542: TOS: [VRMR]: Support for HT/privileged address range in Secure Kernel
PLAT-52542: TOS: [VRMR]: Enable Syshub Support
PLAT-52471: TOS: [VRMR]: SMU-PSP and PSP-SMU message ID support
[TOS] RN: Skip ISP RSMU interrupt enablement
SWDEV-206584: [VGH] [tOS] Basic initialization
RTGPLAT-2823: drv_sys: Don't enable USB D-state handling in TOS while BACO exit

Release Version 0.11.0.33
-----------------------------------
*dr_ftpm_prod_RN.csbin updated to version: 3.27.0.5*
PLAT-55105 - [RN] Security Policy v2D
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.2D*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.2D*

Bootloader
----------------
[BOOTLOADER] PLAT-54920 Fix RPMC-related S3/S0i3 resume regression
[BOOTLOADER] Trigger recovery on SVC_LoadXXX calls
[BOOTLOADER] S0i3 disable DF C-state for DF access
[BOOTLOADER] PLAT-55002 - Skip DRAM Checks when booting from SPI-ROM
Revert "[BOOTLOADER] TEMP: S0i3 resume skip wait for SMU DRAM response"
[BOOTLOADER] Enable A-B recovery

Trusted OS
----------------
SWDEV-207560 - NV2x SRIOV: PF FLR Enablement
MERO-20: Implementation of Persistent Objects in tOS.
PLAT-52467: TOS: [VRMR]: Do not initialize GFX mailbox registers
PLAT-54887: TOS: [VRMR]: Enable port 80 support for logging
MERO-20: Implementation of Persistent Objects in tOS.
PLAT-53209: "[CZN] MP0_C2PMSG_ATTR_1 is not programmed correctly"
SWDEV-206584: [VGH] [tOS] Basic initialization
PLAT-52468: TOS: [VRMR]: BIOS-PSP mailbox handling
PLAT-52659: TOS: [VRMR]: Bootloader to Trusted Os mailbox
PLAT-52466: TOS: [APU/CPU]: Introduce APU_CPU build flag
PLAT-52466: TOS: [VRMR]: Support for Vermeer Soc: Build Macro
PLAT-52466: TOS: [VRMR]: Support for Vermeer Soc: Compilation support

Release Version 0.11.0.32
-----------------------------------
*dr_ftpm_prod_RN.csbin reverted to version: 3.25.0.5*
GC change will not be applied to security policy:
PLAT-53660 - [RN] GC instance of VM_IOMMU_CONTROL_REGISTER.IOMMUEN not set on secured part
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.4B*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.4B*

Bootloader
----------------
[BOOTLOADER] Skip storing debug prints in buffer when disabled
[BOOTLOADER] PLAT-53182 Fix LoadAPOB source address
[BOOTLOADER] Late apply of DMU security policy
[BOOTLOADER] Serial IO redirection based on environment
[BOOTLOADER] PLAT-52328 - RN - DRTM support in PSP BL

Trusted OS
----------------
SWDEV-210896: MI200: adding register definition
SWDEV-210896: MI200: adding build flags for MI200
PLAT-52328 - RN - DRTM support in PSP tOS
SWDEV-211102 : MI200: Adding ASIC type
RTGPLAT-2679: [TOS] Enable Secure Debug Unlock in Navi 21
RTGPLAT-2713: [TOS] Define TMZ index and data registers for Navi 21
RTGPLAT-2249: Navi2x: Change for 8KB bootrom table for mode1 reset.
RTGPLAT-2249 : Navi2x : Support for mode1 reset
RTGPLAT-2623: Navi2x: Support for bootrom table size of 8KB.

Release Version 0.11.0.30
-----------------------------------
GC change applied to security policy:
PLAT-53660 - [RN] GC instance of VM_IOMMU_CONTROL_REGISTER.IOMMUEN not set on secured part
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.2C*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.2C*

Bootloader
----------------
[BOOTLOADER] Fix UnmapSmn affecting adjacent mapping
[BOOTLOADER] Fix reading of DISABLE_SECURE_DEBUG_UNLOCK fuse bit
[BOOTLOADER] FEAT-27034 Add Anti-rollback.
[BOOTLOADER] Enter recovery if StartUserModuleRestoreInterrupts( ) returns BL_ERR_DATA_CORRUPTION
[BOOTLOADER] PLAT-52328 - RN - DRTM support in PSP BL
[BOOTLOADER] PLAT-52317 Halt if PEI image corrupted on S3

Trusted OS
----------------
RTGPLAT-2635: MI100 Update XGMI reg list for loopback test
RTGPLAT-1723: trusted_os: Add TOC adaptation  for Navi2x
PLAT-52328 - RN - DRTM support in PSP tOS
RTGPLAT-1807: MI100 PF FLR - Bootrom SMNIF TLBs
MERO-20: Implementation of Persistent Objects in tOS.
SWDEV-206074 - Navi21 SR-IOV: Add support for XGMI P2P Programming
RTGPLAT-2623: Navi2x: Change to BOOTROM_DATA_SIZE for migration to BTO
[RTGPLAT-2156]MI100 - TLB2 mapping corrected to Gfx9 requirement

Release Version 0.18.0.2F
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
FEAT-27282 [Navi12][VG10][SRIOV] MARC_0 Register programming. Interface fixes specified by virtualization.


Release Version 0.11.0.2E
-----------------------------------
Bootloader
----------------
[BOOTLOADER] FEAT-27034 PSP Firmware Anti-Rollback Protection
[BOOTLOADER] PLAT-51430: SCAN Chain Fails on Secure Parts
[BOOTLOADER] Enable Warm reset
[BOOTLOADER] PLAT-52085 - [Renoir] Remove PSP debug message
[BOOTLOADER] PLAT-52328 - RN - DRTM support in PSP BL
[BOOTLOADER] Bug Fix
[BOOTLOADER] Legacy Recovery Bug Fix
[BOOTLOADER] FEAT-27034 Add Anti-rollback.
[BOOTLOADER] Legacy Recovery Enablement [BOOTLOADER] Consolidate post code logger

Trusted OS
----------------
MERO-20: Implementation of Persistent Objects in tOS.
[TOS] FEAT-27034 PSP Firmware Anti-Rollback Protection
PLAT-52328 - RN - DRTM support in PSP tOS
[TOS] PLAT-52760: Assign C2P 63 register to indicate TEE capability
SWDEV-207557 - Navi21: Enable SR-IOV base functionality
RTGPLAT-2468: compile out External aborts for Navi 1x platform
RTGPLAT-2468: fix arm CPSR bit definitions
[TOS] PLAT-50482 Re-enable PSP security policy revert
SWDEV-207558 - Navi21 - Extend IH Register programming interface in PSP for secure MARC
SWDEV-205685: Allowed register list for XGMI loop back test
[TOS] Skip applying DF late policy on S0i3
PLAT-53430: Remove DMCU-ERAM and DMCU-ISR restoration in S3 and S0i3 resume path
PLAT-52328 - Bug fix for the issue introduced in commit [51ded44]
RTGPLAT-2467: Navi 1x: Configure TMZ registers in TOS

Release Version 0.11.0.2C
-----------------------------------
*dr_ftpm_prod_RN.csbin updated to version: 3.27.0.5*

Bootloader
----------------
[BOOTLOADER] Add EFS offset as per the spec
[BOOTLOADER]PLAT-53065: Skip SPI config on emulation
[BOOTLOADER]PLAT-50895 - Skip eSPI access in reset

Trusted OS
----------------
PLAT-52328 - RN - DRTM support in PSP tOS/BL
RTGPLAT-2509: Update MMHUB Fabric ID for Navi21
PLAT-52575: [RN] Block DCN firmware DMCU_ERAM & DMCU_ISR loading via Gfx interface. Do not block tOS booting in case if GFX fuse is disabled and DMCU were not loaded.

Release Version 0.11.0.2B
-----------------------------------
*Requires updated gfx driver and security policy
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.36*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.36*

BootLoader
----------------
[BOOTLOADER] PLAT-52340 Apply ATC hardware bug workaround

Trusted OS
----------------
[TOS] RN: PLAT-52517 Power gate CCP when PSP is idle
[SWDEV-205530] - MI100 SR-IOV: no register address in L1 violations dump
MERO-20: Implementation of Persistent Objects in tOS.

Release Version 0.11.0.2A
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-32445 [PSP Phase II] Arbitrary memory overwrite in VerifyBiosRTM( )

Trusted OS
----------------
SWDEV-205685: MI100: Support for allowed XGMI register read /write
PLAT-52575: [RN] Block DCN firmware DMCU_ERAM & DMCU_ISR loading via Gfx interface
SWDEV-205934 Corrected NodeId value in memory sharing disablement

Release Version 0.11.0.29
-----------------------------------
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.29*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.29*

BootLoader
----------------
[BOOTLOADER] PLAT-51686 Interrupt Timer not triggering callback into KMD
[BOOTLOADER] FEAT-27034 update anti-rollback
[BOOTLOADER] PLAT-50793 enforce DMCU fw type
[BOOTLOADER] PLAT-51535,PLAT-49607 Support for Cezanne
PLAT-52444 [BOOTLOADER] Add new service calls to map/unmap SMN window with size parameter

Trusted OS
----------------
MERO-20: Implementation of Persistent Objects in tOS.
SWDEV-204075 Disable memory access (read/ write) for all the peer Dies
RTGPLAT-2387: fix SRM Index Data load vector issue

Release Version 0.11.0.28
-----------------------------------
*dr_ftpm_prod_RN.csbin updated to version: 3.26.0.5*

BootLoader
----------------
[BOOTLOADER] PLAT-52271 Skip RPMC init on S3/S0i3 Resume
[BOOTLOADER] PLAT-50895 - Enable Port80 over LPC
[BOOTLOADER][TOS] Add support for Bixby
[BOOTLOADER] PLAT-50999 Remove switching to PSP SPI-ROM
[BOOTLOADER] Fix to support compressed PMU FW
[BOOTLOADER] Style fixes
[BOOTLOADER] PLAT-51370 Don't clear watchdogfired bit
[BOOTLOADER] PLAT-50895 - Set LPC voltage to 3.3V

Trusted OS
----------------
PLAT-51670: Soft-Monotonic-Counter implementation (phase4)
[SWDEV-205065] MI100: Allow force loading of L1 security policy for non-secure part if option is enabled in VBIOS
[TEE OS]: Enable PSP Data Snapshot feature on Renoir
[SWDEV-202880]MI100: RAS: Add Error Notification support for WAFL 0/1 Multi-Uncorrectable RAS Errors
PLAT-51638 : Don't enter low power state when TrustZone is enabled
RTGPLAT-2277 Corrected mask values for fields of MC_VM_XGMI_LFB registers
DESPCPSP-54: [Renoir][ACP] PSP need to consider the 256 byte header info while loading the ACP FW
PLAT-51666: Failure to flush HDP Fifo during driver to/from TA / tOS communication
RTGPLAT-1775:drv_sys: Configure USB D-state Power Management Interrupts
RTGPLAT-1775:drv_sys: Add support for USB d-state handling
[RTGPLAT-2309] - MI100: CCP Target Address failure on loading MEC FW in VF Framebuffer
RTGPLAT-1784 : Navi2x: Enable sGPU functionality in TOS
SWDEV-202887 - MI100 Mode2 Reset Enablement
SWDEV-202887 - MI100 Mode1 Reset and PF FLR Enablement

Release Version 0.11.0.27
-----------------------------------
BootLoader
----------------
[BOOTLOADER] TEMP: S0i3 resume skip wait for SMU DRAM response
[BOOTLOADER] PLAT-51454 Skip MP0DPM message on S0i3 resume
[BOOTLOADER] Debug Print Cleanup
[BOOTLOADER] PLAT-51509 - Enable HdtOut print
[BOOTLOADER]PLAT-48877 Fix RTM bad key validation

Trusted OS
----------------
[TOS] PLAT-51798 Disable CCP LSB DS
RTGPLAT-2210: Transferred DF cstate disable/ enable function from P4V
DESPCPSP-57 - NV12 SRIOV: Save PF VMID in RLC Autoload for VF FLR

Release Version 0.11.0.26
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-50793 Add DMCU Firmware Copy
[BOOTLOADER] Add a check for global buffer in CryptoHmacSha256 function
[BOOTLOADER] Clean up AEB unlock code
[BOOTLOADER] PLAT-49838 Check BIOS PEI hash on S3/S0i3 resume
[BOOTLOADER] PLAT-50315 Fix BIOS PEI image hash calculation

Trusted OS
----------------
MERO-18: Implementation of secondary TEE interface for Mero.
Revert "RTGPLAT-2026: Disable wfi for Navi 10/14 as there are other system wide issues"
[TOS] RN: Enable MP0 Power Features
PLAT-51506: Disable Commercial Pro Part Check
SWDEV-197072 GPU-P SR-IOV: PSP timeout during multi VM VF FLR test
SWDEV-198271: [HDCP] Add support for SRM1 signature verification. DSA signature validation.
[TOS] PLAT-49527 Don't power-gate when warm reset is coming
PLAT-50794: [RN] tOS load DMCU from DRAM to its destination before USBC fw loading
MERO-15: Add new SMU-to-PSP message IDs
[SWDEV-202113]- MI-100 SR-IOV: Add Periodic FW validation for MEC VF FW
[CONFIG] Ignore tags and .patch files
RTGPLAT-2147: Avoid unhalt of SDMA0 and SDMA1 for GFX10 based SOC
PLAT-49210: Soft-Monotonic-Counter implementation (phase-3)

Release Version 0.11.0.23
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-50440 Support loading compressed FW
[BOOTLOADER] FEAT-27034: Add mandatory SPL FW list
[BOOTLOADER] Remove unnecessary print message
[BOOTLOADER] Update secure gasket logic

Trusted OS
----------------
PLAT-51098 : Fail signature verification of unencrypted KVM Fw binary

Release Version 0.18.0.22
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
FEAT-27282 [Navi12][VG10][SRIOV] MARC_0 Register programming
RTGPLAT-1813: Navi10: Disable WFI for Navi10 XT & XL SKU's
RTGPLAT-1398: NV1x: Update USB-PD firmware over I2C channel
RTGPLAT-1397: NV1x: Request SMU to get control of I2C lines
FEAT-27430 - NV12 Mode1/PF FLR enablement
RTGPLAT-2026: Disable wfi for Navi 10/14
SWDEV-190384 - SR-IOV: Avoid Autoload RLC on FLR exit for GFX 9 products
FEAT-25098 - NV12 SRIOV: VCN FW Validation Address Calculation

Release Version 0.11.0.21
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Allow Early C2PMSG28 access on S0i3 resume
[BOOTLOADER] Fix bug programming UMC keys during S3 resume
[BOOTLOADER] Introduce PSP directory entries for A/B recovery

Trusted OS
----------------
[TOS] Comment out check where DMCU FW is already loaded
PLAT-49208: Update Visual Studio solution files, no code changes.
[PLAT-50469] Fix UART initialization cases
PLAT-38975: Renoir and Mero/VG USB PHY FW loading.
PLAT-xxxxx: Early load DMCU IP FW.
SWDEV-200719: Reduce frequency of PSP Power Gating
SWDEV-201137: Code cleanup - rename gFbBasePhyAddr to gTmrBaseGpuVa.
LAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi Change the setting of the DMUB Cache CW0/CW1 registers to work around the DMUB h/w bug.
SWDEV-198271: Adding support for DSA signature validation.

Release Version 0.11.0.20
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-49622: Lock down MP2 RAM1
[BOOTLOADER] PLAT-49943 Enable EncryptTmzWrites
[BOOTLOADER] PLAT-50194 Fix MMEA0_SECURE_CTRL programming
[BOOTLOADER] FEAT-27034 Add stage2 anti-rollback
[BOOTLOADER] BootROM mailbox re-used as TOS mailbox bug fix
[BOOTLOADER] Set explicit status code values

Trusted OS
----------------
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi Change the setting of the DMUB Cache CW0/CW1 registers to work around the DMUB h/w bug.
PLAT-50532: Temporary inform good status of PspStorage, till feature is enabled in drv_sys
PLAT-50539: [RN] Enable SMU-2-PSP interface back after S3/S0i3 resume
SWDEV-189108 PSP-SMU Firmware interface changes for XGMI DPM
[TOS] Temporary workaround to ignore command 0x1B from BIOS
[TOS] Temporary disable reverting PSP security policy during debug unlock
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi Change the setting of the DMUB Cache registers from GPU Virtual to FB Physical address.
[TOS] PLAT-49831: Suspend SMU call in Secure Debug Unlock causing hard hang
SWDEV-198271: Adding support for DSA signature validation.
PLAT-49210: Use SMI-interface to write to PSP NVRAM and enable encryption PSP NVRAM records (phase2)
PLAT-46938 : Enhance Dlm support for Ftpm Dlm prints

Release Version 0.11.0.1E
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
[TOS] RN: Disable MP0 power features to fix S3
PLAT-49208: Update Visual Studio solution files, no code changes.

Release Version 0.11.0.1D
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Disable VCPU Instruction Fetch Monitor
[BOOTLOADER] PLAT-46883 Fix bug of eDP early screen-on during S0i3
[BOOTLOADER] Skip graphics register access on S0i3 resume
[BOOTLOADER] FEAT-27034 Add anti-rollback
[BOOTLOADER] PLAT-49718  Skip IP-discovery table loading in S3/S0i3 cycle
[BOOTLOADER] Retrieve and unwrap iKEK if necessary

Trusted OS
----------------
[TOS] Temporary disable the suspend call to SMU to enable SDU with GFX Driver
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi Cosmetics.
[TOS] RN: Enable MP0 power features
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi New requirement for resetting the new DMUB IP FW after testing in DAL.
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi Additional requirement for resetting the new DMUB IP FW.
PLAT-48444: SPI settings for normal/fast read speed and test mode
PLAT-48284: [RN] TMR Setup fixes and redesign Fix a TMR leaking issue during S4 restore FW. Check if the TMR region is already set with the same addresses. If so then return back already occupied slot number. That logic was applied on RV and works fine.
PLAT-49208: Soft-Monotonic-Counter APIs implementation (phase-1)

Release Version 0.11.0.1C
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Enable Unconditional Unlock
[BOOTLOADER] PLAT-48891 Skip MP2 load if already executing
[BOOTLOADER] PLAT-46883 Add GPE wake event for eDP early screen-on during S0i3
[BOOTLOADER] update binary Makefiles
[BOOTLOADER] Remove crypto function call debug prints
[BOOTLOADER] PLAT-49055 Solving PSP BL failure updating HMAC key
[BOOTLOADER] Stage1 BL fixes from emulation testing.
[BOOTLOADER] Add security policy header validation

Trusted OS
----------------
[TOS] RN: Fix to skip applying GFX security policy on unlocked part
PLAT-48284: [RN] TMR Setup fixes and redesign
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi
SWDEV-196883: Bug fix for TMZ enablement on GFXOFF exit.

Release Version 0.11.0.1A
-----------------------------------
NOT Included in Release Version 0.11.0.1A
-----------------------------------------
-Secure Debug Unlock
-RPMC
-MP2 FW Loading Disable

BootLoader
----------------
[BOOTLOADER] Enable PMU/KeyDb FW validation
[BOOTLOADER] PLAT-47866 Fix CF9-06 reset
[BOOTLOADER] Change UMC key index from 0 to 15
[BOOTLOADER] Remove PSP BL Port 80 Accesses during ABL execution
[BOOTLOADER] Enable TMZ on non-secure parts
[BOOTLOADER] Store TMR restore data in crypto global buffer
[BOOTLOADER] GPU Host Translation Cache add VM_IOMMU enable
[BOOTLOADER] Fix GPU Host Translation Cache enablement from syscall
[BOOTLOADER] Fix Softfuse for controlling MP2 loading bug
[BOOTLOADER] Add runtime emulation detection
[BOOTLOADER]PLAT-47570: Fix IP harvesting
[BOOTLOADER] eSPI configure cherry pick from rn-bringup
[BOOTLOADER] Check return code of call to kdb_getKey

Trusted OS
----------------
SWDEV-197248: Revert commit [ea882fa] as VCN team dropped their debug request.
PLAT-46883: [Renoir-MS]Add GPE wake event support for eDP early screen-on
[TOS] RN: Disable Power Gating on Non-secure parts
SWDEV-197248: VCN firmware front-door loading not working due to TMR settings
Fix Unit ID of DMUB and typo in the code for reset it.
SWDEV-197248: Return GPU Virtual Address of VCN firmware in SRIOV mode for VF.
SWDEV-197248: Return FB Physical Address of VCN firmware to the Gfx driver.
Support to handle external abort in Secure OS
[tOS] Add comments to make it easier to analyse exception data in registers.
PLAT-48284: [RN] TMR Setup fixes and redesign
SWDEV-196436 Corrected PCRU PUBLIC structure
Porting rn-bringup branch commit [a42dde2] to the amd-staging: [TOS] PLAT-47550 Fixed SMN blocking duo to WLAN access
[tOS]: Sanitize modulus and exponent sizes in CcpModExp().
[TOS] Clean up LoadModule function from redundant operation.
[TOS] Correct PSP FW STATUS format description in the comment header of DiagnosticMessage() function
Porting rn-bringup branch commit [9cfcfb1] to the amd-staging: "[TOS] Enable MPCLK SOCCLK SHUBCLK deep sleep allow"
PLAT-48284: [RN] TMR Setup fixes and redesign
[TOS] PLAT-47882 Fix USB FW sometimes failing validation.
[SWDEV-194505] TOS: Signing drv_sys.bin using KDS fails
PLAT-47405: Fix security issue caused by inadequate protection of C2PMSG_91
DEREM-299: Bug fix for USB-PHY FW loading.
PSP-3520: Do not allow using TestKey on secure parts.
PLAT-47833: [RN] Fix MMHUB Base address and AXI address computation
SWDEV-181915: System Hard Hang when resume from sleep and Netflix app open
PSP-3520: Use KeyDb loaded by Boot Loader.
[SWDEV-194045] TOS: Add missing header binary file for PSP OS
[SWDEV-193018]: Fix compile warnings in BUILD_RN configuration
PSP-3521: Fix permissions check bug for IPC (inter-process calls) handling in SysDrv.
SWDEV-190741: Move SRIOV dynamic register writes from PSP OS to sysdrv.

Release Version 00.17.00.17
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
[SWDEV-193018]- MI100: Enable dGPU specific sequences in PSP OS
Add BUILD flag for MI100 to enable functionality in PSP OS
Update hw_reg, smn_reg and rsmu_header files.

Release Version 0.11.0.16
-----------------------------------
BootLoader
----------------
[BOOTLOADER] LPC port init clean up

Trusted OS
----------------
NA

Release Version 0.11.0.15
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Update application of security policy
[BOOTLOADER] PLAT-32123 Enable eSPI for 3F8h

Trusted OS
----------------
PLAT-38975: Fix to allow test keys on non secure part
PLAT-38975: Add RN 2K test key in global Key permission array
PLAT-46586: [RN] Enable graphics security policy in tOS
PLAT-38975: RN Load USBC Phy firmware. USB/DP PHY FW Unified binary and each image inside validation.
PSP-3520: Use KeyDb loaded by Boot Loader.
PSP-3505: Update Visual Studio project files.
PSP-3505: Update Visual Studio project files.
PLAT-46586: Refactoring of rsmu.c file

Release Version 0.11.0.14
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-47178 Add SVC call to set iGPU is disabled.
[BOOTLOADER]PLAT-47358: Fix BIOS load error reporting

Trusted OS
----------------
NA

Release Version 0.11.0.13
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Add thermal trip bit check to S5 boot

Trusted OS
----------------
PLAT-46190: [RN] Update PSP Authentication for PROM19 Variants
FEAT-26870: [Navi1x][tOS] Translate PS_DIRECTORY_ENTRY_TYPE_BIST_DATA to SPI Address
[SWDEV-190382]- MI100: Add Product Number and Build Flag
[SWDEV-190381] - Add GFX9 Enablement
Clean up power feature code in TOS
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi
PSP-3520: Add validation of KeyUsageFlag for IP FWs.
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi

Release Version 0.11.0.12
-----------------------------------
BootLoader
----------------
[BOOTLOADER] SWDEV-190975 Implement CS-seed checking
[BOOTLOADER] PLAT-46947: Add SVC Input Validation
[BOOTLOADER] PLAT-46260 Skip L3 in MBAT when downcored
[BOOTLOADER] PLAT-46390 Enable ABL verification with key database
[BOOTLOADER] PLAT-46829/44597 Load/Verify SMU(MP1) without PSP image header
[BOOTLOADER] PLAT-46746 Set C2PMSG97-99 attribute
[BOOTLOADER] PLAT-41678 Check CCP TRNG numbers are valid
[BOOTLOADER] PLAT-46520 PSB support for RN
[BOOTLOADER] Stage 1 bootloader initial commit:
[BOOTLOADER] Fix Coverity warnings
{BOOTLOADER] SWDEV-188588 Fixed scanning for Embedded FW Signature
[BOOTLOADER] PLAT-46786 Bypass VBL in S0i3 mode
[BOOTLOADER] Fix HMAC comparison function
[BOOTLOADER] Fix LogBLPostCode "hang" condition

Trusted OS
----------------
DEREM-192: [RN] Enable MPCLK deep sleep
PLAT-47110: Address NCC issue "Inspection-006-097".
DESPCPPSP-56 - Navi1x - Remove TMR fences on Unlock
RTGPLAT-1155: Navi 1x: Restore harvesting registers before ATC invalidation
FEAT-26869: [Renoir] Update and Verify CS-SEED-based KDF and Key Unwrapping SWDEV-190959: Promontory Device Pre-Shared Key Authentication Key SWDEV-190961: Knoll Device Pre-Shared Authentication Key
FEAT-26175: [Navi1x] Add SPI write support for GD25Q80C SPI model. Add SPI init support for NV14 as well as NV10
PLAT-33045: [PSP Phase II] The shared DLM buffer can be abused to corrupt TEE OS memory
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi

Release Version 0.11.0.11
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-42929 Authenicate BIOS PEI in S3/S0i3 mode
[BOOTLOADER] PLAT-46735 Disallow non-MP0 to access MP2 SRAM1
[BOOTLOADER] PLAT-46096 Correct S2PMSG register init

Trusted OS
----------------
SWDEV-188549 [Renoir] Implement PSP virtual mode
FEAT-26175: [Navi1x] Add SPI write support for GD25Q80C SPI model
RTGPLAT-1217: Navi1x: fix DMCU firmware start address for ERAM and ISR
RTGPLAT-1153: Enable DfCstate after debug unlock
RTGPLAT-1217: Navi1x: fix DMCU firmware size for ERAM and ISR
PSP-3520: Bug fix in IP FW validation.
RTGPLAT-1201: Navi 1x: Fix applying security policy on gfx off exit.
RTGPLAT-1201: Navi 1x: Fix applying security policy on gfx off exit
PLAT-43193: Disable SureStart feature for Renoir.
RTGPLAT-1155: Save/Restore harvesting registers before invalidation in mode 2 reset
RTGPLAT-1187: Navi10/14 fix mode 2 reset incorrect SMN address
PLAT-46066: New Gfx-to-PSP command for programming VM default address
RTGPLAT-1179:[Navi14]:Fix build break
SWDEV-188857 Add support for CCP power features.
RTGPLAT-1175: [Navi14]: Fix display pipe count
RTGPLAT-1154: do not clean the display as DCN is not resetted in Mode 2 reset
RTGPLAT-1174: [Navi14]:Disable XGMI init
RTGPLAT-1154: Remove DCN Reset as part of mode 2 reset
PLAT-43197: [DRTM] PSP controlled shared memory buffer.

Release Version 0.11.0.F
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-39850 Add support for CCP HMAC engine
[BOOTLOADER] PLAT-42522 Change APOB signing key
[BOOTLOADER] PLAT-42924 Add RPMC support
[BOOTLOADER] PLAT-42917 Key Database [3/3]

Trusted OS
----------------
RTGPLAT-1138: [Navi14]:Enable Mode1 and Mode2 reset
RTGPLAT-1137:[Navi14]: Update register headers
RTGPLAT-1130:[Navi14]:Enable Secure Debug Unlock in Secure OS
RTGPLAT-960: [Navi14]: Add SOC family Id in header of Sys-Driver image
RTGPLAT-1149:[Navi1X]: Use common flag for Navi1X features
RTGPLAT-928: Disable VCPU instruction fetch monitoring.
PLAT-42922: [RN] PlayReady: TMZ in System Memory & LFB
FEAT-25098 - NV10 SRIOV: Re-enable Periodic VCN FW Validation

Release Version 0.11.0.E
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-46260 Disabled MBAT as part of the release to unblock PEMU
[BOOTLOADER] PLAT-46290 Skip GC RSMU configuration
[BOOTLOADER] PLAT-45821 Fix Windows BSOD in SimNow
[BOOTLOADER] PLAT-46029 Enable postcode buffer
[BOOTLOADER] PLAT-46061 Fix firmware size and location
[BOOTLOADER] PLAT-42917: Key Database [2/N]
[BOOTLOADER] PLAT-44423 Load IP discovery binary
[BOOTLOADER] PLAT-45940 Fix section names, zero-init BSS

Trusted OS
----------------
PLAT-36079: Navi10: Fix register address and offsets for Mode 1
RTGPLAT-1015: during mode2 reset update bios scratch 6 register
RTGPLAT-640: temp-hack: disable PSP going to low power state
FEAT-24956: Navi 10: Fix UMC COLD RESETB SMN address
RTGPLAT-960: Add register headers for Navi14
FEAT-26164: Add Gfx-to-PSP APIs for passing parameters for GDDR6 from KMD.
PLAT-46066: New Gfx-to-PSP command for programming VM default address
PLAT-45692: Skip complete frame for vm_switch
SWDEV-185449: Prevent programming VM table for base address zero
PLAT-46130: Renoir: Update PSP message codes
DEREM-182: C2P registers not being updated for SLVERRs on PCIE0 RSMU MMIO register accesses
RTGPLAT-960: Add PSP FW image header for Navi14
RTGPLAT-960: Update Makfiles for signing function and help for Navi14
RTGPLAT-960: Add separate product number for Navi14
RTGPLAT-386: [VCN RAM]: Program GPU Physical Address into VCN RAM buffer.
RTGPLAT-651: drv_sys: setup_tmr should not fail when already setup
RTGPLAT-386: [VCN RAM]: Program GPU Physical Address into VCN RAM buffer.
PLAT-46066: New Gfx-to-PSP command for programming VM default address
FEAT-26164: Update data structure for handling GDDR6 training parameters.
RTGPLAT-386: [VCN RAM]: Program UVD_LMI_SPACE_INTERNAL3 register by PSP.
Store TOS data abort information into new firmware status registers.

Release Version 0.11.0.C
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-32123 Add eSPI support
[BOOTLOADER] PLAT-38153 32MB SBIOS Support
[BOOTLOADER] PLAT-42917: Key Database [1/N]

Trusted OS
----------------
PLAT-45827: Add new cmd in TEE interface
RTGPLAT-960: Use common ccp lib for Navi1x platform
RTGPLAT-386: VCN RAM loading - FW case in Reset IP FW
RTGPLAT-960: Make SMU interface header common for Navi1x platform
RTGPLAT-960: Introduce common flag for Navi1x platform
RTGPLAT-977: Implement TOC fw size multiplier to accomodate larger fw in TMR
FEAT-26164: Implementation of  save/invalidate of GDDR6 training parameters in SPI.
PLAT-44810: drv_sys: Clear TMZ key data while debug unlock
RTGPLAT-386: [VCN IP monitoring]: Implementation of VCN RAM loading.
FEAT-26164: Add data structures and API for handling GDDR6 training parameters.
PLAT-44359: PSP FW to support Pro SKU detection by reading fuse bit
RTGPLAT-928: Disable VCPU instruction fetch monitoring
RTGPLAT-535: DrvSys: Apply UMC unlock policy for MPV feature
FEAT-24472: DMCU Firmware front-door Loading in system driver
RTGPLAT-427: Enable TMR configuration for VCN ucode memory
PLAT-45708: [RN] Fix a bug in RSMU security interrupt clearing

Release Version 0.11.0.B
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-38153 32MB SBIOS Support
[BOOTLOADER] PLAT-42917: Key Database [1/N]
[BOOTLOADER] Implemented MBAT programming and SVC_REMAP_MBAT_ENTRY
[BOOTLOADER] PLAT-42932: Added GPU Host Translation Cache Feature
[BOOTLOADER] PLAT-43208 SVCcall for Reserved DRAM memory
[BOOTLOADER] PLAT-43946 Load Diag bootloader only when soft-fuse bit5 is set
[BOOTLOADER] Pass zero-padded exponent in CCP mod exp command
[BOOTLOADER] Add support for hardware PC sniffer
[BOOTLOADER] PLAT-41898 VBL loading by iGFX fuse

Trusted OS
----------------
NA

Release Version 0.11.0.A
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-42936 S3 Entry/Exit in Simnow
[BOOTLOADER] PLAT-43310/PLAT-43443 Port changes from Raven to Renior 4/X
[BOOTLOADER] PLAT-44281 Allocate 0x29 to KVM binary
[BOOTLOADER] HW-IP-Discovery feature implementation
[BOOTLOADER] PLAT-44395 DEREM-168 MP2 support

Trusted OS
----------------
NA

Release Version 0.11.0.9
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-43698 SVC call "SVC_SEARCH_BIOS_DIR_V2"
[BOOTLOADER] Add build flags to Makefile's "help"
[BOOTLOADER] Remove SKIP_ERROR
[BOOTLOADER] PLAT-38344/PLAT-43443 Port changes from Raven to Renior 3/X
[BOOTLOADER] PLAT-44006 Headerless FW loading
[BOOTLOADER] S0i3 feature implementation

Trusted OS
----------------
PLAT-43197: PSP FW Version Manifest Generation
PLAT-42720: Enable TMZ for Navi10
Skip SMU FW reload only on dGPU
PLAT-37871: Navi10 - Enable GC violation logging
RTGPLAT-591: Fix secureOS debug unlock sequence to unlock GC
SWDEV-183202: RV2 and RV1 S3 failure after 25 cycles
FEAT-25096: NV10 SRIOV - Update Load Vector Value and Destination
PSP-3521: Add support for IPC in SysDrv
SWDEV-185623: NV10 SRIOV - RLC Autoload Failure on VF
FEAT-26140: MES/MES_STACK FW Loading Case in Reset IP FW
Add MP0 Power Features to trustedOS
Remove compilation warning in tOS
SWDEV-184767: Save/restore VCN FW size over S4 cycle
FEAT-25091: NV10 SRIOV - Remove SDMA Jump Table Copy
PLAT-42918: Fix S0i2 support in tOS
RTGPLAT-433: Update product code in firmware version
PLAT-44359: PSP FW to support Pro SKU detection by reading fuse bit
Add support for PC Sniffer in tOS kernel
RTGPLAT-552: TMR - Disable write enable for read only TMRs
PLAT-45138: Fix encrypted TA load failure
PLAT-43197: PSP controlled shared memory buffer
PLAT-45469: BIOS-PSP SMI Mutex C2PMSG_23 Attribute Bug
Disable PC Sniffer when changing timeouts
FEAT-24957: Navi10 - Add Mode2 Reset Support
FEAT-25096: NV10 SRIOV - L1 Policy Apply and Revert Sections
FEAT-25098: NV10 SRIOV - Periodic VCN FW Validation for VFs
SWDEV-184767: Reorganize IP FW Loading Code
RTGPLAT-386: Implementation of VCN RAM Loading
PLAT-45596: Bug introduced by moving virtual interrupts beyond max physical interrupts
PLAT-32090: Race condition leads to memory corruption in BIOS2PSP command dispatcher
FEAT-25098: NV10 SRIOV - Temporarily Disable Periodic VCN FW Validation
RTGPLAT-760: Add support to blanking active display pipe in Mode2 reset
RTGPLAT-814: Skip EA and UTCL2 reset in Mode2
RTGPLAT-760: Refactor "32. Add support to blanking active display pipe in Mode2 reset"
FEAT-24956: Navi10 - Add Mode1 Reset Support
RTGPLAT-540: Restore APCC tuning registers on PnP and Mode2 reset
SWDEV-185391: Configure cold/hard reset in SMUIO_GFX_MISC_CNTL
RTGPLAT-464: Add support to apply GRBM CAM settings in Mode2 reset
Revert "FEAT-25091 : NV10 Baremetal - Add SDMA Jump Table Copy"

Release Version 0.11.0.8
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-38351 Increase ABL SRAM SIZE
[BOOTLOADER] PLAT-43604 Error return of MapUserStack()
[BOOTLOADER] Fixed bug introduced in code cleanup CL 60132
[BOOTLOADER] PLAT-43443 Port changes from Raven to Renoir 2/X

Trusted OS
----------------
PSP-3520: Support multi-level FW headers for IP FW
PLAT-42376: RPMC support needed in trustedOS
PSP-3520: Fix TOCTOCU security issue in IP FW validation
FEAT-25091: NV10 SRIOV - VF GFX FW Loading in TMR
SWDEV-182169: VCN FW Restore Fix
FEAT-25094: NV10 SRIOV - RLC Autoload for VF
PLAT-42113: NV10 GFX Security Policy Update
PLAT-43743: Driver Syscall API Update to Differentiate Error and Valid Return Code
PLAT-41792: DRTM Address Mapping API in System Driver
FEAT-25097: NV10 SRIOV - VCN FW Loading in VMR
PLAT-43580: Set status bit in BIOS-to-PSP command register for A/B recovery
PSP-3505: Add synchronization barrier to SMN write service
SWDEV-181915: Fix PlayReady playback issue after S3 resume
PLAT-43197: PSP FW version Manifest Generation
FEAT-25091: NV10 SRIOV - Remove SDMA Jump Table Copy
PLAT-43719: Change fTPM signing key from root key to AMDTEE TA key
FEAT-25096: NV10 SRIOV - VF ID Update to Load GFX FW and TOC in PF Memory
PSP-3521: Initial coding for IPC implementation
PLAT-44084: Bug check when resume from sleep and Netflix app open
PLAT-44089: Port P4 CL#62884 - SMU RAS Fatal Error During FW Loading

Release Version 0.11.0.7
-----------------------------------
BootLoader
----------------
[BOOTLOADER] S0i3 feature implementation
[BOOTLOADER] Fix FW version print
[BOOTLOADER] PLAT-43443 Port changes from Raven to Renoir
[BOOTLOADER] PLAT-37728 Add Combo Bios Directory Support

Trusted OS
----------------
FEAT-25098: Enable MMSCH FW Front Door Loading on Navi 10.
PLAT-41793: APIs for dynamic allocation of TMR regions.
PLAT-41792: DRTM Address Mapping API.
FEAT-25098: Port SDMA Jump Table 4K alignment from Navi 10 repo.

Release Version 0.11.0.6
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Update RN fuse file
[BOOTLOADER] Removed HSTI support
[BOOTLOADER] Update PSP BL Crypto functions to use CCP_HAL layer which supports RN CCP12
[BOOTLOADER] PLAT-41423 Implement USB-C PHY (FW type: 0x44) loading in PSP bootloader
[BOOTLOADER] SWDEV-176482 Clear a TLB busy bit early in smnif
[BOOTLOADER] Change crLsb algorithm to support double slot allocations
[BOOTLOADER] PLAT-42113 Implement Renoir L0 security policy loading and execution
[BOOTLOADER] PLAT-42482 Implement Renoir L1 security policy loading to DRAM
[BOOTLOADER] Fixed DC.String_Buffer error in file kdf.c function DeriveKeyUsingPRF
[BOOTLOADER] PLAT-37433 Enhancement in white-list feature
[BOOTLOADER] Add error log when PSP BL enters into recovery mode
[BOOTLOADER] SWDEV-175419 TMR s0i3 restore cleanup
[BOOTLOADER] Fixed MP2 SRAM1 layout overlap with BootRom
[BOOTLOADER] Eliminated MP2 SRAM1 data save/restore authentication
[BOOTLOADER] Add RAM cookie check in AddEntryToMP2RAM1()
[BOOTLOADER] Fix CCP zlib argument order
[BOOTLOADER] PMFW-1072 Workaround for BootRom bug by programming MP0_ROMBIST_BYPASS to 0
[BOOTLOADER] Update RN register files with CL#1027599
[BOOTLOADER] Fix a bug in PutVcnInReset()
[BOOTLOADER] PSP-3505 Remove the ASIC TYPE from commom_defs.h

Trusted OS
----------------
Port Gfx FW loading functionality from Navi 10 repo.
Initial implementation of USBC FW loading.
Use latest CCP HAL build which includes Renoir specific register definitions.
SWDEV-175419: refactor TMR handling functionality (use index/data access to TMR registers).
Multiple updates to Security Policy definitions (including section ID refactoring).
Remove periodic MEC FW validation code.
Implement DRTM specific SysDrv services for register access.
Implement DRTM specific SysDrv services for TMR handling (not completed yet).
Clean up SMU message handler.
Updated GFXOFF exit sequence (support multiple SMU messages).
PLAT-38975: Refactor FW validation function to support 2KB and 4KB signatures.
FEAT-25092: PSP detects SR-IOV Capability.
Add support for Customer Key enablement (Key Database). Not completed yet.
PMFW-1071: Set MP2_FW_OVERRIDE.MP0_ROMBIST_BYPASS = 1 before entering S0i3.
PLAT-42376: RPMC support in Trusted OS.
Update BootLoader-to-tOS mailbox location and size across all builds (NV10/RN).
Add PSP (MP0) activity counter.
SWDEV-175419: Add mutex for protection for TMR modification.
DEIPCSMU11-3418: Increase SysDrv SRAM buffer from 4 KB to 8 KB to solve CCP issues with ECC.
SWDEV-178153: Implement PSP Virtual Mode.

Release Version 0.11.0.5
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
Remove SimNow debug code.
Reserve DRAM buffer for DRTM TA.
Fix SimNow Data Abort caused by overlap of temporary L1 page table with tOS code.
=======
﻿//----------------------------------------------------------------------------
// PSP FW Delivery Release Note
//
// Copyright 2021, Advanced Micro Devices, Inc.
// Date:   Jun 11, 2021
//----------------------------------------------------------------------------

Content:
	PSP FW Deliverables for Renoir.
	This Build is compiled using the ARM license from the AMD license server.

Files
 boot_loader_RN.bin                 [version: 0.11.0.70] - PSP off-chip Legacy Stage 2 BootLoader (entry type 0x1), signed with production key
 boot_loader_AB_RN.bin              [version: 0.11.0.70] - PSP off-chip A/B Stage 2 BootLoader (entry type 0x1), signed with production key
 boot_loader_stage1_RN.bin          [version: 0.11.0.70] - PSP off-chip Stage 1 BootLoader (entry type 0x1), signed with production key
 PspRecoveryBootLoader_RN.bin       [version: 0.11.0.70] - PSP off-chip Recovery BootLoader (entry type 0x3), signed with production key
 debug_unlock_RN.bin                [version: 0.11.0.70] - PSP secure unlock (entry type 0x13), signed with production key
 psp_os_combined_NV12.bin           [version: 0.11.0.70] - PSP secure OS (entry type 0x2), signed with production key
 drv_sys_RN.bin                     [version: 0.11.0.70] - PSP system driver (entry type 0x28), signed with production key
 dr_ftpm_prod_RN.csbin              [version: 3.68.0.5] - PSP fTPM (entry type 0xC), compressed and signed with production key
 dr_drtm_prod_RN.csbin              [version: 04.11.00.22] - PSP DRTM (entry type 0x47), compressed and signed with production key
 rsmu_sec_policy.rn_L0.sbin         [version: B.9.0.78] - Security Gasket (entry type 0x24)
 rsmu_sec_policy.rn_L1.sbin         [version: B.9.1.78] - Security Policy for tOS (entry type 0x45)
 spl_table_RN.sbin                  [version: 5.11.0.5C] - Firmware Anti-rollback information file (entry type 0x55)
 spl_table_CZN.sbin                 [version: 5.11.1.63] - Firmware Anti-rollback information file (entry type 0x55)

Release Version 0.11.0.70
-----------------------------------
*FTPM updated to version 3.68.0.5

Bootloader
----------------
PLAT-83850: Add RPMC provisioning check for <specific customer> system
FEAT-33383: [SPIROM-CONFIG] Avoid overwriting few bits in Addr32Ctrl2
PLAT-82078: [SPIROM-CONFIG] Bug fix in correction of dummy-cycles

Trusted OS
----------------
PLAT-85001: Bug fix in SaveMsmuToS5Sram
PLAT-64168: [RA2] Handle error conditions appropriately
FWDEV-2682:[RPL] Debug unlock with CCD support
PLAT-84486: Added Promontory V2 (PROM21) key for RMB B0
PLAT-83850: Add RPMC provisioning check for <specific customer> system
FWDEV-2782: Authenticate and load Lite-SDMA FW
DEPHXE-85: [PHX] Disable MP0 clock gating and mem deep sleep
PLAT-74080: Add command to validate binary in memory
FWDEV-3011: [PHX][TOS] CPU deep sleep from MP0 FSDL
FWDEV-3153: [PHX] Remove dmcub TMR on non-secure
SWDEV-289683:[Navi3x} Use SMN mapped address for CCP base
PLAT-79838 : [PSP_TOS] fix RSMU Violation Logging C2P_26
PLAT-83767: Add function to pass FW Attestation info to MPM
FWDEV-2761: [PHX] Remove S3-only S5 RAM entries on s0i3 entry
FWDEV-2766: Move Segment MSMU dRAM hash to secure DRAM
FWDEV-3142: Add MapSmn failure check in MapFwDestAddr
PLAT-83851: [RMB] New PSP -> HSP command for error handling
FWDEV-2664: Fix MI200 mpio.c compile warning
FWDEV-3143: Swtich Rom Armor HMAC comparison to constant time
PLAT-82589: Increase size of MPM DRAM to 16 MB
PLAT-84479: [SP] update Number of UMC channels
PLAT-84391: Add handler for Signal Thread
FWDEV-2551: Modulo bias in ecdsa_sign_rdata nonce generation.
PLAT-81752: RMB Chipset Authentication Requirements
FWDEV-1242: [PHX] USB3.1 Support - PSP FW
FWDEV-2668: [PHX] Remove MP0 only registers from S0i3 flow
PLAT-82396: Drv_sys interface to check if platform is chromebook
PLAT-83460 : [Navi24][PSP_TOS][NPM] block RegUnroll only for Headless
PLAT-83910: [SP]: update the MP1 P2SMSG register
PLAT-83921: [SP]: Update SMN addresses of FICAAR/FICADR
SWDEV-283451: Update maximum XGMI link record
FWDEV-2651: [RPL] [TOS] CPU deep sleep from MP0 FSDL
SWDEV-283300: Update TMZ Config on Rembrandt
SWDEV-274044 : [Navi2x] Fix Priv_PassThrough which skips copying some bytes
PLAT-83902: [SP]: TMR Support
PLAT-64173 VGH: Add HSP Persistent Storage Commands
FWDEV-1470: Key usage flag for GFX IMU firmware
PLAT-82453: Apply GC internal policy on APU
FWDEV-2714:[RPL] Enable SW SHA implementation
SWDEV-286518:[Navi24] Fix DF_PIE_AON_LinkTgtMode__SrcRspLnkBiasMode_MASK value
PLAT-83765 RMB: Add function for DRV_SYS_CMD_ID_FTPM_TPM_CLK_NV_UPDATE_INTERVAL API
SWDEV-282659:[Navi31] Migrate to v31 regspec
PLAT-81640 : [PSP TOS] Revert change for ConfigureRSMUTimeout(Id)
SWDEV-285742:[Navi] Add build flag to aggregate over Navi family
PLAT-82662 RMB: Terminate HSPNVHandlerthread when HSP not enabled
PLAT-83460 : [Navi24][PSP_TOS][NPM] Apply RAP_V1 EntryType for NP_MINIMAL_UVD0
FWDEV-2794: [PHX] Update MMHUB FID0
SWDEV-285742:[Navi3x] Enable Navi3x flags for the relevant code
FWDEV-2741:[RPL] Save MPIO sram on S0i3 entry
SWDEV-285606:[Navi31] Use the correct TOC header
SWDEV-271189 [MI200][SR-IOV]: Move MEC VF FW into TMR
AER-717: Enable SW SHA implementation
SWDEV-251569 : [PSP TOS[RAP] RAP_VALIDATION should fail if no entry found
PLAT-83460 : [Navi24][PSP_TOS][NPM] Apply RAP_V! EntryType for NP_MINIMAL
SWDEV-271190 [MI200][SR-IOV][Azure]: Enable DFC and CAP loading (GFX 9)
PLAT-72423: Setup API for dUSB4/PT21 loading
FWDEV-2665: Fix reserved DRAM address for MSMU dRAM
PLAT-60775: [RMB][HSP][DRTM]HSP-fTPM CRB interface support for DRTM use
FWDEV-2665: Save MSMU dRAM context for S0i3
FWDEV-2739: Write RAP V2 to CCD
PLAT-82593 : [PSP TOS][NPM] fix typo when applying NP_MINIMAL lock
FWDEV-2664: Add MPIO command to save SRAM for s0i3
PLAT-81599:  [RMB][Mayan\Lilac][00.28.00.2B]Secure Debug Unlock pop-up shows error, but status is unlocked
SWDEV-251569 : [PSP TOS[RAP TA] fix RAP_VALIDATION double-counting mismatch
SWDEV-285216 [MI200][SR-IOV][Azure]: Fix drv_sys BSS zeroing.
FWDEV-2656: Add function to save S5 SRAM and TMRs on suspend
PLAT-82172: Unbootable partition register checks current partition
FWDEV-2710: [PHX] Enable SW SHA implementation
PLAT-74088: [RMB][DRTM]Added SKINIT/PSP Interface change to Support HSP-fTPM DRTM
SWDEV-262225 : [PSP TOS][RAP][SRIOV] Fix RAP detection of SRIOV-enabled
PLAT-74088: [RMB][DRTM]Added SKINIT/PSP Interface change to Support HSP-fTPM DRTM
SWDEV-247336: Use UUID to remove TA records
FWDEV-2402: [RPL] RDRAND support
FWDEV-2402: Update PMFW supported message for RPL and CSTATE defines
FEAT-38248: [NV31] [PSP TOS] - [PSP TOS] Enable MP0 TOS trace log.
SWDEV-285059:[Navi31] Include FWID in the sysdrv binary
FWDEV-2635: Enable RAP V2 for APU
FWDEV-2663: [RPL] Align to LSD 1428363
SWDEV-283282: [NV31] Implement the Trusted SPI Update main sequence in PSP TOS
PLAT-82599:[tOS] Set UNLOCK STATUS bit of mmMP0_FW_OVERRIDE for secure unlock.
PLAT-81640 : [PSP TOS] fix issue with SMN Data Parity Handling
SWDEV-257759: DC Debug: Fix encryption buffering for PSP SOC Snapshot
FWDEV-317: SKINIT support for RPL
FWDEV-2593: [PHX] Initialize TOS KeyDB
SWDEV-284554: [NV31] Enable STB
PLAT-82174: Add SVC Call to Control PSP-eSPI Feature
PLAT-79859: Add SMU2PSP message to apply suspend RAP policy
FWDEV-2382: [PHX] E.0.1.1 LSC change list alignment Cl# 1414803
FEAT-37545 : [PSP TOS] Enable RAP Validation support for NV31
PLAT-82593 : [PSP TOS][NPM] Bypass RAP rollback and NP Lock on non-secure parts
FWDEV-1266: [PHX] Disable STB
SWDEV-275378:[MI200] Retrieve total number of direct links between peer dies
SWDEV-272821: [NV31] Implement the ROM Image Parser in the PSP Sys Drv
SWDEV-283282: [NV31] Implement the Trusted SPI Update main sequence in PSP TOS
FWDEV-308: [RPL] Save MSMU GFX dRAM in PSP DRAM
RTGPLAT-6864 : [NV24] MP0 unable to enter deep sleep after enter WFI
SWDEV-278013 : [PSP TOS][NPM-mode] clear XGMI keys on Non-Prod RegUnroll
FWDEV-2352: Update TMR_MMHUB_FID0 for Raphael
PLAT-82276:Skip HSP suspend command
PLAT-82155: Create FW Att mutex for all asics that use it
FWDEV-362: Add USB support for RPL
SWDEV-280155: [NV31] Implement SPI control sequences (write) in PSP TOS
PLAT-81630: Fix compile warning with MFD
SWDEV-278013 : [PSP TOS] Apply RAP NP_MINIMAL
PLAT-81641:[MI200][RAS] Writing to CPU DF RAS Interrupt control register for WAFL Err Overflows

fTPM
-----
PLAT-82265: Port Errata 1.12 Changes with BUILD flag
PLAT-83771: Correct CONTEXT_SLOT definition
PLAT-83765: Obtain NV update interval of TPM clock from PSP
PLAT-84169: Update coppyright header for Palamida scan
PLAT-64173: HSP Persistent storage in PSP-FTPM mode

DRTM
-----
N/A

Release Version 0.11.0.6E
-----------------------------------
*FTPM updated to version 3.61.0.5
*DRTM updated to version 04.11.00.22

Bootloader
----------------
PLAT-81867: [SPIROM-CONFIG] Different UID in warm & cold boot
PLAT-81103: Fix ASF remote power down issue.
PLAT-72713: Clear PMIODEBUG:cf9rstdisable bit before triggering warm reset (CF9 shadow reset).
FEAT-33382: Align CS definition to PPR document

Trusted OS
----------------
PLAT-64168: Fix enabling SPI Locking hardware feature
FEAT-37545 : [PSP TOS] Enable asic_types: NV31
FWDEV-2562: Skip ClearSMMLock for RPL
PLAT-73559 fixing compiler warning
PLAT-81708: Revert multi-block Decryption commits
FWDEV-2538: Add RPL to support A/B partition.
PLAT-81630: Configure IOMMU Bypass when MFD restores MPM
SWDEV-282358 [MI200][SRIOV]PSP can't program MC registers for VF
SWDEV-281753: Clear XGMI AES keys after SDU
PLAT-73559 [CZN Manageability] Expose "Skip Pro Check" API for Manageability TA
PLAT-81641:[MI200][RAS]Correct logic to increment ErrCnt for WAFL Correctable error
PLAT-81487: [RMB] - Unblock TCG Logs Query command (BIOS to PSP) when HSP is failed
SWDEV-278013 : [PSP TOS][RAP] Clean-Up RAP V1 & V2 defines
PLAT-72541: Exposed TPM Type selection for broader use
FEAT-37545 : [navi31][PSP TOS] Enable basic support for navi31 RAP V2
FEAT-33382: Align CS definition to PPR document
FWDEV-1266, FWDEV-2427: [PHX] Enable STB and HSP
PLAT-81566: SW SHA Support unaligned accesses
FWDEV-2398: Support TMR and FMR
PLAT-81548: Add Manageability Functional Driver Id

fTPM
-----
PLAT-72541: Select PSP-FTPM as default TPM mode

DRTM
-----
PLAT-72541: Added TPM Type Selection


Release Version 0.11.0.6D - Cancelled
-----------------------------------
*FTPM updated to version 3.59.0.5

Bootloader
----------------
PLAT-80494: Select APU/NPU security policy dynamically
PLAT-77759: DRTM launch failure when RA2 enabled

Trusted OS
----------------
SWDEV-273505: Support decryption FW with size of more than 4KB
FWDEV-2426: SMN addresses of FICAAR/FICADR in DF v4
PLAT-78580: Boot fail when swap CPU with RAv2 enabled
SWDEV-273884:[NP] Search for non-prod keyID in secure mode properly
SWDEV-280155: [NV31] Implement SPI control sequences (write) in PSP TOS
PLAT-79711: Fix debug unlock on NPU
PLAT-78434: [RMB] Use SW SHA in TEE interface
PLAT-80468: fixing the issue with RDRAND re-seeding in RMB and PHX
SWDEV-263509:[Navi3x] Authenticate and load IMU firmware
PLAT-80944: Enable_PRO_Check for FW to check and control L3 security feature
FWDEV-310: Share hsti_def.h between BL and TOS
SWDEV-275348:[Navi3x] Load IMU GTS  offset registers
SWDEV-278387:[Navi3x] Keep the TOC FW ID table separate
SWDEV-273413:[Navi3x] Load GFX configuration settings to RLC Transfer RAM
SWDEV-278387:[Navi3x] Add GFX_11 support on the tOS
PLAT-77759: DRTM launch failure when RA2 enabled
FWDEV-329: Disable IKEK_TA support for TOS on RPL.
SWDEV-259320 : [PSP TOS] DC Debuggability: dump MP0 TraceLogs
PLAT-80792: [RMB] Enable HSP by default
FWDEV-1239: [PHX] Add z-state support
FWDEV-307: Directly access TMR/FMR regs for DF v4
PLAT-80267:[RPMC]Add RPMC report version to make rpmctool backwards compatible.
PLAT-64168: Addition of flag to enable CS switching
PLAT-80449: Add MPM deep sleep ready condition

fTPM
-----
PLAT-80107: Make TPM1.38 Errata 1.4 fully compliant with BUILD flag

DRTM
-----
N/A

Release Version 0.11.0.6C - Cancelled
-----------------------------------
Bootloader
----------------
PLAT-64168: Remove hardcoded opcode2 info
PLAT-79445: Fix NPU detection in bootloader
PLAT-70421: FIPS RN Development BootRom Func Support

Trusted OS
----------------
PLAT-64168: Enable SPI Locking hardware feature
PLAT-79198:MI200[RAS] - RAS SMU Fatal error is level triggered
SWDEV-257759 : [PSP TOS] DC Debuggability: Add Encryption Library
SWDEV-253904: Update runtime TMR setup for A+A
SWDEV-279046:MI200[RAS] - WAFLC Correctable error need to increment ErrCnt in MCA register
SWDEV-255822 MI200-SRIOV Ucodes Frontdoor Loading
FWDEV-350: Add S3 support for RPL
FWDEV-297: Align TOS fuse offset to CL1398554
SWDEV-277081 : [PSP TOS] Propagate "IsHeadless" flag for navi24 RAP TA
PLAT-78753: Enable EC-eSPI-PSP SPI-ROM Access Interface
SWDEV-273884: [Mi200][NP] Cripple AQL entry in ME Jump Table
FWDEV-319: Add support for saving data to MSMU DRAM
PLAT-80242: Add ENABLE_USB4 in build flags
PLAT-64168: Remove hardcoded opcode2 info
FWDEV-1258: [PHX] support RAP v2
FWDEV-313: [RPL] Enable S0i3
PLAT-80370 RMB: Map RA2 status to Flag FLAG_ID_RA2_STATUS
DERMBE-868: Increase USB max size in secure DRAM (2)
PLAT-80155: fix DFP registers on AER(VGH)/RMB/PHX
PLAT-80242: [PHX] Exclude ENABLE_USB4
PLAT-79651: Update conditions for MPM PCI WLAN sequence
DERMBE-868: Increase USB max size in secure DRAM
PLAT-60131: Add functions for MPM deep sleep
PLAT-64168: ROM-Armor v2 for clients - phase11
PLAT-80051: Remove AEPP buffer in MPM restore API
SWDEV-273505:[MI200] - BUILD_CCP_CTRL_SMN Kconfig aligned for CCP related features
SWDEV-272821: [NV31] Implement the ROM Image Parser in the PSP Sys Drv
SWDEV-274838 : [PSP TOS] Use RAP Policy Alternate List
PLAT-64168: Cleanup of RA2 for RMB program
PLAT-80121: Increase size of stacks in psp kernel of amd-tee2.0
SWDEV-273505: Decrypt image before loading into the destination
PLAT-79203: [RMB] DRTM security policy applied causes violation
PLAT-79201: [RMB] DRTM TMRs not set up correctly
FWDEV-1676: [PHX] E.0.0.8 LSCm change list alignment CL# 1399276
SWDEV-277606: [Navi24] Block NP RAP rollback functionality on headless SKUs
SWDEV-253227: PSP Secure Kernel SVC Call - User guide
AER-519: Send PSPSMU_MSG_DFCSTATE_DISABLE before accessing TMR registers
PLAT-75500: Update anti rollback support for 64-bit SPL fuse
SWDEV-266668 : [PSP TOS] MP0_C2PMSG_62 dump SlaveErrorAddr
SWDEV-263509:[Navi3x] Allocate a FW TYPE ID for IMU FW
PLAT-79866: Increase the size of stacks in amd-tee2.0
PLAT-79386: [RMB] Remove SDMA FW restore on s0i3 exit

fTPM
-----
N/A

DRTM
-----
N/A


Release Version 0.11.0.6B
-----------------------------------
Bootloader
----------------
PLAT-79509: [HSTI]Updated HSTI Status Bitmap Definition
PLAT-70421: FIPS implementation

Trusted OS
----------------
SWDEV-274746:[MI200][RAS] - Rectified the MP0 registers for RAS Recovery handling
SWDEV-264802 : [PSP TOS] return ERROR if no RSMU AEB validated
PLAT-79509: [HSTI]Updated HSTI Status Bitmap Definition
SWDEV-276359 : [PSP TOS] Properly Initialize RAP internal variables
PLAT-70421: FIPS implementation
PLAT-79472: Map MPM FMR memory for MFD
FWDEV-370 - [RPL] Support for PMM: Disable CCP Power Gating
SWDEV-276392 : [PSP TOS] initialize DRV_SYS_GET_ASIC_TYPE_PARAMS
SWDEV-260860 : [PSP TOS] sanity-check VF memory address

fTPM
-----
N/A

DRTM
-----
N/A

Trusted OS
----------------

Release Version 0.11.0.6A
-----------------------------------
*FTPM updated to version 3.58.0.5
*DRTM updated to version 04.11.00.21

Bootloader
----------------
PLAT-73271: Implement MBAT programming on CZNmat=%s PSPFW-v00.11.00.69 .. -- apu_boot_loader/
PLAT-78234 : RPMC not enabled with XMC SPIROM
PLAT-78554:[RPMC] provision fails at the first time on brand new SPI-ROM.
PLAT-78274: Pass stage1 FAR test status to TOS
FWDEV-319: Merge headers for MP2 SRAM and MSMU DRAM

Trusted OS
----------------
FWDEV-1229: [PHX] Initialize ToS (2)
FWDEV-1230: [PHX] Power features
FWDEV-1228: [PHX] RDRAND speedup support
FWDEV-1720: [RPL] Add check for Asic Type using RevID
FWDEV-353 - [RPL] [tOS] Power features
SWDEV-272140 : [PSP TOS] fix Security Violation log progagation
SWDEV-273505: [Mi200] Enable FW Decryption support RWL
PLAT-79079:[MI200]RAS - Corrected mask bit for Ras Err Inj enablement
PLAT-76910: Add support of 16 RPMC fuse slots for RMB - tOS
FWDEV-1229: [PHX] Initialize ToS
PLAT-78920: ACP secure regions are reprogrammable
PLAT-78434: Minor change to Svc_TryAcquireMutex() behavior.
SWDEV-272822: Remove MillerRabinTest side-channel protection
FWDEV-330: [RPL] Fixes for TOS initialization
SWDEV-272140 : [PSP TOS] Propagate Security Violation log from PSP BL to TOS
SWDEV-271190 [MI200][SR-IOV][Azure]: Enable DFC and CAP loading (GFX 9)
SWDEV-271189 [MI200][SR-IOV]: Move MEC VF FW into TMR
PLAT-78434: Add new SVC call Svc_TryAcquireMutex() which does not wait for mutex to be free.
SWDEV-263116:[Navi23] Add support for MACO resume in TOS
SWDEV-274746 : MI200[RAS] - Enable MP1 RAS Error and WAFLC correctable RAS error handling
PLAT-78823: [RMB] handle ACP DMA complete through RSMU
AER-581: New PMFW message for GFX TDR reset event
SWDEV-271188 [MI200][SR-IOV]: Decouple MM-SCH from VCN TMR and move to seperate TMR
SWDEV-270845:[Navi31]Add Navi31 register header files and enable compilation
SWDEV-273883: [Mi200] Disable SRIOV in non-production mode
FWDEV-328: Update PSP SMC message on RPL
PLAT-78140: AM5-stop execution on bixby/prom auth failure (2)
PLAT-78140: AM5- stop execution on bixby/prom auth failure
PLAT-76264: Hash 64K RO region on S3/S0i3 cycle
FWDEV-328: RPL - initialize TOS
PLAT-73721: Add debug unlock support with HSP
AER-577: Revert of "Remove setting ROMBIST_BYPASS while entering S3"
SWDEV-271909: Restore RLCV enable register
SWDEV-271194 [MI200][SR-IOV]: Enhance DFC to support TA whitelisting
SWDEV-272821: [NV31] Implement the ROM Image Parser in the PSP Sys Drv
PLAT-78366: Add zstate build flag
FWDEV-1271: [PHX] Power Management Firmware Interface FW Support
Revert "PLAT-75283: Add CCP Passthrough destination alignment checks"
SWDEV-211340:Rectify RAS Recovery handling in rsmu handling
RTGPLAT-5677 : [NAVI21][SRIOV][non_prod] Set DEBUG_UNLOCK after RegUnroll
SWDEV-273664: [NV21] Falcon display corruption - intermittent
FWDEV-319: Merge headers for MP2 SRAM and MSMU DRAM
SWDEV-271190 [MI200][SR-IOV][Azure]: Enable DFC and CAP loading (GFX 9)
SWDEV-253227: PSP Secure Kernel SVC Call - Interface Definition with Doxygen
SWDEV-270495:[Navi2x] Set TMZ registers as per HW recommendation in PSP TOS
SWDEV-271192 [MI200][SRIOV]: Disable MEC VF FW periodic validation
AER-577: Remove setting ROMBIST_BYPASS while entering S3
SWDEV-272635:MI200[RAS] - Added check for Ras Err Inj status for RAS TA
SWDEV-271191 [MI200][SR-IOV]: Disable Setup VMR/Destroy VMR support

fTPM
-----
PLAT-78364 [CZN]: Migrate to FTPM build using Conan

DRTM
-----
PLAT-78536: Migrate to DRTM build using connan


Release Version 0.11.0.69
-----------------------------------
*DRTM updated to version 04.11.00.20

Bootloader
----------------
PLAT-77348 [RA2] Add addr check for writable region absolute address for AB layout
PLAT-67300: [RN][RPMC]Enable Multiple Fuse Slots on MXIC Part
FEAT-33382: Consume spirom-configuration data

Trusted OS
----------------
SWDEV-272141: Update LIVMIN command for mode 2 reset
SWDEV-272178:[Navi2x] Remove unused structure from dGPU header
SWDEV-272086: Fix VCN counter address in RAM TMR
RTGPLAT-6510:Navi21:UMC MISC6 registers need to be accessed by MP1
SWDEV-270310: Update GCM Enable setting on mode 2 reset
PLAT-76263: Update fwatt loc table on S3/S0i3
PLAT-60779:[VN][HSP][DRTM] Send Hash Data to HSP-fTPM
PLAT-71773: Support PMFW command to clear only GC enable
PLAT-76558: [SP]: Add support for Stormpeak target in TOS
SWDEV-268766: Check last TA entry point type in LoadTa() before returning status
SWDEV-211340 : [PSP TOS][RSMU Violation logging] Revert change to legacy code
PLAT-66844: load iKEK TA into LSB4
SWDEV-211340 : [PSP TOS] RSMU Violation logging - avoid collision
PLAT-59672: [HSP][DRTM]HSP-fTPM Locality Control
AER-487: [AER] Disable TMZ
SWDEV-211340 : [PSP TOS] fix RSMU Violation logging
SWDEV-211340 : [MI200][PSP TOS] enable BUILD_RAP_V2 in SVL
SWDEV-270346:MI200 - Update the xgmi link records to pass to TA
SWDEV-211340 : [PSP TOS] Implement new RSMU Security Violation logging Scheme
PLAT-75283: Add CCP Passthrough destination alignment checks
SWDEV-270535: [Mi200] Enable SysHub Support
PLAT-76991: Rename PAGE_SIZE to ROM_PAGE_SIZE
PLAT-76887: Map USB config buffer using BiosMapSharedMemSmm
FEAT-33382: Enhance validation of spirom-config info in tOS
PLAT-64168: Handle SMI_SpiGetBlockInfo properly with enabled RA2
SWDEV-267746:MI200 - Enable DS_ENB bits for MP0, MPIO and MP1 in MP0 to allow SOCLK DS entry
SWDEV-264802 : [PSP TOS] validate RSMU AEB
PLAT-76251: Update bit configurations for MPM PCIe access

fTPM
-----
N/A

DRTM
-----
PLAT-59672: HSP-fTPM Locality Control Support
PLAT-74210: Conan Support Enabled


Release Version 0.11.0.68
-----------------------------------
Bootloader
----------------
PLAT-76138: [RN/CZN][RPMC]Disable Root Key Auto Provisioning
PLAT-76349: Load the binary headers of ABL entries
PLAT-67300: [RPMC]Support Configuring RPMC Counter Address Multiple Times
PLAT-75744: [CZN]MP2 SRAM0 usage update for Walle-Lite PM logging.
FEAT-33382: Modify structure to adapt more vendor's models
PLAT-75821: Fix early unlock command reading
FEAT-33382: Allow system to boot even with no spirom model

Trusted OS
----------------
PLAT-75534: Update ROM-Armor enforcement status in HSTI-info
PLAT-76347 RMB: Pass PSP-FTPM as TPM config when HSP Disabled
PLAT-75884: System hangs in Storage-initialize loop
PLAT-67300: [RPMC]Support Configuring RPMC Counter Address Multiple Times
SWDEV-258122:[Navi2x] Correct the UMC channel numbers in the headers
PLAT-73457: [RMB] Add Doxygen/Sphinix support for HSP - PSP Interfaces
PLAT-75208: [RA2] Idle system hangs after resumed S0i3 successfully
SWDEV-211107:RAS Recovery handling enabled only for RAS enable
PLAT-75912: [RMB] Added Promontory V2 (PROM21) Device Authentication Key Set
SWDEV-253219: Comment correction; includes RMB
PLAT-75368: The screen will flicker black ... after resume from S4 while playing video...
PLAT-75719: Add USB configuration command support for HC3/7
PLAT-73964: New API to expose Host-OS-Down mode to TA
PLAT-75491: [RMB] Change which unlock policy is applied in unlock flow
PLAT-75305: [RMB] Send PMFW msg to enable smn routers during unlock
SWDEV-257413 [AWS][Navi12] PSP load Driver Cap FW failure
SWDEV-255756: Correct mailbox registers to not use IH (2)
SWDEV-255756:[MI200] correct mailbox registers to not use IH

fTPM
-----
N/A

DRTM
-----
N/A


Release Version 0.11.1.67
-----------------------------------
*fTPM updated to version 3.57.0.5

Bootloader
----------------
PLAT-69795: Allow SMU to access L3 DSM
PLAT-74123[BOOTLOADER] Add a SVC call to set the recovery type specified by ABL
PLAT-72196 : PLAT-73352 [CZN_FP6] SUT boot fail with ROM XM25QU128C/XM25RU128C
PLAT-67072:[RPMC]Adjust RPMC Root Key Programming Sequence

Trusted OS
----------------
TIC-71607: Revert "PLAT-73494: [AER] Save/Restore VCN IP Data (stack/heap/vars) with FW in S3/S4"
PLAT-69795: Allow SMU to access L3 DSM
PLAT-75047: Load VCN FW before UVD is powered on
PLAT-75292: Update RSMU timeout on RMB
PLAT-74494: rollback  [VGH/AER] Enhance S3 performance in stage1 BL
SWDEV-251833:[Navi2x] Prevent update of older USB PD Firmware
SWDEV-249289:[Navi24] Add Navi24 case in RevertRapPolicy_DGPU in PSP System driver
PLAT-74147: Restructure USB loading and validation (2)
PLAT-74147: Restructure USB loading and validation (1)
PLAT-74494: [VGH/AER] Enhance S3 performance in stage1 BL
PLAT-74300:[MI200] GPCOM ring fails due to GPU is fenced off from CPU
 MERO-944: Fix RSA OAEP encryption/decryption algorithms

fTPM
-----
PLAT-75282 CZN: Code Cleanup

DRTM
-----
N/A


Release Version 0.11.0.66
-----------------------------------
*fTPM updated to version 3.56.0.5

Bootloader
----------------
N/A

Trusted OS
----------------
SWDEV-262608: [Mi200]VCN Front Door loading failure (SPG/DPG/DPG SRAM mode)
SWDEV-264694: Fix Video playback issue after S3 resume
PLAT-61278: [VN] [HSP] PCR Measurements in tOS
SWDEV-260624 : [PSP TOS] validate RAP V2 logic
SWDEV-260624 : [PSP TOS] validate L0_EARLY_NONSECURE
PLAT-68230: Receive STB verbosity level through bios-cmd

fTPM
-----
PLAT-73255 : Modify fTPM folder structure to include TPM138 and TPM162

DRTM
-----
N/A


Release Version 0.11.0.65
-----------------------------------
*fTPM updated to version 3.55.0.5
*DRTM updated to version 04.11.00.1E

Bootloader
----------------
FEAT-33382: Modify logic of searching spirom model
PLAT-74020: Disable iGPU based on fuse value
FEAT-33382: Cleanup of spi-rom related code
PLAT-72860[BOOTLOADER]Prevent triggering recovery mode for entries 0x58/0x59
PLAT-72837: [RPMC]Fused ASIC Provision Key on Test Key Programmed SPI-ROM
FEAT-33382: Cleanup of spirom-config file

Trusted OS
----------------
SWDEV-262471: Add Smart Trace Buffer log for RSMU Timeout in Trusted OS
SWDEV-260624 : [PSP TOS][clean-up 6] fix sending SMU GFX On/Off
SWDEV-260624 : [PSP TOS][clean-up 3] for handling GFXOFF_EXIT
SWDEV-260624 : [PSP TOS][clean-up 2] move IsSecurityPolicyRequired() for common use
PLAT-73808: Allow BIOS to retrieve SPL value of presently booted system
SWDEV-260624 : [PSP TOS][clean-up 4] remove un-used argment
PLAT-71326: [RMB] update to support unified A0/B0 PSP FW
DERMBE-648:[RMB] Remove MP0_RSMU_CLK build flag
SWDEV-260624 : [PSP TOS][clean-up 1] use "rap_if.h"
SWDEV-264330: Update MI200 minimum BL version for SDU
SWDEV-262608: [Mi200]VCN Front Door loading failure (SPG/DPG/DPG SRAM mode)
SWDEV-249287:[Navi24] Add case to Identify Navi24 ASIC and set gAsicType
SWDEV-260860 : [PSP TOS] fix DrMapSharedMemSyshubMmhub
PLAT-65292: HSP S0i3 Support
AER-426: increase idle stack size
PLAT-71140: Enable ACP SRAM through mailbox
FEAT-32948: Store first 4 bytes of TA Uuid instead of PID
PLAT-73607: [AER] set registers before S3 entry
PLAT-73600: Load, authenticate and decompress WLAN driver
SWDEV-214841 - Update to Arm Compiler v6
PLAT-73494: [AER] Save/Restore VCN IP Data (stack/heap/vars) with FW in S3/S4
PLAT-7319: Remove FindEventId for pcr measurements buffer from BL
SWDEV-251569 : [MI200][PSP TOS] fix RAP V2 validation to ignore bit[1:0]
FEAT-33382: PLAT-64168: Consume spirom-config data in tOS
SWDEV-248568 : [MI200][PSP TOS][RAP V2] add supprt for MI200 unroll
PLAT-73428: Add support for compressed FW
SWDEV-262759 : [navi21][PSP TOS] RAP TA validation of L1 policy fails after VF_FLR
PLAT-70272: Add MP0_RSMU_CLK build flag to RMB

fTPM
-----
PLAT-73379 CZN: Update Makefile and dependencies.txt to build with Conan
PLAT-73263 CZN: Smart Trace in FTPM
PLAT-71169 CZN: Port backward compatible changes in TPM 1.38 Errata 1.4

DRTM
-----
SWDEV-256928: [SCPC] HVCI gets disabled when SMM Isolation gets disabled in the BIOS


Release Version 0.11.0.64
-----------------------------------
Bootloader
----------------
PLAT-72744: Allow initial SPL fuse value to be set during FAR enablement
FEAT-33382: Refactoring of spirom-config-binary related code
PLAT-73064: [RPMC]Using RPMC State Structure to Store RPMC Global Variables
PLAT-72860[BOOTLOADER]AB recovery cannot work when binary type 0x59 corrupted
SWDEV-220087: fix Coverity issue - HFA
PLAT-72909: Remove PLATFORM_MODEL_ID check for PSB enable
SWDEV-259407: Make TMZ_Key count ASIC specific
FEAT-33381: Pass appropriate information of SPI-ROM configuration to PSP tOS.
LWPQA-588: fix Coverity issues

Trusted OS
----------------
SWDEV-262269: [VGH/AER] S3 entry flow should save MSMU DRAM
PLAT-72744: Allow initial SPL fuse value to be set during FAR enablement
SWDEV-251895 [NV][SRIOV] Add SRIOV mailbox rate limiting in PSP.
SWDEV-262133: [NV23] Enable STB in PSP FW
SWDEV-253219-PSP-Gfx driver interface documentation
PLAT-73181: Applies unlocked sec. pol. for UVD
PLAT-73313: Change the Base address of HSP_PSP_COMM_BUF
PLAT-73316: [CZN] Checking size for IP FW Save/Restore breaks S3 suspend/resume
PLAT-73303: created RdrandThread for RMB
PLAT-72686: Organize use of shared DRAM - TOS
RTGPLAT-6123: [Navi12][AWS][SRIOV]: Disable VF Mailbox access to Trusted Applications
PLAT-67970: Setup Sec Interrupt FIFO on S3 exit
SWLSD-41: Porting AGA-03 and AGA-01 to amd-tee2.0
RTGPLAT-6111: [NV21]: Fix issue related to wrong check of device and revision id
PLAT-73202: Refactoring of code around STB
PLAT-72504: Enable RSMU interrupt for GFX (2)
PLAT-69424: PLAT-72841: [CZN] System hangs with post code A5F0 in stress test
SWLSD-40: Port over AGA-04 fix to amd-tee2.0
RTGPLAT-6086: Navi21 : MP1 need to access UMC MISC6 registers
FEAT-32948: Firmware Attestation Report NV23 TA support
PLAT-72744: Fix tOS builds
PLAT-58313: Add USB4 PHY loading
SWDEV-261431: [NV22] Enable STB in PSP FW
PLAT-72761: Add API to read from/write to MPM SRAM
PLAT-72949: [AER] Separate PSP FW tOS build targets AER from VGH
PLAT-72909: Remove PLATFORM_MODEL_ID check for PSB enable
PLAT-61278: [RMB] [HSP] PCR Measurements in tOS
PLAT-70811: Notify ASD driver of zstate entry and exit
SWDEV-260586: [MI200] Enable Trace Log in TOS
PLAT-72890: Reduce allocated stack sizes in System Driver
DERMBE-563: Enable posted writes for bootrom z-state exit
SWDEV-259407: Make TMZ_Key count ASIC specific
SWDEV-260011:Update MI200 TOS sign function
AER-355: [A1] Unsecure part will hang when entering S3/S4/reboot/shutdown
SWDEV-257413 [AWS][Navi12] PSP load Driver Cap FW failure
PLAT-68882: Add offset in MPM DRAM for AEPP buffer
PLAT-72504: Enable RSMU interrupt for GFX
PLAT-68881: Add functionality for WLAN access API
PLAT-67214: Enable FW Att on TOS for RMB
PLAT-67214: FWAR always maps SYSHUB on APU
FEAT-35003: Renaming Fw Att DB feature from fwar to fwatt
PLAT-64168: ROM Armor v2 for clients - phase10
SWDEV-249286:[Navi24] Add Navi24 register headers and enable compilation for Navi24.
SWDEV-249290:[Navi24] Use the right number of UMC channels
PLAT-67214: FWAR uses SYSHUB if no GPUVA
PLAT-71511: [RPMC] Report Current RPMC Counter Addresses to BIOS
PLAT-71181: [RMB] Update A0 fuse addresses
PLAT-67970: [RMB] Skip RSMU programming for sec interrupts
PLAT-70276: Save Mp0 status regs across z-state
PLAT-71707:[RMB] Set S3 bit in MP2 OVERRIDE on S3 entry
PLAT-72299: Remove MFD_VALIDATED check for BIOS cmd 0x49

fTPM
-----
N/A

DRTM
-----
N/A

Release Version 0.11.2.63
-----------------------------------
Bootloader
----------------
NA

Trusted OS
----------------
PLAT-69424 : [CZN] System hang with post code A5F0 in BIOS flash stress test - reverted old workaround
                   and provided a proper fix

fTPM
-----
N/A

DRTM
-----
N/A

Release Version 0.11.1.63
-----------------------------------
* CZN SPL table updated to v05.11.01.63

Bootloader
----------------
PLAT-71974: Legacy recovery process stuck in 0xEEA90022
PLAT-71710: Fix fusing of Bios Key Revision ID
PLAT-70156: SUT stuck at Postcode 00000000 with ROM MX25U25673G
PLAT-71863: Update BL/debug_unlock to armcc v5.06
PLAT-69014: SVC call to disable RDRAND enhancement

Trusted OS
----------------
PLAT-69424 : [CZN] System hang with post code A5F0 in BIOS flash stress test.
PLAT-71710: Fix fusing of Bios Key Revision ID
PLAT-64628: Adds cmd to show security violation timestamp
SWDEV-258598: Interleave dis-assembly with source code
LWPQA-564: Dead default in switch statement
LWPQA-561: Dead default in switch
LWPQA-562: Unnecessary header file
LWPQA-563: Unnecessary header file
LWPQA-560: Unnecessary header file
PLAT-71511: [RPMC] Report RPMC Available Counter Addresses to BIOS
RTGPLAT-5747:[NV2x]:Debug unlock thread in trusted OS need not be killed for unlocked device.
SWDEV-257638: Dont error out loading of USB PD FW when TMR is not present
PLAT-71433: Document the used bits of C2PMSG_38 register
PLAT-71181: Align RMB header files to MTO 1322172
PLAT-70273: Wait for DF restore on z-state exit

fTPM
-----
N/A

DRTM
-----
N/A


Release Version 0.11.0.62
-----------------------------------
* DRTM updated to v04.11.00.1D

Bootloader
----------------
PLAT-71298: Add corruption info for recovery mode in tOS.
PLAT-64168: ROM Armor v2 changes - phase9
PLAT-70258: Support 2 instance type 0x62 for A/B recovery
PLAT-71042: Fix smn_with_size mapping/unmapping bugs
PLAT-71380: Add missing Svc_BIOSDirectorySearchV2 declaration
PLAT-71091: Fix BIOS OEM leaf key validation
PLAT-70767: [RPMC] Handle Counter Reading Fail Case
PLAT-68343: [RPMC] Update RpmcAvailableFlag in RPMC disabled case

Trusted OS
----------------
PLAT-71298 Add corruption info for recovery mode in tOS.
PLAT-64168: ROM Armor v2 changes - phase9
RTGPLAT-5690: Resolved Guest Fw load failure
RTGPLAT-5765: [NV2x] RAP L0 Rollback Validation failure via RAP-TA
SWDEV-256542: [Mi200] Flip override bit UTCL2IUGPAOVERRIDE
SWDEV-256542: [Mi200] Override CP Guest Phy Addr bit for UTCL2
AER-232: [A1]Secure part can't load win GFX driver
PLAT-70750: Rollback of [AER][VGH] Binaries named in the TypeId format.
PLAT-66360: [RMB] Update CS-SEED-based KDF and Key Unwrapping
PLAT-70811: Add zstate entry/exit driver command IDs
PLAT-70274: Added Z-state init to S3-resume
PLAT-70268: Unpowergate CCP on z-state exit
MNTPLAT-745: HID-SPI banged after S0i3 with DRTM enabled
PLAT-68879:Add functionality to MPM read/write reg API
PLAT-70272: Change TOS to use MP0 RSMU clock
AER-206: Move UVD security accesses to UVD PG programming
PLAT-63918:[Navi] Enable protection bit for CCP side channel protection
SWDEV-240041: Resolving a bitwise and typo and coverity defect
PLAT-70274: Moved z-state setup code out of z-state entry
PLAT-70079: TOS should ensure driver sets up TMRs before allowing loading of gfx fw
PLAT-68839:Add functionality to MPM memory mapping API
SWDEV-213799: MPIO RAS error handling in TOS
PLAT-68882: Add API to restore and verify AMF FW in MPM DRAM
SWDEV-251569: [MI200][tOS][RAP] RAP V2 validation integration via RAP TA
DERMBE-439: Unmask SMU cmd interrupt on z-state entry

fTPM
-----
N/A

DRTM
-----
MNTPLAT-745: HID-SPI banged after S0i3 with DRTM enabled

Release Version 0.11.0.61 (Cancelled)
-----------------------------------
Bootloader
----------------
PLAT-70737 Fix SPI FIFO size
PLAT-70767 RPMC read counter before releasing cores
PLAT-70595: Remove alignment constraints when copying from SPIROM
FEAT-33379: Configuration of ROM through SPI-ROM Configuration external binary
PLAT-70761: Refactor PSP-SMU mailbox commands for APU
PLAT-64168: Changes for ROM Armor v2 - phase8
DERMBE-337: Apply GFX DLDO policy on PMFW cmd 0x1B
PLAT-70432 RPMC handle extended status 0x00
PLAT-70464: Make MP2-SFH default
PLAT-70346: Remove unnecessary debug prints

Trusted OS
----------------
LWPQA-462: Replacing _smc(0) syntax on SmcCall
SWDEV-255293 - [MI-200]: Mode 2 Reset - suppport GFX SDP Port disable
LWPQA-510: Unnecessary header include
LWPQA-508: Added #ifdef guard on include for RMB
PLAT-70522: [RN] Adding ATAG parameters to pass on DMAr information to KVM.
AER-165: Do not enable UVD_REG_FILTER_EN in non-secured BIOS on Chachani systems
SWDEV-255233: Update MI200 TOS FW Id
PLAT-60666: [VGH] Implement TMZ in PSP TOS
PLAT-70465: RN support for X470 annd B450 Promontory Chipsets
PLAT-60176: Updates gfx component list for RMB
PLAT-70750: [AER][VGH] Binaries named in the TypeId format.
PLAT-64168: Changes for ROM Armor v2 - phase8
FEAT-34947: [tOS][RAP] Robustness improvements for GFX DPM handling for RAP validation
SWDEV-249497: [Mi200] Save/ Restore bootrom table fields into SRAM
SWDEV-251569 : [PSP TOS] RAP v2 support in RAP TA
DERMBE-337: Apply GFX DLDO policy on PMFW cmd 0x1B
PLAT-70625: [CZN] PRO fuse data register change
DERMBE-298: [RMB] Apply UVD policy after UVD power up
PLAT-70616: Add mutex to SendPspSmuMessage function
SWDEV-248735:MI200 Rectified internal VCN register offsets
PLAT-70549: Set API permissions for MFD
SWDEV-251576 : GFX DPM: Restore CLKB / VDD_GFX L0 Security Settings on GFX OFF exitT
SWDEV-252903: [MI200][tOS][RAS] Whitelist Register Access Failure
SWDEV-248568 : [PSP TOS] RAP v2 Update Based on additional comments
PLAT-70349 VGH: Add function for DRV_SYS_CMD_ID_PRIV_GET_HSP_SRAM_SMN_ADDR
PLAT-60493: save MSMU dRAM on S3
PLAT-70063: Include tee_crypto.h in tcg_logs.h
PLAT-70080: [VN][RMB] Update VCN internal reg offsets
SWDEV-248568 : (amd-tee2.0) Update RAP V1 EventTypes
PLAT-67368 : System BSOD 0xEA in S4/S5/Reboot loop.
SWDEV-253502 : fix pointer issue (because of RAP V2 change to PSP TOS)
SWDEV-253120: Apply GRBM CAM policy on non-secure or unlocked part
SWDEV-253168: Enable TOS profiling for Navi21
RTGPLAT-5037:[Navi2x] LIVMIN/D0I3 support
SWDEV-248568 : RAP V2 Integration in Trusted OS for L1 policy apply
FEAT-34773: Caller side implementation of fwar
FEAT-32981: Fw Attestation Database API
SWDEV-247728 [NV][SRIOV]Introduce a PF command for VF FW clean

fTPM
-----
PLAT-66418 VGH: SWDEV-229523 Merge HSP NV Support changes to amd-staging branch
PLAT-70462 VGH: [FTPM] Get HSP SRAM address from PSP
PLAT-68945: FTPM TA code enhancement against CERT violations

DRTM
-----
PLAT-68805: DRTM TA binary name enhancement and minor compile error fix.


Release Version 0.11.0.60
-----------------------------------
Bootloader
----------------
N/A

Trusted OS
----------------
PLAT-64168: Enforce ROM Armor v2 - phase7

fTPM
-----
N/A

DRTM
-----
N/A

Release Version 0.11.0.5F
-----------------------------------
Bootloader
----------------
PLAT-69153 [BOOTLOADER]RPMC tool reports incorrect status after resuming from S0i3
PLAT-69745[BOOTLOADER]A/B Recovery reason logging support
PLAT-68205: [RPMC] Remove Duplicate Macro Definitions

Trusted OS
----------------
PLAT-69289: [tOS] Pass Tpm Ext NV information using FLAG_ID_TPM_EXT_EN
PLAT-69716: Armcc Compiler upgrades from v5 to v5.06
PLAT-68862: [TOS] Add data checking to the CcpGenerateRandom
PLAT-61278: [VN] [HSP] PCR Measurements in tOS
PLAT-69710:Replace hardcoded values
PLAT-66316 VGH: Set HSPNV buffer CmdResp field Bit 31 to 1 by HSPNv thread in system driver during Interface Setup

fTPM
-----
PLAT-68945: FTPM TA code enhancement against CERT violations.

DRTM
-----
N/A


Release Version 0.11.0.5E
-----------------------------------
* Cezanne: Switched to Cezanne-specific signing keys

Bootloader
----------------
PLAT-69759: SVC call to enable extended fTPM storage
FEAT-33378: Configuration of ROM through SPI-ROM Configuration external binary
PLAT-67627 [BOOTLOADER]System can't boot with case 2&3 of BIOS layout
PLAT-61152: [RPMC]Support of RPMC Capable Macronix SPI-Parts
PLAT-69289: [BOOTLOADER] Pass fTPM extended storage flag to TOS
PLAT-57225: RDRAND performance enhancement
PLAT-66438: remove incorrect code from RPMC
PLAT-67620: SUT failed to boot the first time with GD25LQ128D QE bit cleared
PLAT-60739: [RPMC] Remove Redundant Code
PLAT-68679: Clear the MMU page tables on startup
PLAT-67218: [RPMC]Add ADS Check for Giga Device Parts

Trusted OS
----------------
SWDEV-252142: [MI200][RWL] Fix build error due to misaligned concatenation
SWDEV-214841 - Update to Arm Compiler v6
SWDEV-249184: Disable TOS profiling for Navi21
SWDEV-251923: fix usbpd update issue
PLAT-69694: [REV] Disable HSP in default on ToS
SWDEV-214841 - Update to Arm Compiler v6
PLAT-68599:Add API to Initialize MFD
SWDEV-250905:[Navi2x] Clear the "boot mode" after the BACO boot
 FEAT-33002: enable spi access functions for NV21
DERMBE-231: Run USB configure command to only in SMI mode
DERMBE-325: Add SMU load USB FW cmd arguments for RMB
PLAT-57225: RDRAND performance enhancement
SWDEV-250408: [MI200] Fix RWL binary load failure due to skipping PSP-FW-header twice
PLAT-67835: [AER] exclude CVIP and CLKA3 on RSMU table
SWDEV-247524: [NV21][tOS] Skip GFX Sec-Pol reapplication in secure-unlocked state
PLAT-69000: [CZN_AM4] No video with hang PC: A69B while running reboot
PLAT-68843:Add functionality to MPM SRAM mapping API
SWDEV-211107:MI200-RAS: Rectify bug in MCA Syndrom register access
SWDEV-211107:MI200-RAS:SMN Slave Timeout and SMN Data Parity handling
SWDEV-250303: Update PSP TOS to pass down VFID from GFX Mailbox
SWDEV-211109: [Mi200] Handle Poison Data conumption (dGPU)
PLAT-68190: Pass MPM config and DRAM address to BIOS
SWDEV-246861:MI200-RAS : Handle WAFLC interrupt
SWDEV-248518:MI200-VCN 0/1 FW move Cache/Data in seperate TMRs

fTPM
-----
PLAT-68805: FTPM TA binary name adjustment.
PLAT-69442 CZN: [FTPM] Configure TPM NV size to 32K/16K based on FLAG_ID_TPM_EXT_NV_EN from PSP tOS

DRTM
-----
N/A


Release Version 0.11.0.5D
-----------------------------------
Bootloader
----------------
PLAT-65875: Add defines for hard-coded values in TPM SVC Call
PLAT-68637: System can't boot with ROM XMC25QH256B
PLAT-68593: Cezanne signing for firmware components
PLAT-68343: [RPMC] Provisioning RPMC Key on SPI Parts already Programmed

Trusted OS
----------------
SWDEV-248077: Fix return value during error case
FEAT-33002: [NV21] enhace block protection for SPI access
PLAT-68494: Add API function calls to PrivDispatch_v2
FEAT-33002:[NV21] use the hard coded hmac key from BL
PLAT-68090:Update firmware file names
PLAT-67722: Skip MPM RSMU interrupt setup when MPM is disabled
PLAT-68593: Cezanne signing for firmware components
PLAT-66947: Add SMU-to-PSP cmd for CLKB GC sec policy
PLAT-68504: Update USB unified binaries to search by SocFwID for relevant programs
SWDEV-211109: [Mi200] Handle Poison Data conumption (A+A)
PLAT-68343: [RPMC] Provisioning RPMC Key on SPI Parts already Programmed
PLAT-66314: support Aerith on amd-tee2.0
PLAT-68510: [VN] ISP FW loading GFX-9 conditional compiling bug fix
SWDEV-240694: [NV12][Virtualization] Resolve AWS EventGuard5 test

fTPM
-----
N/A

DRTM
-----
PLAT-68541: Update SOC FW ID of DRTM TA in PSP FW Image Header
PLAT-67985: DRTM TA code enhancement against CERT coding standard violations



Release Version 0.11.0.5C
-----------------------------------
* Renoir L0 Security policy is updated to B.9.0.78
* Renoir L1 Security policy is updated to B.9.1.78
* Renoir SPL table  5.11.0.5C
* Cezanne SPL table 5.11.0.5C

Bootloader
----------------
PLAT-68313: Remove Svc_ReadSecureRTC implementation
PLAT-66438: avoid legacy registers in RPMC
PLAT-64168: ROM-Armor ver2 for client - phase5

Trusted OS
----------------
RTGPLAT-4734: [Navi22] TMR setup of VCN1 shall be done based on Clock setting.
PLAT-68387: Unified table entries need to adhere to specified struct
PLAT-67407: [VRMR]: Fix the coverity defects
PLAT-64168: Enforce ROM Armor v2 security-policy - phase6
FEAT-33001:Boot config data bug fix
DERMBE-279:[RMB] Update security violation logging
PLAT-67804:update reg to LSE 1294576
SWDEV-246295:NV21 - Enabled the sharing of XGMI Topology to SMU
PLAT-64168: ROM-Armor ver2 for client - phase5
SWDEV-248234: [Navi23]Enable NP mode for nv23
PLAT-68081: FwType and Subtype must be enforced when loading/validating USB PHY FW
PLAT-68076: Fix dGPU compile warning
SWDEV-245537: [NV21] Support preset Trace Log message in the TOS System Driver

fTPM
-----
N/A

DRTM
-----
N/A



Release Version 0.11.0.5B
-----------------------------------
Bootloader
----------------
PLAT-67894: Add BIOS Key antirollback enforcement
PLAT-67664: Increment SPL value for Renoir PSP components for FAR deployment
PLAT-67810: [BOOTLOADER] Make key derivation compatible with TOS
PLAT-67015: Support of RPMC Capable Giga SPI-Parts
PLAT-66702:[BOOTLOADER]Emit Morse coded sound on errors
PLAT-66608: [RPMC]Remove Redundant Code and Add More Annotations

Trusted OS
----------------
PLAT-60855: [TOS] Add APCB sign/validate BIOS commands
SWDEV-247939:[Navi2x] Fix Debug unlock failure issue
SWDEV-248077: Fix the coverity errors
PLAT-67664: Increment SPL value for Renoir PSP components for FAR deployment
SWDEV-240996:Updated TMR Fabric ID and VCN/VCN1 defines for LSE
PLAT-67579: update A/B recovery in ToS
DERMBE-272: [RMB] Remove MMHUB reg s0i3 save/restore
PLAT-62057:[RMB] remove the saving of MSMU7 in s0i3
RTGPLAT-4707:[Navi23] Correct the MMHUB0 FID value
SWDEV-247528: Reset VCN counters on VCN FW load in TMR region
SWDEV-246727: Fix encrypted counter location in VCN TMR memory
SWDEV-246727: fix build flag issue to get VCN encrypt conter offset
PLAT-66446: [CZN]pre-requisite check control to manage DRTM enablement
SWDEV-245749: [MI200][RWL] Update Register Access Whitelist (RWL) for RAS section
SWDEV-241899: [MI100][tOS] Bug Fix in xGMI-TA read-write API core function
PLAT-66608: [RPMC]Remove Redundant Code and Add More Annotations
SWDEV-244681: Add Write enablement/ disablement to DF Fence macro
PLAT-58030: Move rsmu_config.h for RMB and VGH to shared_bl2os
SWDEV-246092: RMB [VN] S0i3: DMCUB sequence for S0i3
SWDEV-240996:MI200 - Header files updated to LSE bootcode
FEAT-33001: Cleaning up SPI controller

fTPM
-----
PLAT-67820: MakeFile change to add SPL Value in FTPM FW Header

DRTM
-----
PLAT-67293: Enable DRTM service only on FAR-enabled system


Release Version 0.11.0.5A
-----------------------------------
Bootloader
----------------
PLAT-66529 new Soft Chain Fuse bit for port 80 writes

Trusted OS
----------------
PLAT-67370, PLAT-67405: Promontory LP chipset support for CZN
PLAT-66529 new Soft Chain Fuse bit for port 80 writes
SWDEV-245870: [Mi200] Protect BL reserved SMN TLB
PLAT-66825: [TOS] Align the BL_TMR_INFO's address fields
PLAT-67400: [VRMR]: Correct the number of TMR slot
PLAT-65009 RN: Provide increment of SMC transaction status back to fTPM driver
DERMBE-231: Read from and write to USB configuration registers
DERMBE-233: [RMB] Update DMUB soft reset register
FEAT-33357: [NV21] [tOS] Trigger SMU to exit GFX-OFF before validating L0 and GFX_ON RAP validation

fTPM
-----
PLAT-65009 RN: FTPM wait for PSP Storage update completion before responding to TPM2_Shutdown

DRTM
-----
N/A

Release Version 0.11.0.59
-----------------------------------
Bootloader
----------------
LAT-67069: Fix MP0_OVERRIDE Register Definition Overlapping Issue
PLAT-66608: [RN] RPMC Enalbe Fail on SPI ROM
PLAT-60843: Add back the build change to sort linked files
PLAT-63504: [BOOTLOADER] Move PSP DRAM mapping after it is ready
PLAT-65714: [RPMC] Fix Root/HMAC Key Update Fail Issue

Trusted OS
----------------
PLAT-66652: Load MFD from secure DRAM region
SWDEV-244097:MI200 Update MAX_HD_LINK macro to support 128 link records
FEAT-33002: [Navi21],bug fixes for boot config feature
PLAT-67136: Set Recovery flag when booting from partition B
SWDEV-245982: fix TOS to return the error code during PDFW update sequence
PLAT-67012: [RMB] Update PSP only registers saved to MP2 SRAM
PLAT-60183: [RMB] Power gate CCP when MP0 is idle
PLAT-66136: [RMB] Add Z-state CCP register Save/Restore
SWDEV-245706 Remove vfgate auto-disable.
SWDEV-245704 Check CAP-loaded for all gest FW, including ones not in DFC.
SWDEV-245702 Stop clearing DFC immediately after it is loaded.
SWDEV-245701 Clear driver CAP binary for VF on VFGATE_ENABLE.
SWDEV-245699 Go back to using known-working MMHUB mapping function for DFC TMR.
SWDEV-245696 Fix setting of DFC-loaded flag for host-guest compatibility.
FEAT-33004: [NAVI21], support new GFX command to get set or invalidate
PLAT-66608: [RN] RPMC Enalbe Fail on SPI ROM
PLAT-66968: Trigger recovery in TOS when FAR enforcement fails loading modules
PLAT-66841: [RMB] Change MSMU instance used for MSMU save/restore
SWDEV-244739: [MI200] [tOS] Bug fix for searching into hashtable for whitelisted registers
RTGPLAT-4013: Navi21: Fix SMU timeout issue if main PMFW is not loaded
RTGPLAT-4013: Fix TMR address issue while updating USBPD update
RTGPLAT-4941: [RMB] Change MSMU scratch regs used for RLC info
PLAT-66133: Fix virtual address mapping in MSMU dRAM save
PLAT-60843: Add back the build change to sort linked files
SWDEV-244739: [MI200][tOS] Implement DrvSys RAS whitelist register access API Functions
SWDEV-245308: use feature specific build options in VGH / RMB
PLAT-65447: [RMB] Expand VCN TMR in PSP
DERMBE-206: Add check if RLC TOC is loaded before use
FEAT-33004: remove obsolete function.
SWDEV-242749: Fix for firmware coding standard (2)
FEAT-33001: Temporary commenting out SPI init until integration testing
SWDEV-244420:[Navi23] Use the right number of UMC channels

fTPM
-----
N/A

DRTM
-----
PLAT-66955: DRTM TA SPL value injection via TA property
PLAT-66830: DRTM TA minor code enhancement(debug/production version differentiation, error code optimization, address assignment optimization)


Release Version 0.11.0.58
-----------------------------------
Bootloader
----------------
SWDEV-243209: [NV21] Load Boot Config data in PSP BL

Trusted OS
----------------
FEAT-33001: Update SPI controller interface
SWDEV-233192: gAsicType = ASIC_VGH breaks GFX HMD
SWDEV-244681: [Mi200] Support for UMC GPU Fence register modifications
PLAT-61278: [VN] [HSP] PCR Measurements in tOS
PLAT-66342: [CZN] Wireless Manageability should not be enabled on non-pro SoCs
[RELEASE][Navi12][SRIOV] Release Version 00.18.00.56
SWDEV-241899: Generalize Hashtable Interface, Improve Internals & Map WL entries to WL-Hashtable
PLAT-66446: Enable_PRO_Check for FW to check and control L3 security feature
FEAT-33001: Read SPI FW through SMU IO interface
SWDEV-232438: Update TOS SDU for MI200 MP1 unlock
[RELEASE][MI200] Release version 00.27.00.58
SWDEV-242889: [NV21] Add further validation to driver TMR region creation
DERMBE-165: [RMB] Update GFX TOC FW IDs
SWDEV-243799: MI200 - Disable sharing of Topology for XGMI DPM

fTPM
-----
N/A

DRTM
-----
N/A


Release Version 0.11.0.57
-----------------------------------
** SPL table version 5.11.0.56 is included

Bootloader
----------------
PLAT-65714: RPMC separate status and response

Trusted OS
----------------
SWDEV-243807 Add DFC case to ResetIpFw().
PLAT-66297 Corrupted the entry 0x44/0x58/0x59 can't enter recovery mode
SWDEV-243808 Fix DRV_CAP alignment, must be 16 for CCP copy.
SWDEV-211109: [Mi200] Handle Sync Flood exeption as a result of DF Freeze
SWDEV-243799:MI200 Enabled loading and reloading of PMFW
SWDEV-228638: AMDSPI OS driver caused DRTM Failure in OS
PLAT-66135: Move Z9 entry message ack to start of handler
SWDEV-242868: [Mi200] Get RAS error inj permission from either mbx or GPIO
SWDEV-243591:[Navi22] Fix build flag for VCN1 TMR set up
SWDEV-240041: Removed typedefs due to coverity defects
RTGPLAT-4852: Navi22 Non-production enablement Navi22
PLAT-65823: FAR/SPL state check feature of DRTM Sequence
RTGPLAT-4852:[Navi22], fix number of TMZ index/data
RTGPLAT-4013: Navi21: Fix SMU timeout issue if main PMFW is not loaded
SWDEV-236998: Navi21: fix BSOD issue when copying FW from System memory to LFB
SWDEV-211107: [Mi200] Support mode1 reset
SWDEV-216591: Secure BIO - ISP FW authentication and loading
SWDEV-237329: [Navi 1x, 2x]: psp_os: Enable profiling for TOS
SWDEV-237329: [NAVI 1x, 2x]: psp_os: Add capability to profile TOS
SWDEV-241899: [MI200][tOS] Init register access whitelist binary
SWDEV-242924: [NV21] Enable STB support in TOS

fTPM
-----
N/A

DRTM
-----
PLAT-65823: FAR/SPL state check feature of DRTM Sequence
PLAT-64523: SMM Supervisor Production Key & SPL Enforcement

Release Version 0.11.0.56
-----------------------------------
Cancelled

Release Version 0.11.0.55
-----------------------------------
Bootloader
----------------
N/A

Trusted OS
----------------
RTGPLAT-4780:[Navi2x] Correcting the COMMON_COMPILE_TIME_ASSERT on FW ID table
SWCSD-1364: Fix issues reported by legal scan's tool
RTGPLAT-4780:[Navi2x] Add the missing FW ID table entry
SWDEV-216591: Secure BIO - ISP FW authentication and loading
PLAT-63640: [RMB][HSP] Add PCR measurements in TOS

fTPM
-----
PLAT-65812 RN: Fix for TPM vulnerability--non-orderly shutdown-failedTries

DRTM
-----
NA


Release Version 0.11.0.54
-----------------------------------
Bootloader
----------------
PLAT-64168: ROM-Armor ver2 for client - phase4
PLAT-63653 Properly serialize SPI commands

Trusted OS
----------------
PLAT-62057: Revert change in SaveMSMUdram
SWDEV-241508 Changed FW clear command to use actual FW size.
PLAT-65659: Access SECIP13 through SMN in kernel suspend
SWDEV-206580: Encrypted FW - use feature specific flags
SWDEV-241482: Add asic specific build option file
PLAT-62057: [RMB] Save MSMU dRAM contents on S0i3 entry
DERMBE-134: [RMB] Update MMHUB FID from 0x6 to 0x9
SWDEV-214033: TOCTOU in validation of GPU IP firmware enables loading unvalidated image data
PLAT-63431: Return SPL fuse value on query command from BIOS
SWDEV-241863: Fix compilation warning in SYS DRV for non-dGPU targets
PLAT-64921: [RMB] added new line to rmb_hw_regs.h
PLAT-64921: [RMB] Update register defines to LSD CL 1269420
SWDEV-241654: Revert non-volatile register types
SWDEV-241046: [MI200][tOS] Load register access whitelist binary
DERMBE-134: [RMB] Increase define for MAX_SDMA_FW_SIZE to 8320 DWORDs
DERMBE-134: [RMB] Update MMHUB FID from 0x6 to 0x9

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.53 (Not promoted)
-----------------------------------
Bootloader
----------------
PLAT-60317 : SUT not boot with ROM XM25QU128BH
PLAT-63845: [RN] Use RPMC fuse and BIOS command as condition to program RPMC Prod Root Key
PLAT-59100:[BOOTLOADER]fixed the compiling warning of type case

Trusted OS
----------------
TGPLAT-4707:[Navi23] Correct the MMHUB FID
RTGPLAT-4642: Navi22: Enable VCN1 in Trusted OS
PLAT-62746: Log agesa driver load status
SWLSD-12: Address concern of privilege escalation from Driver to tOS or DrvSys.
SWDEV-240325: [Mi200][RAS TA] Add RAS TA permission list based on KeyID
SWDEV-240041: Added in-line suppression for discussed errors
FEAT-32964: Send max number of VFs to TAs.
FEAT-32965: Adding new GFX command to get number of VFs from GIM driver
FEAT-32969: CLean up TA session context for specific Vfid:
SWDEV-232312 TOS saves CCXSEC MSMU dRAM to PSP private memory
FEAT-32964: Increasing MAX TA session from 16 to 32:

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.52 (Not promoted)
-----------------------------------
Bootloader
----------------
PLAT-64900: [BUILD] Revert "Make build identical on different environments"
PLAT-63500: [RPMC]Add BIT9 in HSTI to specify if RPMC SPI-ROM is avilable
PLAT-63843: [RN] RPMC Root Key provisioning at Manufacture
PLAT-60256: Fix SPL value fuse issue identified from FAR testing on Renoir

Trusted OS
----------------
PLAT-64900: [BUILD] Revert "Make build identical on different environments"
PLAT-63500: [RPMC]Add BIT9 in HSTI to specify if RPMC SPI-ROM is avilable
SWDEV-231923: Store HSP data when PSP enters to S0i3
PLAT-63843: [RN] RPMC Root Key provisioning at Manufacture
SWDEV-206580: Encrypted FW - use iKEK/tKEK in CCP LSB slot 4
PLAT-64785: [RMB] Re-enable interrupts on z-state exit
FEAT-32799: [Navi21] [tOS] Validate duplicated RAP registers across subsections
PLAT-64769: [RMB] Move BL2TOS mailbox SRAM location
SWDEV-240041: 7 Coverity Defect Fixes
PLAT-64836: "Change HDP flush register and add poll for completion"
FEAT-31759: [Navi21][tOS]Combine GC_INTERNAL_INDEX_DATA_PAIRS_SRIOV RAP w/ GC_INTERNAL_SRIOV RAP
PLAT-60256: Fix SPL value fuse issue identified from FAR testing on Renoir
PLAT-58012: Improve PSP's traces in smart trace buffer
PLAT-61976: [RMB] Restore VCN DPG RAM on Z9 VPB exit
SWDEV-239307: [NV21] Ensure SMU FW is loaded before sending GFXOFF disable/enable commands in debug unlock sequence
PLAT-63772: [RMB] Remove accesses to B0 RSMUs

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.51
-----------------------------------
Bootloader
----------------
PLAT-55947 : [RN_FP6] SUT not boot after set to Quad mode with ROM GD25LQ128D
PLAT-59100[BOOTLOADER]loads either MP2-SFH or MP2-I2C based on AMD PBS option
PLAT-61455: [BOOTLOADER] Trigger recovery when BIOS FW fails to load

Trusted OS
----------------
PLAT-64900: [BUILD] Revert "Make build identical on different environments"
PLAT-63500: [RPMC]Add BIT9 in HSTI to specify if RPMC SPI-ROM is avilable
SWDEV-231923: Store HSP data when PSP enters to S0i3
PLAT-63843: [RN] RPMC Root Key provisioning at Manufacture
SWDEV-206580: Encrypted FW - use iKEK/tKEK in CCP LSB slot 4
PLAT-64785: [RMB] Re-enable interrupts on z-state exit
FEAT-32799: [Navi21] [tOS] Validate duplicated RAP registers across subsections
PLAT-64769: [RMB] Move BL2TOS mailbox SRAM location
SWDEV-240041: 7 Coverity Defect Fixes
PLAT-64038 : Remove bad words from release notes
[RELEASE]: [Navi 10, 14]: PSPFW Release Version 00.1x.00.55
PLAT-64836: "Change HDP flush register and add poll for completion"
FEAT-31759: [Navi21][tOS]Combine GC_INTERNAL_INDEX_DATA_PAIRS_SRIOV RAP w/ GC_INTERNAL_SRIOV RAP
PLAT-60256: Fix SPL value fuse issue identified from FAR testing on Renoir
PLAT-58012: Improve PSP's traces in smart trace buffer
SWDEV-239359: [RELEASE] [Navi21] PSP TOS FW release version 00.21.00.51
PLAT-61976: [RMB] Restore VCN DPG RAM on Z9 VPB exit
SWDEV-239307: [NV21] Ensure SMU FW is loaded before sending GFXOFF disable/enable commands in debug unlock sequence
PLAT-63772: [RMB] Remove accesses to B0 RSMUs


Trusted OS
----------------
PLAT-64168: ROM-Armor ver2 for client - phase3
RTGPLAT-4197: Disable GFXOFF before starting debug unlock
PLAT-64417: [VN] ISP FW memory size reduction
RTGPLAT-4250: [Navi2x] Handle DF C-state change via PMFW
RTGPLAT-4301: [MMSCH], MMSCH init for VCN1
FEAT-32200: [Navi21] [tOS] [RAP] Validate index-data pair RAP
PLAT-64168: ROM-Armor ver2 for client - phase2
PLAT-64168: ROM-Armor ver2 for client - phase1
PLAT-64279 RN: Remove unused API DRV_SYS_CMD_ID_PRIV_SMI_SPI_READ_MC and the associated functions
PLAT-64248: [MVG] A bug in the Gfx-10 HW IP TAP_DELAYS & SE0_TAP_DELAYS mapping
SWDEV-237043:MI200 - Updated the SDMA FW destination size

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.50
-----------------------------------
Bootloader
----------------
N/A

Trusted OS
----------------
PLAT-63773: [RMB] Add RSMUs for CCX, DF, and UMC MSMUs to config
PLAT-63847: [RMB] Correct the MP0 unit ID bit positions in mmHUB TLB2 register
SWDEV-237624: TL print additional check
RTGPLAT-4500: fix Navi22 DrvSys build issue
SWDEV-237788 VFGATE: clear pending VF interrupt flag before interrupt re-enable.
PLAT-63481 VGH: Create Thread to Parse HSP Shared buffer contend
SWCSD-1364: Fix issues reported by legal scan's tool
PLAT-63629: Vangogh: Add support for SMU message to trigger RLC AutoLoad and RLC enablement
PLAT-63601: Update MP0_DFP_PGRAM_CPU_CNTL__PGFSM_MEM_SDDS* reg shift and mask definitions
SWLSD-12: Additional validation of pointers in kernel syscalls.
RTGPLAT-4105: Add missing header defines for MI-200/NV21
PLAT-61278: [VN] [HSP] PCR Measurements in tOS
RTGPLAT-4105: [Navi21] Add node ID to TMR fid
SWDEV-226358: Enable logging in TL in TOS

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.4F
-----------------------------------
Bootloader
----------------
N/A

Trusted OS
----------------
SWDEV-237050 Have NV12 change DF C-State directly as is done in NV10/NV14
PLAT-58331 verify singanture and add TMR protection to DMCUB
PLAT-63779: [VN] MMHUB spec AxUSER definition changed causes bad TMR mapping
SWCSD-1364: Fix Knoll code's license issue
PLAT-63635: Fix enforcing security policy on non-secure parts
Revert "PLAT-61974: [RMB] Skip switching DPM states in TOS"
SWDEV-235126: Do not fail the CVIP load query command.
SWDEV-229327: HDMI Certification HDCP 1.4 1A-08 item - Error
RTGPLAT-3982:[Navi2x] Add FW ID fields for Navi2x in header file
FEAT-30987: [Navi 21] bug fix for AC timing table
PLAT-63104: [RMB] Update Register Header

fTPM
-----
NA

DRTM
-----
PLAT-63484: Add support for version number display in BVM

Release Version 0.11.0.4E
-----------------------------------
Bootloader
----------------
PLAT-61966: [RN] Update PSP_BL_AMD_TEE_SHAREDDATA RpmcErrorCode Field
PLAT-61258: [BL][CZN]Verify CS-SEED fusing
PLAT-63450: [BOOTLOADER] Correcting CS-Seed test vector
SWDEV-220087: Fix Coverity issue - unused value

Trusted OS
----------------
PLAT-63362, PLAT-63361, PLAT-61707: Add CZN CS-SEED based keys (Promontory, Knoll)
PLAT-61966: [RN] Update PSP_BL_AMD_TEE_SHAREDDATA RpmcErrorCode Field
PLAT-60172: [RMB] Re-enable TMR, IOMMU, and Security Policy support for HSP-fTPM
SWDEV-230041 [Navi12][PSP] New command to clear up FW in TOC/TMR when VF driver gets unloaded
PLAT-60967: Re-enable RPMCSetConfiguration
PLAT-61278: [VN] [HSP] PCR Measurements in tOS
PLAT-63107: [VN] Save/Restore FMR registers in/from MP2 SRAM through S0i3
RTGPLAT-4253: Navi 1x: Check PGFSM power status before doing forced bank display
RTGPLAT-4253: Navi 1x: Add registers required for PG status checking
PLAT-62175: Prohibit to MMIO access 0xFED80D00-0xFED80DFF due to FCH security policy
SWDEV-235366: [NV12] VF Gating causes intermittent PSP hang
FEAT-30990: [Navi21], adding more permission for PPLIB TA
FEAT-31759: [Navi21][tOS][RAP] Validate 1VF L1 Policy
RTGPLAT-4316:[Navi2X] TMZ sequence for navi21 during GFX OFF exit

fTPM
-----
NA

DRTM
-----
NA



Release Version 0.11.0.4D
-----------------------------------
Bootloader
----------------
PLAT-60733: [RN] Initialize PSB fusing values from BIOS key token
PLAT-61856: Adapt new design for bios cmd for storage health

Trusted OS
----------------
RTGPLAT-4140: NV21- Replace Blank SRAM with TRNG for CCP clear
PLAT-60733: [RN] Initialize PSB fusing values from BIOS key token
SWDEV-234631:Trace log in TOS, call to integrate lib restore function
PLAT-61856: Adapt new design for bios cmd for storage health
SWDEV-230737 - Re-synchronize the PSP GFX Interface between PSP FW and GFX driver in swPSP
SWDEV-216591: Secure BIO - ISP FW authentication and loading
PLAT-62192: [VN] Expand TMR for VCN FW to 2MB and set separate TMR for VCN data
SWLSD-6 Pass VfGate pResp pointer inside of Buf[] array.
RTGPLAT-4128:[Navi23] Add Navi23 register headers and enable compilation
SWDEV-234173:MI100 - Apply changes for one VF mode
PLAT-63056: Add validation of parameters in kernel and DrvSys functions.
SWDEV-226358: Trace log in TOS: calling tl_print_s
SWLSD-6: Add validation of pDomain pointer for ECC point multiplication.
SWLSD-11, SWLSD-9: Fix address validation in DrvSys.
SWDEV-226306: TL 2.0, dump CLB in DRB
SWLSD-8: Fix issue in tOS where Drivers from inferior Trust Level can access System Driver stack.
SWDEV-226359: MP0 TRACE LOG, HDT command handler
PLAT-62185 VGH: Add functions for DRV_SYS_CMD_ID_MAP_SMN and DRV_SYS_CMD_ID_UNMAP_SMN
SWDEV-226754: Navi 1x: Indicate VBL to skip USB init in Mode 1 reset


fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.4C
-----------------------------------
BootLoader
----------------
PLAT-57221: [BOOTLOADER] Fix incorrect FwType in recovery BL
PLAT-61634: Enforce specific fw types validated by TOS
PLAT-62262: [BOOTLOADER] Add CZN signing
PLAT-62277: [BOOTLOADER] Support Cezanne bootrom layout

Trusted OS
----------------
PLAT-61634: Enforce specific fw types validated by TOS
FEAT-30991: [Navi21]Uncommenting permission bit for PPLIB TA permission check
FEAT-30992: [Navi21]: Adding new permission check for PPLIB SVC
FEAT-30991: Navi21: Adding new key ID for new PPLIB key
FEAT-31759: [Navi21]: [tOS][RAP] Apply 1VF L1 policy.
SWDEV-216591: Secure BIO - ISP FW authentication and loading
SWLSD-5: Fix fTPM issue introduced by bug in parameter cheks.
MERO-19 Add support for new Crypto Algorithms supported in CCP 12.0
PLAT-60553: Adds kernel API for tOS to enter into debug mode
PLAT-56608: Workaround for BSOD A006 issue
SWLSD-13: [Kernel] Restrict Svc_CreateUserThread() to System process.
SWDEV-228332: Enable CVIP security policy
SWDEV-220638: SWDEV-220798: Set GC AEB[56] = 1
SWDEV-226901: Navi21: Read VCN counters from VCN1's cache1 location
RTGPLAT-4244: Revert "PLAT-58139:[Navi2x] Support DF Cstate toggle via PMFW"


fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.4B
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
SWDEV-230950: [VGH] Pass HSP measurement to TOS
SWLSD-12:     Add validation of pointers in kernel syscalls
SWDEV-232689: Access violation reading CVIP carveout address
PLAT-57481:   Add Initial Z-state support
PLAT-60437:   [RMB] Remove unneeded RSMU ID from config
PLAT-60505:   PSP FW changes for GFX FLR
PLAT-61974:   [RMB] Skip switching DPM states in TOS
FEAT-30987:   [NV21] AC timing table, UMC reg read write
RTGPLAT-4010: [Navi2x] Clear asynchronous abort condition without handling the abort
PLAT-58139:   [Navi2x] Support DF Cstate toggle via PMFW
PLAT-61981:   VG EMU SECUREGFXOFF MP0 Write to TMR causes SyncFlood
SWLSD-5:      Fix S0i3 issue introduced by kernel parameter checks
SWDEV-233192: gAsicType = ASIC_VGH breaks GFX HMD driver

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.4A
-----------------------------------
*DRTM TA updated to version 04.11.00.13

Bootloader
----------------
PLAT-61003 Use ADS bit to locate SPI ROM specific UID

Trusted OS
----------------
PLAT-61843: [TOS] Add back support in PROM B550A
FEAT-30986: [Navi21]: AC Timing Table: copy AC table from TMR to TA
SWLSD-5: Add more address checks in tOS kernel.
PLAT-61322: Update security violation logging implementation
SWLSD-4: Fix possible TOCTOU issues in DrvSys interface.
PLAT-61412: Fix TOS initial DPM value
SWDEV-216591: Secure BIO - ISP FW authentication and loading

fTPM
-----
NA

DRTM
-----
Add STB (Smart Trace Buffer) support in DRTM TA

Release Version 0.11.0.49
-----------------------------------
Bootloader
----------------
PLAT-60967: Enable RPMC feature
PLAT-59673[DRTM]Feature disable with PSP-fTPM
PLAT-61266: [RN] Add option for BIOS to control RPMC
PLAT-61512: MP0 hard hang with status 80060000
PLAT-59883 : [RN] Add support for SPI ROMs that without enable QE in default.
PLAT-61517: [BL] Refactor headers and version management

Trusted OS
----------------
PLAT-59673[DRTM]Feature disable with PSP-fTPM
SWDEV-230017:MI200-Migration to LSD model
SWDEV-227728: [NV21] Apply ENTRY_TYPE_POLICY_GC_INTERNAL_INDEX_DATA_PAIR_SROIV security policy
PLAT-61511: [VGH] [tOS] Fix RLC TMR base address loaded to the RLC BootLoad Address h/w registers
PLAT-56608: Workaround for BSOD A006 issue
PLAT-60780: [RMB] Remove support for TMR, IOMMU, and DRTM sec policy
PLAT-60780[VN]Revisit TMR, IOMMU, Security policy for VN/HSP-fTPM
PLAT-61179: BSOD 0xEA occurred when running reboot
SWDEV-211101: MI200 TOS 4k Secure debug unlock support
RTGPLAT-3918: [RMB] Load MSMU Scratch Registers with RLC bootloader address/size
PLAT-61452: [RMB] Set asic type value
PLAT-61378: VG - Mismatch between PSPFW and PMFW loading USB PHY for USB1/2 instances
PLAT-58627[VN]-Add a new RevID for PRO part checking
PLAT-61154 VGH: PLAT-61155 VGH, Add function in sys_drv for DRV_SYS_CMD_ID_PRIV_GET_TPM_CONFIG and DRV_SYS_CMD_ID_PRIV_GET_DOORBELL_EVENT_HANDLE
FEAT-30985: [Navi21]: Share the TMR address of AC timing table with TOS
SWDEV-216591: Secure BIO - ISP FW authentication and loading
PLAT-61139 Skip CCX1/WLAN for secure policy
RTGPLAT-3852: [NAVI 1x]: drv_sys: Fix TOC TMR boundry TOC id based on latest TOC design
SWDEV-228334: Release the CVIP HW from reset.
SWDEV-231110: Remove CVIP FW load test code.
SWDEV-228317: Return actual CVIP Key usage flag.
RTGPLAT-4056: Navi22: Add register headers for Navi22


fTPM
-----
NA

DRTM
-----
N/A


Release Version 0.11.0.48
-----------------------------------
*DRTM update to 4.11.0.12
*fTPM update to 3.42.0.5

Bootloader
----------------
PLAT-60919: PSP incorrectly to clean status on FCH::PM::S5_RESET_STATUS register.
PLAT-60451: Skip MMHUB enablement with iGPU disabled

Trusted OS
----------------
SWDEV-227305: Updating release TMR flag when sending USB PD FW via I2C
PLAT-61264 Remove SKINIT SLB DMA Protection after DRTM launch
SWDEV-228334: Release the CVIP HW from reset.
SWDEV-221737: [SRIOV] [NV12] [AWS] Add support for host compatibility and guest capability features.
SWDEV-229688: MP0 trace log,updating TL init to match TL lib
SWDEV-229408: Ignore Coverity parse error on mailbox_blbros.h
SWDEV-230347: addressing warnings for Disabling UUID search in DLM printf
PLAT-56326: Manage 16MB DRAM space for HSP, DRTM and SKINIT
PLAT-60891: AEB_BLOCK_UPDATE bit has to be clear before unlock MP2
SWDEV-230347: Disable UUID search in DLM print if MP0 Trace Log is disabled
SWDEV-228324: Develop TOS handler for the SMU_PSP_CVIP_POWER_ON message
SWDEV-228335: Complete the CVIP Firmware Load Status Polling API

fTPM
-----
Modify FTPM Makefile to add FW version and type in PSP Fw Header and to correct the Signing function used for RV

DRTM
-----
PLAT-61264: Remove SLB DMA protection after DRTM Launch to help DRTM Stability issue.


Release Version 0.11.0.47
-----------------------------------

Bootloader
----------------
[PLAT-60385] Fix Hard-Coded Index in UMC

Trusted OS
----------------
SWDEV-216591: Secure BIO - ISP FW authentication and loading
PLAT-58717: Disable mp0 power gating feature
SWDEV-216591: Secure BIO - ISP FW authentication and loading
LWPQA-204: Add key tokens for mi200 pre-si signing
SWDEV-228324: Develop TOS handler for the SMU_PSP_CVIP_POWER_ON message
PLAT-60953: [RMB] Update registers for PPR 0.14
SWDEV-228833: GFX10 SR-IOV: Add MEC ucode version to CP address space
[RELEASE] [NAVI 10] PSPFW Release Version 00.10.00.47
SWDEV-216591: Secure BIO - ISP FW authentication and loading
SWDEV-227677: Modify tOS kernel reset sequence to allow DRAM to be not one-to-one mapped.
SWDEV-226303: MP0 Trace Log: Adding link to tl_lib for NV21
SWDEV-229688: MP0 Trace Log: calling TL init-deinit in drv sys
PLAT-60960: Expose API for putting trace in smart-trace buffer

fTPM
-----
NA

DRTM
-----
N/A


Release Version 0.11.0.46
-----------------------------------
* L0 Security policy is updated to B.9.0.75
* L1 Security policy is updated to B.9.1.75
* DRTM is updated to 4.11.0.11

Bootloader
----------------
[BOOTLOADER] PLAT-60842 Remap entire SRAM before jump to TOS
PLAT-60843: [BUILD] Make build identical on different OS

Trusted OS
----------------
PLAT-60843: [BUILD] Make build identical on different OS
PLAT-58942 SMM Isolation Support
[PLAT-58508]Update structure SUSPEND_DRAM
PLAT-60695: [TOS] Remove support for PROM/PROM LP
PLAT-60855: [TOS] Add APOB/APCB signing/validation service (WIP)
PLAT-59472 - [RMB] TOS Initialization (Phase-1)
[PLAT-58508]Update structure UMC_STATE_INFO with macro UMCCH_MAX_NUM
SWDEV-216591: Secure BIO - ISP FW authentication and loading
PLAT-54423: Enforce ROM-Armor policy on S3/S0i3 resumes
SWDEV-226356: MP0 Trace Log: Reading Source ID from UUID
[SWDEV-228330] TOS CVIP Carveout Use Preparation
[SWDEV-228327] CVIP SRAM Initialization - Crack the CVIP FW Image
SWDEV-228377:MI200-TOS: RSMU MMIO Start address modified
SWDEV-228315: Shift new TLB value for SMNv13 support 8-bits hops count in SMN TLB
SWDEV-216591: Secure BIO - ISP FW authentication and loading

fTPM
-----
NA

DRTM
-----
PLAT-58942 SMM Isolation Support.


Release Version 0.11.0.45
-----------------------------------
Bootloader
----------------
N/A

Trusted OS
----------------
Revert "SWDEV-227677: Modify tOS kernel reset sequence to allow DRAM to be not one-to-one mapped."
SWDEV-226306: Trace Log in TOS - support copy of CLB to DRB
SWDEV-228329: MP0 Trace Log: Adding verbosity level to Drv_Sys DLM print
[SWDEV-228781] Structure for HSP messages should be packed

fTPM
-----
NA

DRTM
-----
PLAT-59467: Report ACPI device in IVRS table during DRTM boot

Release Version 0.11.0.44 (Rejected)
-----------------------------------

Bootloader
----------------
[PLAT-58508]Update UMC Configuration
[BOOTLOADER]PLAT-60374 Add the Error logging when triggered the recovery mode
[BOOTLOADER]PLAT-59782 Pass TPM selection info from BIOS -> ABL -> PSP

Trusted OS
----------------
SWDEV-216591: Secure BIO - ISP FW authentication and loading
SWDEV-225191: enable External aborts for Navi 1x platform
SWDEV-227305: Updating release TMR flag when sending USB PD FW via I2C
[SWDEV-221391] Pass the CVIP carveout from BL to tOS
RTGPLAT-3917: [MVG] PSP needs to load MSMU scratch registers with RLC bootloader address/size
SWDEV-227728: Populate only mismatch information in RAP output_param.
PLAT-60547: [VGH/VN] [tOS] Modification of the TMR physical address conversion from the GPU virtuall address
SWDEV-227437:MI200-TOS: Enable MMHUB initialization for MI200
SWDEV-227677: Modify tOS kernel reset sequence to allow DRAM to be not one-to-one mapped.
RTGPLAT-2717: clear external aborts on Navi 1x
[TOS] PLAT-60379: Storage thread to use kernel event
PLAT-59467: Report ACPI device in IVRS table during DRTM boot.
RTGPLAT-3851: XGMI: Ensure that current Die is not Node Fenced on Mem Sharing Disable
FEAT-30961 [Vega10][SRIOV][Azure] Report last-attempted driver version in VF_GATE status response.
PLAT-60471: [VGH/VN] bug in RSMU ID definitions

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.43
-----------------------------------

Bootloader
----------------
N/A

Trusted OS
----------------
PLAT-60371: S4 suspend fails after S0i3 resume
PLAT-58150: [VMR]: RAS: Handle TWIX errors in Trusted OS
PLAT-58154: [VMR]: RAS: MBAT Re-init for power gated NBIO/PCIe instances
[TOS] PLAT-58798: Allow MP2 FW to write to PSP storage
[SWDEV-206589] support for IP FW loading
FEAT-29971: retiring MPV unlock and xgmi reg list for non prod mode
SWCSD-1364: Legal scan for Renior release to customer
PLAT-57915, PLAT-57917: Fix tOS kernel issue that migh cause race conditions between threads.
[SWDEV-206589] [tOS] Support for IP FW loading

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.42
-----------------------------------
* PLAT-59351 Update CCP HAL library for new SHA engine

Bootloader
----------------
N/A

Trusted OS
----------------
PLAT-59983 - Avoid DRTM TMR setup range check with SMM TSEG region
FEAT-30956:[Navi2x] Remove APCC register save/restore from PSP
[PLAT-58736] Rev Header version in Headers for TOS and DRVSYS

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.41
-----------------------------------

Bootloader
----------------
PLAT-59615 Fix Index out of Bound Issue in RPMC
[PLAT-58736] Update offset of FwType field in PSP signing header
[PLAT-59075] Add test mode for anti rollback feature

Trusted OS
----------------
[TOS] PLAT-57225: Disabling late DF security policy
PLAT-58665: System hangs when resuming from S0i3, when VBS enabled
[TOS] PLAT-57939: Fix Crossfire enablement
FEAT-30095: non prod TA Key ID
RTGPLAT-3763: PSP should respond to RESET command from PMFW
PLAT-56411: Enable enforcing of DF & FCH security-policies

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.40
-----------------------------------
* L0 Security policy is updated to B.9.0.74
* L1 Security policy is updated to B.9.1.74
* DRTM is updated to 4.11.0.F

Bootloader
----------------
PLAT-58094 Provision RPMC with temporary root key
[BOOTLOADER]PLAT-59185[RN] BIOS in ROM2 32M support (case 4)
[BOOTLOADER] Remove unnecessary header include
SWCSD-1364: Legal scan for Renoir release to customer

Trusted OS
----------------
SWDEV-222509:[Navi2x] Update the DMCUB sequence as per DMCUB_design_spec
RTGPLAT-3688:[Navi2x] Save the APCC tuning register values for later restore
SWDEV-221891: [TOS] Handle command GFX_CMD_ID_SAVE_RESTORE for GFX_FW_TYPE_VCN1
SWDEV-219157 - MI100 TMR: mGPU Address Calculation and FabricID Update
SWDEV-224787: Use of pCmd in CVIP Load Thread crashes the code.
RTGPLAT-3571: Navi21: Remove size check for VCN RAM firmware
RTGPLAT-3522: Navi21: Move DRAM accesses before reset by SMU
PSP-2626: Updating PSP 10 Secure OS.

fTPM
-----
NA

DRTM
-----
PLAT-58191- IOMMU hand-off / configuration deficiencies during DRTM Secure Launch + DMAr disabled fix


Release Version 0.11.0.3F
-----------------------------------

Bootloader
----------------
[BOOTLOADER] PLAT-59196: Remove programming of GPIO21/22
[BOOTLOADER] PLAT-56684 Decrease Key DB SRAM region size
[BOOTLOADER] PLAT-57929 Fix FRA-unlock issue
[BOOTLOADER] PLAT-58708 - Program SPI mode and speed in A/B recovery
[BOOTLOADER] PLAT-58456 - [RN] Load VBL in recovery mode
[BOOTLOADER] PLAT-56658 Prevent address from returning as error from syscall

Trusted OS
----------------
RTGPLAT-3565: The TMR region setup return status must be validated
PLAT-58798: Add Mp2-to-PSP mailbox
[TOS] PLAT-58567: Add Support for CS2019.B Promontory
PLAT-59025: Release other TMRs before MP0 TMR in DestroyTmr()
PLAT-58996: [VGH] [tOS] Update conversion virtual-2-physical addresses base registers for TMR
FEAT-30093: Navi21: Implement non production APIs
PLAT-58996: [VGH] [tOS] Update conversion virtual-2-physical addresses base registers for TMR
RTGPLAT-3597: Navi1x: Fix ROS0 toc size to align to 64KB
PLAT-58991: Allow BIOS cmds without parameters
RTGPLAT-3597: Navi1x/2x: Align the size of RWS section to 64KB
RTGPLAT-3597: Navi: Fix TOC TMR boundry TOC id based on latest TOC design

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.3E
-----------------------------------

Bootloader
----------------
[BOOTLOADER] PLAT-58787: Stagi1 BL - System can't resume from S0i3 on 32MB BIOS
[BOOTLOADER] PLAT-58957: Remove PEI validation on s0i3
[BOOTLOADER] Improve SMN single-access functions

Trusted OS
----------------

FEAT-30094: NV21: update access permission for Non Production Trusted OS mode
SWDEV-223228: [DRV_SYS] Provide finer grainer debug info to better facilitate Security Policy debugging capabilities
RTGPLAT-3522: Navi21: Clear pending security violations before jumping to Bootrom.
[SWDEV-223509]MI200:TOS-Update SMU-13 Public/Private CRU based on LSC+
Revert "PLAT-58139: Navi21: Support DF Cstate toggle via PMFW in Trusted OS"
[SWDEV-223417]MI200:TOS - Support for SDMA[0-4] FW load in TOS
RTGPLAT-3551: [TOS] Skip SMU FW load if system exited from BACO/BAMACO
PLAT-58744: [VRMR]: Windows restart fails with data abort
RTGPLAT-3471: Navi21: Fix extracting of SMU command in mode1 reset sequence
PLAT-58191- IOMMU hand-off / configuration deficiencies during DRTM Secure Launch
FEAT-27282 [Navi12][VG10][SRIOV] MARC_0 Register programming.
PLAT-58788: TOS: Fix the register addresses of BLOCK_CPU
PLAT-58696: [VMR]: Fix the build warnings in the amd-tee2.0
PLAT-58755: Update tOS build procedures in accordance with the new FWType field and values
RTGPLAT-58427: Renoir: Added detection of major revID 0xE for DRTM feature verification
FEAT-29979 - SR-IOV: Disable VMR for GFX 10 SR-IOV products
SWDEV-217840: [VGH] AMD ROM Armor

fTPM
-----
Rebuilt with updated library, no code changes.

DRTM
-----
NA


Release Version 0.11.0.3D
-----------------------------------

Bootloader
----------------
PLAT-58405: Workaround for PKG_TYPE lost

Trusted OS
----------------
RTGPLAT-2776:[Navi2x] Load DMCUB to the TMR region set by PSP BL
SWDEV-216603: Asynchronous CVIP FW loading.
RTGPLAT-3307:[Navi2x] Clean reset of DMCUB when loaded from tOS
SWDEV-222554: Create Cvip FW variants of PSP IP FW download functions
SWDEV-214037: NCC: checking Process permission before accessing kernel syscalls
PLAT-58012: Add smart-trace-buffer (aka Mp2-trace) with MP0 traces
PLAT-54423: [RN] ROM-Armor feature
PLAT-58139: Navi21: Support DF Cstate toggle via PMFW in Trusted OS
PLAT-58152: [VMR]: RAS: MP1 Fatal Error Handling
PLAT-52750: Add support for RSMU configuration for Vermeer

fTPM
-----
NA

DRTM
-----
NA

Release Version 0.11.0.3C
-----------------------------------

Bootloader
----------------
[BOOTLOADER] PLAT-56060 Fix fusing code in PSP BL
[BOOTLOADER] Refactor serial print function
[BOOTLOADER] Port Coverity Dead Code Fix
[RMB] Add ASIC Type for Rembrandt

Trusted OS
----------------
PLAT-55003 - [amd-tee-api-lib] Update DRV_PARAMS to match the size of SYS_DRV_PARAMS
PLAT-58429: Destroy-TMR a GFX cmd should not release all TMRs allocation
RTGPLAT-2679: Navi21: Update mininum bootloader version for debug unlock support
RTGPLAT-3423: Navi21: Set VCN unitid for VCPU instruction fetches
RTGPLAT-3457: [Navi21] [TOS] Set MP1_FW_OVERRIDE.AEB_BLOCK_UPDATE upon BACO entry
PLAT-57938 Support Recovery mode for DRTM
SWDEV-207563 - NV21 SRIOV: VCN VF FW Loading in TMR
RTGPLAT-3415: Navi21: Fix data type of RsmuId variable
[TOS] MERO-441 Add support for TA to determine the caller interface (TEE vs. TEE2)
FEAT-30115 - NV12 SRIOV: Clear GFX/MM Load Vectors during VF FLR
PLAT-58163: [VGH] [tOS] [ BL] Adopt TMR registers h/w changes.
SWDEV-220649:[VGH] HSP interface support
PLAT-58163: [VGH] [tOS] [ BL] Adopt TMR registers h/w changes.
PLAT-58163: [VGH] [tOS] [ BL] Adopt TMR registers h/w changes.
RTGPLAT-3252: fix PnP issue on Navi 1x
SWDEV-219857: NV21/MI100/MI200 Clear dgpu encryption keys if enabled
SWDEV-207563 - NV12 SRIOV: VCN VF FW Loading in TMR
SWDEV-216603: Skeleton implementation of asynchronous CVIP FW loading.
PLAT-57655: [TOS]: [VRMR]: Enable applying of the late DF policy
RTGPLAT-3386: Navi21: Add support for SE tap delay firmware type
FEAT-29637: [tOS] RAP TA SVC call backs in TOS System Driver

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.3B
-----------------------------------

Bootloader
----------------
[BOOTLOADER] Fix stage1 bootloader build

Trusted OS
----------------
SWDEV-216605: Add new Gfx-to-PSP API for asynchronous CVIP FW loading.
[Mero] Fix compiler warning due to change 310284 in smu_mailbox

fTPM
-----
NA

DRTM
-----
NA


Release Version 0.11.0.3A
-----------------------------------

Bootloader
----------------
[BOOTLOADER] Fix modulus copy buffer overrun
[BOOTLOADER] Free LSB slots in CryptoShaFromLsb
[BOOTLOADER]PLAT-57760: Fix boot mode detection
[BOOTLOADER] PLAT-55651 - Remove L2 BIOS directory loading in recovery
[BOOTLOADER] PLAT-57622 Resolving Coverity scan errors
[BOOTLOADER] DESPCPSP-59:Add FT5 package type definition for Pollock.
[BOOTLOADER] PLAT-56684: Remove unnecessary global buffer
[BOOTLOADER] PLAT-56302 MP2 needs power gating on RN AM4
[BOOTLOADER][TOS] PLAT-53198 - [RN] Skip RSMU interrupt for CLKB registers when iGPU is disabled
[BOOTLOADER] PLAT-57229: Resolve Coverity Errors for NULL Pointer Dereferences

Trusted OS
----------------
PLAT-58007: Integer Overflow in SMI INFO in BIOS command handler
SWDEV-218805 - NV12 SRIOV: L1 Policy Update for 1VF Mode
[PLAT 57915, PLAT- 57917] Add mutex logic and 2-retry on IP FW signature validation failure
PLAT-52749: [TOS]: [VRMR]: Add support for Secure Debug Unlock for Vermeer SoC
[Mero] Glitch attack mitigation - Cold reset message to PSP from MP1
PLAT-57707: ACP change to not hinder SMN adjustment
PLAT-56502 [RN] - System Reboot during DRTM sequence due to TMR violation
SWDEV-218550: Refactor hashtable to maintain RO & RW whitelisted registers for both MGPU & SGPU in a single unified hashtable for loop-back testing
[TOS] FEAT-29639 - Add support for Wireless Manageability
[213882]MI200:TOS: Add support for VCN 0 and VCN 1 RAM commands for GPU PA programming
RTGPLAT-3200: drv_sys: Palamida scan: Use standard AMD copyrights
Add initial support for building RMB
PLAT-57343 Renior AM4 can't power on with PT B550A(0x43D1)
PSP-3521: Complete implementation of TA-to-TA communication.
RTGPLAT-3284: Navi21: Add support for TOC version #6
NV PORT of FEAT-29964 [Vega10][SRIOV][Azure] SRIOV Mailbox Gating
[SWDEV-213847]MI200:TOS-Updated Fabric ID for MMHUB settings
MERO-298 Add support for Keep-Alive TA property
PSP-3521: Handle TA parameters in TA-to-TA communication.
SWDEV-219199 - NV12 SRIOV: VMR Setup Size Verification
[SWDEV-213847]MI200:TOS-Add support for TMR fencing
RTGPLAT-2776:[Navi2x] Enable DMCUB firmware load from SYS DRV
PLAT-57205: TOS: Remove firmware validation using Root key in Trusted OS
PLAT-57202: TOS: [VRMR] Add members to AMDTEE mailbox
PLAT-57421: [Renoir] Limiting KVM feature to Ryzen Pro OPNs
PLAT-53905:[VRMR] Add support for Unwrapping Promontory Key
SWDEV-215018 Support for CCP SECIP13
SWDEV-218885: [NV21] Enable XGMI APIs for MCM builds
PSP-3521: Handle TA parameters in TA-to-TA communication.
SWDEV-218885: [NV21] Enable XGMI APIs for MCM builds
SWDEV-218807 - NV12 SRIOV: Revert VDDGFX Section on Debug Unlock
[SWDEV-218783]MI200:TOS Implement legacy RSMU AEB settings
RTGPLAT-3213: PSP-TOS: Palamida scan: Fix files without copyrights
RTGPLAT-3214: TOS: Palamida scan: Use standard AMD copyrights
[PLAT-57281] Add drv_sys function to access RSA CcpModExp directly
[TOS] Update for CCP HAL SHA changes
PLAT-56164: Set default DPM level of all threads to low.

fTPM
-----
Added  Mutex logic to acquire and use mutex shared with system driver

DRTM
-----
Initial production release


Release Version 0.11.0.39
-----------------------------------

Bootloader
----------------
[BOOTLOADER] Fix CCP double LSB slot allocation
[BOOTLOADER] PLAT-56090 AB Support directory addr mode 2 in stage1 BL
[BOOTLOADER] PLAT-57038 Support new layout for PSP in ROM 1 and BIOS in ROM2
[BOOTLOADER] PLAT-57159 System can't resume from S0i3 on 32 MB BIOS
[BOOTLOADER] Resolve Coverity Errors - Unnecessary Headers(HFA)
[BOOTLOADER] Remove Deadcode in InitDataScrambleKeyAllUmc
[BOOTLOADER] Resolve Unused value Coverity Errors
[BOOTLOADER] Use constant-time memcmp when comparing HMAC
[BOOTLOADER] PLAT-57015 Refactor ValidateOEMPublicKey in PSP BL
[BOOTLOADER] Fix buffer overflow in key derivation
[BOOTLOADER]PLAT-56498: Implement reset-based legacy recovery
[BOOTLOADER] Fix crypto cache maintenance bugs
[BOOTLOADER] PLAT-56606: Add support for legacy compression
[BOOTLOADER] PLAT-55776: Implement Svc_SetBixbyInfo
[BOOTLOADER]PLAT-54956: Enable SMU paging from ABL

Trusted OS
----------------
RTGPLAT-3155: TOS: Palamida scan: Strip out internal amd server URL
RTGPLAT-3214: use AMD standard copyright
PLAT-56922: PlayReady test is failing post S4 wakeup on Renoir
PLAT-56164: Rename PlayReady APIs to HW DRM
RTGPLAT-2179: [Navi1x]: Implement new command to read USB-PD firmware from LFB
RTGPLAT-2179:[NV1X]: Apply TMR fence for USB-PD firmware
RTGPLAT-1901: Navi21: Add support for PM firmware load in trusted OS
RTGPLAT-3090: Navi21: SMNIF TLBs restore as part of mode1 reset sequence in trusted OS
RTGPLAT-3168: Fix memory leak in Usbpd_GetFwVersion
RTGPLAT-2179: [Navi21]: Enable USB-PD for Navi21
FEAT-29981 [Vega10][SRIOV][Azure] Support for driver capability table (CAP). Front-door loading support and encoding
PLAT-56741: Update failure in PSP on S0i3 resume to SMU
RTGPLAT-2179: implement get USB PD FW version from device over I2C
RTGPLAT-2179: Implement system call to map system memory
RTGPLAT-2179: Use memory type in Mmhub map function
RTGPLAT-2179: [NV1X]: Trigger USB-PD firmware update
RTGPLAT-2179: [NV1X, NV2X]: Interface to receive command from external host tool
RTGPLAT-2179: update the PD update sequence as per PD device vendor recomendation
RTGPLAT-2179: Move "AsciiToDec" function to utilities.c file
RTGPLAT-3091: Use ASIC specific definition for address of GCMC_VM_FB_LOCATION_BASE register
SWDEV-21388 - MI-100: VCN1 TMR Offset Update
FEAT-29972 - MI-100 SRIOV: MMSCH-PSP Communication for VCN0/VCN1 FW Loading in TMR
PLAT-56164: Performance optimization of PlayReady transcription
PLAT-56164: Rename PlayReady APIs to HW DRM
RTGPLAT-2937: MI-100: Update XGMI Topology constraints for 8P
[TOS] Fix a bug in TeeOpenPersistentObj
SWDEV-213008: Add support for SMU13 SoC in managing SMN TLBs

Release Version 0.11.0.38
-----------------------------------

Bootloader
----------------
[BOOTLOADER] Load iKEK from L1 directory

Trusted OS
----------------

PLAT-56164: Add Playready specific SysDrv API calls.
PLAT-56505: MP0CLK DPM Updates
PLAT-56424: Update PSP to SMU mailbox interface in TOS
PLAT-56500: [tOS] AMD-TEE 2.0 tOS versification
FEAT-29976 - MI-100 SRIOV: VCN0/1 FW Loading in PF TMR for PF/VF
PLAT-53903:[VRMR] Add support for PCIe Gen4 enable/disable
RTGPLAT-2179: [NV1X]: Fix multi-byte read issue
PLAT-52328 - RN - DRTM support in PSP tOS
SWDEV-213882 : MI100: add support for VCN1 RAM programming
FEAT-29974 - MI-100 SRIOV: TMR Fence Configuration for VCN0, VCN1, MMSCH
RTGPLAT-2174: Navi21: Add support to load VCN firmware on VCN1 PF instance
SWDEV-207568: Navi21: XGMI TA enhancements and topology support in GIM
RTGPLAT-2174: Navi21: Add support for RAM1 firmware for VCN1 PF instance.
DIAG-6427: MI-100/MI-200/Navi2x - xGMI TA to support xGMI loopback registers accesses
[tOS] Fix tOS to BL mbox bug
PLAT-56243: PSP FW accessing Invalid RSMU address


Release Version 0.11.0.37
-----------------------------------
*rsmu_sec_policy.rn_L0.sbin reverted to version: B.9.0.4C*
*rsmu_sec_policy.rn_L1.sbin reverted to version: B.9.1.4C*

Bootloader
----------------
PLAT-56170 Program GC RSMU Timeout

Trusted OS
----------------
PLAT-56175: Fix error in response to BIOS cmd
SWDEV-195709: [tOS] Trusted OS: DRAM reserved space for MP0 Trace Buffer
PLAT-52747: TOS: [VRMR]: Add S3 support in amd-tee2.0
PLAT-56175 : [tOS] Fix error in response to BIOS cmd
[TOS] RN: Enter Safe Idle mode in S0i2.X

Release Version 0.11.0.36
-----------------------------------
*Legacy & A/B Recovery Enabled*
*DRTM Disabled*
PLAT-55841 - Revert Security Policy 53 to 4C
*rsmu_sec_policy.rn_L0.sbin reverted to version: B.9.0.4C*
*rsmu_sec_policy.rn_L1.sbin reverted to version: B.9.1.4C*

Bootloader
----------------
[BOOTLOADER] PLAT-56065 - Disable RPMC Availability
[BOOTLOADER] Separate debug unlock and boot loader builds
[BOOTLOADER] Prevent reading past L1 table
[BOOTLOADER] Add function to simplify loading RSA Key components
[BOOTLOADER] Load soft fuse in recovery
[BOOTLOADER] PLAT-55065 Add BUILD_APU_CPU compile flag

Trusted OS
----------------
SWDEV-211148: Bug in TLB Address Calculation on MCM GPUs
[TOS]PLAT-56007: New SMU message for ACP SMA DMA Completion
PLAT-53906: TOS: [VRMR]: Fence register programming
PLAT-55765: [tOS] Cleaning static TMR allocation.
PLAT-54423: ROM-Armor feature implementation (phase-3)
SWDEV-211102 - MI-200 - Add MI-200 Asic Type
[TOS] Add BIOS CMD handler to set active partition
[PLAT-55003] Increased size of DRV_PARAMS to match up with SYS_DRV_PARAMS
[TOS] Update BIOS to PSP mailbox interface
[TOS] Notify BIOS of recovery state
FEAT-29047: [Navi21] Enable TOS support for XGMI use cases
SWDEV-214476: MI-200 TMR MMHUB1 FID Update
[TOS] Add definitions for A-B recovery
[TOS] Run scheduler if interrupts are handled
PLAT-55765: [tOS] Cleaning static TMR allocation.
[TOS] PLAT-54301 Initialize Current Timestamp
Address Coverity Issues for PDS Feature

Release Version 0.11.0.35
-----------------------------------
*A/B Recovery Enabled*
*DRTM Enabled - added dr_drtm_prod_RN.csbin version: 4.11.0.C*
PLAT-55653 - [RN] Security Policy v53
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.53*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.53*

Bootloader
----------------
[BOOTLOADER] PLAT-55651 - TEMP: Load L2 BIOS directory on Recovery
[BOOTLOADER] Remove incomplete type references
[BOOTLOADER] PLAT-53166 - Enable PSP debug print flag support
[BOOTLOADER] Notify tOS of SBIOS Layout
[BOOTLOADER] Recovery fixes/improvements
[BOOTLOADER] PLAT-53665 Save/Restore spi-controller registers on S0i3 resume
[BOOTLOADER] Add L2 directory table check
[BOOTLOADER] Disable port80 write until initialized

Trusted OS
----------------
PLAT-55507 - PSP to unhalt SDMA on S0i3 resume
[TOS] Bug fix when initalizing persistent object
PLAT-54423: ROM-Armor feature implementation (phase-2)
SWDEV-214476: MI-100 TMR Setup - Update MMHUB Fabric ID Values
SWDEV-209874 - MI100 SRIOV: Remove BACO Exit Check on SMU FW Loading
PLAT-55343: PSP to not unhalt SDMA
PSP-3515 - Address Coverity issues for tOS.
PLAT-54423: Build fix for VRMR
SWDEV-206584: [VGH] [tOS] Basic initialization
PSP-3521: implement TEE calls for TA-to-TA communication.
SWDEV-214035: MI200: compiling TOS for MI200
RTGPLAT-2177: Navi21: Update TMR_BASE_NEXT_OFFSET
[TOS] Implementation to save persistent object to NVRAM
PLAT-54423: ROM-Armor feature implementation (phase-1)
SWDEV-211148: MI200: adding hops to current smn functionality
PLAT-55278: [RN] Bug in RSMU Security Violation logging
PLAT-52542: TOS: [VRMR]: Support for HT/privileged address range in Secure Kernel
PLAT-52542: TOS: [VRMR]: Enable Syshub Support
PLAT-52471: TOS: [VRMR]: SMU-PSP and PSP-SMU message ID support
[TOS] RN: Skip ISP RSMU interrupt enablement
SWDEV-206584: [VGH] [tOS] Basic initialization
RTGPLAT-2823: drv_sys: Don't enable USB D-state handling in TOS while BACO exit

Release Version 0.11.0.33
-----------------------------------
*dr_ftpm_prod_RN.csbin updated to version: 3.27.0.5*
PLAT-55105 - [RN] Security Policy v2D
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.2D*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.2D*

Bootloader
----------------
[BOOTLOADER] PLAT-54920 Fix RPMC-related S3/S0i3 resume regression
[BOOTLOADER] Trigger recovery on SVC_LoadXXX calls
[BOOTLOADER] S0i3 disable DF C-state for DF access
[BOOTLOADER] PLAT-55002 - Skip DRAM Checks when booting from SPI-ROM
Revert "[BOOTLOADER] TEMP: S0i3 resume skip wait for SMU DRAM response"
[BOOTLOADER] Enable A-B recovery

Trusted OS
----------------
SWDEV-207560 - NV2x SRIOV: PF FLR Enablement
MERO-20: Implementation of Persistent Objects in tOS.
PLAT-52467: TOS: [VRMR]: Do not initialize GFX mailbox registers
PLAT-54887: TOS: [VRMR]: Enable port 80 support for logging
MERO-20: Implementation of Persistent Objects in tOS.
PLAT-53209: "[CZN] MP0_C2PMSG_ATTR_1 is not programmed correctly"
SWDEV-206584: [VGH] [tOS] Basic initialization
PLAT-52468: TOS: [VRMR]: BIOS-PSP mailbox handling
PLAT-52659: TOS: [VRMR]: Bootloader to Trusted Os mailbox
PLAT-52466: TOS: [APU/CPU]: Introduce APU_CPU build flag
PLAT-52466: TOS: [VRMR]: Support for Vermeer Soc: Build Macro
PLAT-52466: TOS: [VRMR]: Support for Vermeer Soc: Compilation support

Release Version 0.11.0.32
-----------------------------------
*dr_ftpm_prod_RN.csbin reverted to version: 3.25.0.5*
GC change will not be applied to security policy:
PLAT-53660 - [RN] GC instance of VM_IOMMU_CONTROL_REGISTER.IOMMUEN not set on secured part
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.4B*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.4B*

Bootloader
----------------
[BOOTLOADER] Skip storing debug prints in buffer when disabled
[BOOTLOADER] PLAT-53182 Fix LoadAPOB source address
[BOOTLOADER] Late apply of DMU security policy
[BOOTLOADER] Serial IO redirection based on environment
[BOOTLOADER] PLAT-52328 - RN - DRTM support in PSP BL

Trusted OS
----------------
SWDEV-210896: MI200: adding register definition
SWDEV-210896: MI200: adding build flags for MI200
PLAT-52328 - RN - DRTM support in PSP tOS
SWDEV-211102 : MI200: Adding ASIC type
RTGPLAT-2679: [TOS] Enable Secure Debug Unlock in Navi 21
RTGPLAT-2713: [TOS] Define TMZ index and data registers for Navi 21
RTGPLAT-2249: Navi2x: Change for 8KB bootrom table for mode1 reset.
RTGPLAT-2249 : Navi2x : Support for mode1 reset
RTGPLAT-2623: Navi2x: Support for bootrom table size of 8KB.

Release Version 0.11.0.30
-----------------------------------
GC change applied to security policy:
PLAT-53660 - [RN] GC instance of VM_IOMMU_CONTROL_REGISTER.IOMMUEN not set on secured part
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.2C*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.2C*

Bootloader
----------------
[BOOTLOADER] Fix UnmapSmn affecting adjacent mapping
[BOOTLOADER] Fix reading of DISABLE_SECURE_DEBUG_UNLOCK fuse bit
[BOOTLOADER] FEAT-27034 Add Anti-rollback.
[BOOTLOADER] Enter recovery if StartUserModuleRestoreInterrupts( ) returns BL_ERR_DATA_CORRUPTION
[BOOTLOADER] PLAT-52328 - RN - DRTM support in PSP BL
[BOOTLOADER] PLAT-52317 Halt if PEI image corrupted on S3

Trusted OS
----------------
RTGPLAT-2635: MI100 Update XGMI reg list for loopback test
RTGPLAT-1723: trusted_os: Add TOC adaptation  for Navi2x
PLAT-52328 - RN - DRTM support in PSP tOS
RTGPLAT-1807: MI100 PF FLR - Bootrom SMNIF TLBs
MERO-20: Implementation of Persistent Objects in tOS.
SWDEV-206074 - Navi21 SR-IOV: Add support for XGMI P2P Programming
RTGPLAT-2623: Navi2x: Change to BOOTROM_DATA_SIZE for migration to BTO
[RTGPLAT-2156]MI100 - TLB2 mapping corrected to Gfx9 requirement

Release Version 0.18.0.2F
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
FEAT-27282 [Navi12][VG10][SRIOV] MARC_0 Register programming. Interface fixes specified by virtualization.


Release Version 0.11.0.2E
-----------------------------------
Bootloader
----------------
[BOOTLOADER] FEAT-27034 PSP Firmware Anti-Rollback Protection
[BOOTLOADER] PLAT-51430: SCAN Chain Fails on Secure Parts
[BOOTLOADER] Enable Warm reset
[BOOTLOADER] PLAT-52085 - [Renoir] Remove PSP debug message
[BOOTLOADER] PLAT-52328 - RN - DRTM support in PSP BL
[BOOTLOADER] Bug Fix
[BOOTLOADER] Legacy Recovery Bug Fix
[BOOTLOADER] FEAT-27034 Add Anti-rollback.
[BOOTLOADER] Legacy Recovery Enablement [BOOTLOADER] Consolidate post code logger

Trusted OS
----------------
MERO-20: Implementation of Persistent Objects in tOS.
[TOS] FEAT-27034 PSP Firmware Anti-Rollback Protection
PLAT-52328 - RN - DRTM support in PSP tOS
[TOS] PLAT-52760: Assign C2P 63 register to indicate TEE capability
SWDEV-207557 - Navi21: Enable SR-IOV base functionality
RTGPLAT-2468: compile out External aborts for Navi 1x platform
RTGPLAT-2468: fix arm CPSR bit definitions
[TOS] PLAT-50482 Re-enable PSP security policy revert
SWDEV-207558 - Navi21 - Extend IH Register programming interface in PSP for secure MARC
SWDEV-205685: Allowed register list for XGMI loop back test
[TOS] Skip applying DF late policy on S0i3
PLAT-53430: Remove DMCU-ERAM and DMCU-ISR restoration in S3 and S0i3 resume path
PLAT-52328 - Bug fix for the issue introduced in commit [51ded44]
RTGPLAT-2467: Navi 1x: Configure TMZ registers in TOS

Release Version 0.11.0.2C
-----------------------------------
*dr_ftpm_prod_RN.csbin updated to version: 3.27.0.5*

Bootloader
----------------
[BOOTLOADER] Add EFS offset as per the spec
[BOOTLOADER]PLAT-53065: Skip SPI config on emulation
[BOOTLOADER]PLAT-50895 - Skip eSPI access in reset

Trusted OS
----------------
PLAT-52328 - RN - DRTM support in PSP tOS/BL
RTGPLAT-2509: Update MMHUB Fabric ID for Navi21
PLAT-52575: [RN] Block DCN firmware DMCU_ERAM & DMCU_ISR loading via Gfx interface. Do not block tOS booting in case if GFX fuse is disabled and DMCU were not loaded.

Release Version 0.11.0.2B
-----------------------------------
*Requires updated gfx driver and security policy
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.36*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.36*

BootLoader
----------------
[BOOTLOADER] PLAT-52340 Apply ATC hardware bug workaround

Trusted OS
----------------
[TOS] RN: PLAT-52517 Power gate CCP when PSP is idle
[SWDEV-205530] - MI100 SR-IOV: no register address in L1 violations dump
MERO-20: Implementation of Persistent Objects in tOS.

Release Version 0.11.0.2A
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-32445 [PSP Phase II] Arbitrary memory overwrite in VerifyBiosRTM( )

Trusted OS
----------------
SWDEV-205685: MI100: Support for allowed XGMI register read /write
PLAT-52575: [RN] Block DCN firmware DMCU_ERAM & DMCU_ISR loading via Gfx interface
SWDEV-205934 Corrected NodeId value in memory sharing disablement

Release Version 0.11.0.29
-----------------------------------
*rsmu_sec_policy.rn_L0.sbin updated to version: B.9.0.29*
*rsmu_sec_policy.rn_L1.sbin updated to version: B.9.1.29*

BootLoader
----------------
[BOOTLOADER] PLAT-51686 Interrupt Timer not triggering callback into KMD
[BOOTLOADER] FEAT-27034 update anti-rollback
[BOOTLOADER] PLAT-50793 enforce DMCU fw type
[BOOTLOADER] PLAT-51535,PLAT-49607 Support for Cezanne
PLAT-52444 [BOOTLOADER] Add new service calls to map/unmap SMN window with size parameter

Trusted OS
----------------
MERO-20: Implementation of Persistent Objects in tOS.
SWDEV-204075 Disable memory access (read/ write) for all the peer Dies
RTGPLAT-2387: fix SRM Index Data load vector issue

Release Version 0.11.0.28
-----------------------------------
*dr_ftpm_prod_RN.csbin updated to version: 3.26.0.5*

BootLoader
----------------
[BOOTLOADER] PLAT-52271 Skip RPMC init on S3/S0i3 Resume
[BOOTLOADER] PLAT-50895 - Enable Port80 over LPC
[BOOTLOADER][TOS] Add support for Bixby
[BOOTLOADER] PLAT-50999 Remove switching to PSP SPI-ROM
[BOOTLOADER] Fix to support compressed PMU FW
[BOOTLOADER] Style fixes
[BOOTLOADER] PLAT-51370 Don't clear watchdogfired bit
[BOOTLOADER] PLAT-50895 - Set LPC voltage to 3.3V

Trusted OS
----------------
PLAT-51670: Soft-Monotonic-Counter implementation (phase4)
[SWDEV-205065] MI100: Allow force loading of L1 security policy for non-secure part if option is enabled in VBIOS
[TEE OS]: Enable PSP Data Snapshot feature on Renoir
[SWDEV-202880]MI100: RAS: Add Error Notification support for WAFL 0/1 Multi-Uncorrectable RAS Errors
PLAT-51638 : Don't enter low power state when TrustZone is enabled
RTGPLAT-2277 Corrected mask values for fields of MC_VM_XGMI_LFB registers
DESPCPSP-54: [Renoir][ACP] PSP need to consider the 256 byte header info while loading the ACP FW
PLAT-51666: Failure to flush HDP Fifo during driver to/from TA / tOS communication
RTGPLAT-1775:drv_sys: Configure USB D-state Power Management Interrupts
RTGPLAT-1775:drv_sys: Add support for USB d-state handling
[RTGPLAT-2309] - MI100: CCP Target Address failure on loading MEC FW in VF Framebuffer
RTGPLAT-1784 : Navi2x: Enable sGPU functionality in TOS
SWDEV-202887 - MI100 Mode2 Reset Enablement
SWDEV-202887 - MI100 Mode1 Reset and PF FLR Enablement

Release Version 0.11.0.27
-----------------------------------
BootLoader
----------------
[BOOTLOADER] TEMP: S0i3 resume skip wait for SMU DRAM response
[BOOTLOADER] PLAT-51454 Skip MP0DPM message on S0i3 resume
[BOOTLOADER] Debug Print Cleanup
[BOOTLOADER] PLAT-51509 - Enable HdtOut print
[BOOTLOADER]PLAT-48877 Fix RTM bad key validation

Trusted OS
----------------
[TOS] PLAT-51798 Disable CCP LSB DS
RTGPLAT-2210: Transferred DF cstate disable/ enable function from P4V
DESPCPSP-57 - NV12 SRIOV: Save PF VMID in RLC Autoload for VF FLR

Release Version 0.11.0.26
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-50793 Add DMCU Firmware Copy
[BOOTLOADER] Add a check for global buffer in CryptoHmacSha256 function
[BOOTLOADER] Clean up AEB unlock code
[BOOTLOADER] PLAT-49838 Check BIOS PEI hash on S3/S0i3 resume
[BOOTLOADER] PLAT-50315 Fix BIOS PEI image hash calculation

Trusted OS
----------------
MERO-18: Implementation of secondary TEE interface for Mero.
Revert "RTGPLAT-2026: Disable wfi for Navi 10/14 as there are other system wide issues"
[TOS] RN: Enable MP0 Power Features
PLAT-51506: Disable Commercial Pro Part Check
SWDEV-197072 GPU-P SR-IOV: PSP timeout during multi VM VF FLR test
SWDEV-198271: [HDCP] Add support for SRM1 signature verification. DSA signature validation.
[TOS] PLAT-49527 Don't power-gate when warm reset is coming
PLAT-50794: [RN] tOS load DMCU from DRAM to its destination before USBC fw loading
MERO-15: Add new SMU-to-PSP message IDs
[SWDEV-202113]- MI-100 SR-IOV: Add Periodic FW validation for MEC VF FW
[CONFIG] Ignore tags and .patch files
RTGPLAT-2147: Avoid unhalt of SDMA0 and SDMA1 for GFX10 based SOC
PLAT-49210: Soft-Monotonic-Counter implementation (phase-3)

Release Version 0.11.0.23
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-50440 Support loading compressed FW
[BOOTLOADER] FEAT-27034: Add mandatory SPL FW list
[BOOTLOADER] Remove unnecessary print message
[BOOTLOADER] Update secure gasket logic

Trusted OS
----------------
PLAT-51098 : Fail signature verification of unencrypted KVM Fw binary

Release Version 0.18.0.22
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
FEAT-27282 [Navi12][VG10][SRIOV] MARC_0 Register programming
RTGPLAT-1813: Navi10: Disable WFI for Navi10 XT & XL SKU's
RTGPLAT-1398: NV1x: Update USB-PD firmware over I2C channel
RTGPLAT-1397: NV1x: Request SMU to get control of I2C lines
FEAT-27430 - NV12 Mode1/PF FLR enablement
RTGPLAT-2026: Disable wfi for Navi 10/14
SWDEV-190384 - SR-IOV: Avoid Autoload RLC on FLR exit for GFX 9 products
FEAT-25098 - NV12 SRIOV: VCN FW Validation Address Calculation

Release Version 0.11.0.21
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Allow Early C2PMSG28 access on S0i3 resume
[BOOTLOADER] Fix bug programming UMC keys during S3 resume
[BOOTLOADER] Introduce PSP directory entries for A/B recovery

Trusted OS
----------------
[TOS] Comment out check where DMCU FW is already loaded
PLAT-49208: Update Visual Studio solution files, no code changes.
[PLAT-50469] Fix UART initialization cases
PLAT-38975: Renoir and Mero/VG USB PHY FW loading.
PLAT-xxxxx: Early load DMCU IP FW.
SWDEV-200719: Reduce frequency of PSP Power Gating
SWDEV-201137: Code cleanup - rename gFbBasePhyAddr to gTmrBaseGpuVa.
LAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi Change the setting of the DMUB Cache CW0/CW1 registers to work around the DMUB h/w bug.
SWDEV-198271: Adding support for DSA signature validation.

Release Version 0.11.0.20
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-49622: Lock down MP2 RAM1
[BOOTLOADER] PLAT-49943 Enable EncryptTmzWrites
[BOOTLOADER] PLAT-50194 Fix MMEA0_SECURE_CTRL programming
[BOOTLOADER] FEAT-27034 Add stage2 anti-rollback
[BOOTLOADER] BootROM mailbox re-used as TOS mailbox bug fix
[BOOTLOADER] Set explicit status code values

Trusted OS
----------------
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi Change the setting of the DMUB Cache CW0/CW1 registers to work around the DMUB h/w bug.
PLAT-50532: Temporary inform good status of PspStorage, till feature is enabled in drv_sys
PLAT-50539: [RN] Enable SMU-2-PSP interface back after S3/S0i3 resume
SWDEV-189108 PSP-SMU Firmware interface changes for XGMI DPM
[TOS] Temporary workaround to ignore command 0x1B from BIOS
[TOS] Temporary disable reverting PSP security policy during debug unlock
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi Change the setting of the DMUB Cache registers from GPU Virtual to FB Physical address.
[TOS] PLAT-49831: Suspend SMU call in Secure Debug Unlock causing hard hang
SWDEV-198271: Adding support for DSA signature validation.
PLAT-49210: Use SMI-interface to write to PSP NVRAM and enable encryption PSP NVRAM records (phase2)
PLAT-46938 : Enhance Dlm support for Ftpm Dlm prints

Release Version 0.11.0.1E
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
[TOS] RN: Disable MP0 power features to fix S3
PLAT-49208: Update Visual Studio solution files, no code changes.

Release Version 0.11.0.1D
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Disable VCPU Instruction Fetch Monitor
[BOOTLOADER] PLAT-46883 Fix bug of eDP early screen-on during S0i3
[BOOTLOADER] Skip graphics register access on S0i3 resume
[BOOTLOADER] FEAT-27034 Add anti-rollback
[BOOTLOADER] PLAT-49718  Skip IP-discovery table loading in S3/S0i3 cycle
[BOOTLOADER] Retrieve and unwrap iKEK if necessary

Trusted OS
----------------
[TOS] Temporary disable the suspend call to SMU to enable SDU with GFX Driver
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi Cosmetics.
[TOS] RN: Enable MP0 power features
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi New requirement for resetting the new DMUB IP FW after testing in DAL.
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi Additional requirement for resetting the new DMUB IP FW.
PLAT-48444: SPI settings for normal/fast read speed and test mode
PLAT-48284: [RN] TMR Setup fixes and redesign Fix a TMR leaking issue during S4 restore FW. Check if the TMR region is already set with the same addresses. If so then return back already occupied slot number. That logic was applied on RV and works fine.
PLAT-49208: Soft-Monotonic-Counter APIs implementation (phase-1)

Release Version 0.11.0.1C
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Enable Unconditional Unlock
[BOOTLOADER] PLAT-48891 Skip MP2 load if already executing
[BOOTLOADER] PLAT-46883 Add GPE wake event for eDP early screen-on during S0i3
[BOOTLOADER] update binary Makefiles
[BOOTLOADER] Remove crypto function call debug prints
[BOOTLOADER] PLAT-49055 Solving PSP BL failure updating HMAC key
[BOOTLOADER] Stage1 BL fixes from emulation testing.
[BOOTLOADER] Add security policy header validation

Trusted OS
----------------
[TOS] RN: Fix to skip applying GFX security policy on unlocked part
PLAT-48284: [RN] TMR Setup fixes and redesign
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi
SWDEV-196883: Bug fix for TMZ enablement on GFXOFF exit.

Release Version 0.11.0.1A
-----------------------------------
NOT Included in Release Version 0.11.0.1A
-----------------------------------------
-Secure Debug Unlock
-RPMC
-MP2 FW Loading Disable

BootLoader
----------------
[BOOTLOADER] Enable PMU/KeyDb FW validation
[BOOTLOADER] PLAT-47866 Fix CF9-06 reset
[BOOTLOADER] Change UMC key index from 0 to 15
[BOOTLOADER] Remove PSP BL Port 80 Accesses during ABL execution
[BOOTLOADER] Enable TMZ on non-secure parts
[BOOTLOADER] Store TMR restore data in crypto global buffer
[BOOTLOADER] GPU Host Translation Cache add VM_IOMMU enable
[BOOTLOADER] Fix GPU Host Translation Cache enablement from syscall
[BOOTLOADER] Fix Softfuse for controlling MP2 loading bug
[BOOTLOADER] Add runtime emulation detection
[BOOTLOADER]PLAT-47570: Fix IP harvesting
[BOOTLOADER] eSPI configure cherry pick from rn-bringup
[BOOTLOADER] Check return code of call to kdb_getKey

Trusted OS
----------------
SWDEV-197248: Revert commit [ea882fa] as VCN team dropped their debug request.
PLAT-46883: [Renoir-MS]Add GPE wake event support for eDP early screen-on
[TOS] RN: Disable Power Gating on Non-secure parts
SWDEV-197248: VCN firmware front-door loading not working due to TMR settings
Fix Unit ID of DMUB and typo in the code for reset it.
SWDEV-197248: Return GPU Virtual Address of VCN firmware in SRIOV mode for VF.
SWDEV-197248: Return FB Physical Address of VCN firmware to the Gfx driver.
Support to handle external abort in Secure OS
[tOS] Add comments to make it easier to analyse exception data in registers.
PLAT-48284: [RN] TMR Setup fixes and redesign
SWDEV-196436 Corrected PCRU PUBLIC structure
Porting rn-bringup branch commit [a42dde2] to the amd-staging: [TOS] PLAT-47550 Fixed SMN blocking duo to WLAN access
[tOS]: Sanitize modulus and exponent sizes in CcpModExp().
[TOS] Clean up LoadModule function from redundant operation.
[TOS] Correct PSP FW STATUS format description in the comment header of DiagnosticMessage() function
Porting rn-bringup branch commit [9cfcfb1] to the amd-staging: "[TOS] Enable MPCLK SOCCLK SHUBCLK deep sleep allow"
PLAT-48284: [RN] TMR Setup fixes and redesign
[TOS] PLAT-47882 Fix USB FW sometimes failing validation.
[SWDEV-194505] TOS: Signing drv_sys.bin using KDS fails
PLAT-47405: Fix security issue caused by inadequate protection of C2PMSG_91
DEREM-299: Bug fix for USB-PHY FW loading.
PSP-3520: Do not allow using TestKey on secure parts.
PLAT-47833: [RN] Fix MMHUB Base address and AXI address computation
SWDEV-181915: System Hard Hang when resume from sleep and Netflix app open
PSP-3520: Use KeyDb loaded by Boot Loader.
[SWDEV-194045] TOS: Add missing header binary file for PSP OS
[SWDEV-193018]: Fix compile warnings in BUILD_RN configuration
PSP-3521: Fix permissions check bug for IPC (inter-process calls) handling in SysDrv.
SWDEV-190741: Move SRIOV dynamic register writes from PSP OS to sysdrv.

Release Version 00.17.00.17
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
[SWDEV-193018]- MI100: Enable dGPU specific sequences in PSP OS
Add BUILD flag for MI100 to enable functionality in PSP OS
Update hw_reg, smn_reg and rsmu_header files.

Release Version 0.11.0.16
-----------------------------------
BootLoader
----------------
[BOOTLOADER] LPC port init clean up

Trusted OS
----------------
NA

Release Version 0.11.0.15
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Update application of security policy
[BOOTLOADER] PLAT-32123 Enable eSPI for 3F8h

Trusted OS
----------------
PLAT-38975: Fix to allow test keys on non secure part
PLAT-38975: Add RN 2K test key in global Key permission array
PLAT-46586: [RN] Enable graphics security policy in tOS
PLAT-38975: RN Load USBC Phy firmware. USB/DP PHY FW Unified binary and each image inside validation.
PSP-3520: Use KeyDb loaded by Boot Loader.
PSP-3505: Update Visual Studio project files.
PSP-3505: Update Visual Studio project files.
PLAT-46586: Refactoring of rsmu.c file

Release Version 0.11.0.14
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-47178 Add SVC call to set iGPU is disabled.
[BOOTLOADER]PLAT-47358: Fix BIOS load error reporting

Trusted OS
----------------
NA

Release Version 0.11.0.13
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Add thermal trip bit check to S5 boot

Trusted OS
----------------
PLAT-46190: [RN] Update PSP Authentication for PROM19 Variants
FEAT-26870: [Navi1x][tOS] Translate PS_DIRECTORY_ENTRY_TYPE_BIST_DATA to SPI Address
[SWDEV-190382]- MI100: Add Product Number and Build Flag
[SWDEV-190381] - Add GFX9 Enablement
Clean up power feature code in TOS
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi
PSP-3520: Add validation of KeyUsageFlag for IP FWs.
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi

Release Version 0.11.0.12
-----------------------------------
BootLoader
----------------
[BOOTLOADER] SWDEV-190975 Implement CS-seed checking
[BOOTLOADER] PLAT-46947: Add SVC Input Validation
[BOOTLOADER] PLAT-46260 Skip L3 in MBAT when downcored
[BOOTLOADER] PLAT-46390 Enable ABL verification with key database
[BOOTLOADER] PLAT-46829/44597 Load/Verify SMU(MP1) without PSP image header
[BOOTLOADER] PLAT-46746 Set C2PMSG97-99 attribute
[BOOTLOADER] PLAT-41678 Check CCP TRNG numbers are valid
[BOOTLOADER] PLAT-46520 PSB support for RN
[BOOTLOADER] Stage 1 bootloader initial commit:
[BOOTLOADER] Fix Coverity warnings
{BOOTLOADER] SWDEV-188588 Fixed scanning for Embedded FW Signature
[BOOTLOADER] PLAT-46786 Bypass VBL in S0i3 mode
[BOOTLOADER] Fix HMAC comparison function
[BOOTLOADER] Fix LogBLPostCode "hang" condition

Trusted OS
----------------
DEREM-192: [RN] Enable MPCLK deep sleep
PLAT-47110: Address NCC issue "Inspection-006-097".
DESPCPPSP-56 - Navi1x - Remove TMR fences on Unlock
RTGPLAT-1155: Navi 1x: Restore harvesting registers before ATC invalidation
FEAT-26869: [Renoir] Update and Verify CS-SEED-based KDF and Key Unwrapping SWDEV-190959: Promontory Device Pre-Shared Key Authentication Key SWDEV-190961: Knoll Device Pre-Shared Authentication Key
FEAT-26175: [Navi1x] Add SPI write support for GD25Q80C SPI model. Add SPI init support for NV14 as well as NV10
PLAT-33045: [PSP Phase II] The shared DLM buffer can be abused to corrupt TEE OS memory
PLAT-45572: Merge Gfx 9 IP FW loading for Renoir with Gfx 10 implementation for Navi

Release Version 0.11.0.11
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-42929 Authenicate BIOS PEI in S3/S0i3 mode
[BOOTLOADER] PLAT-46735 Disallow non-MP0 to access MP2 SRAM1
[BOOTLOADER] PLAT-46096 Correct S2PMSG register init

Trusted OS
----------------
SWDEV-188549 [Renoir] Implement PSP virtual mode
FEAT-26175: [Navi1x] Add SPI write support for GD25Q80C SPI model
RTGPLAT-1217: Navi1x: fix DMCU firmware start address for ERAM and ISR
RTGPLAT-1153: Enable DfCstate after debug unlock
RTGPLAT-1217: Navi1x: fix DMCU firmware size for ERAM and ISR
PSP-3520: Bug fix in IP FW validation.
RTGPLAT-1201: Navi 1x: Fix applying security policy on gfx off exit.
RTGPLAT-1201: Navi 1x: Fix applying security policy on gfx off exit
PLAT-43193: Disable SureStart feature for Renoir.
RTGPLAT-1155: Save/Restore harvesting registers before invalidation in mode 2 reset
RTGPLAT-1187: Navi10/14 fix mode 2 reset incorrect SMN address
PLAT-46066: New Gfx-to-PSP command for programming VM default address
RTGPLAT-1179:[Navi14]:Fix build break
SWDEV-188857 Add support for CCP power features.
RTGPLAT-1175: [Navi14]: Fix display pipe count
RTGPLAT-1154: do not clean the display as DCN is not resetted in Mode 2 reset
RTGPLAT-1174: [Navi14]:Disable XGMI init
RTGPLAT-1154: Remove DCN Reset as part of mode 2 reset
PLAT-43197: [DRTM] PSP controlled shared memory buffer.

Release Version 0.11.0.F
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-39850 Add support for CCP HMAC engine
[BOOTLOADER] PLAT-42522 Change APOB signing key
[BOOTLOADER] PLAT-42924 Add RPMC support
[BOOTLOADER] PLAT-42917 Key Database [3/3]

Trusted OS
----------------
RTGPLAT-1138: [Navi14]:Enable Mode1 and Mode2 reset
RTGPLAT-1137:[Navi14]: Update register headers
RTGPLAT-1130:[Navi14]:Enable Secure Debug Unlock in Secure OS
RTGPLAT-960: [Navi14]: Add SOC family Id in header of Sys-Driver image
RTGPLAT-1149:[Navi1X]: Use common flag for Navi1X features
RTGPLAT-928: Disable VCPU instruction fetch monitoring.
PLAT-42922: [RN] PlayReady: TMZ in System Memory & LFB
FEAT-25098 - NV10 SRIOV: Re-enable Periodic VCN FW Validation

Release Version 0.11.0.E
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-46260 Disabled MBAT as part of the release to unblock PEMU
[BOOTLOADER] PLAT-46290 Skip GC RSMU configuration
[BOOTLOADER] PLAT-45821 Fix Windows BSOD in SimNow
[BOOTLOADER] PLAT-46029 Enable postcode buffer
[BOOTLOADER] PLAT-46061 Fix firmware size and location
[BOOTLOADER] PLAT-42917: Key Database [2/N]
[BOOTLOADER] PLAT-44423 Load IP discovery binary
[BOOTLOADER] PLAT-45940 Fix section names, zero-init BSS

Trusted OS
----------------
PLAT-36079: Navi10: Fix register address and offsets for Mode 1
RTGPLAT-1015: during mode2 reset update bios scratch 6 register
RTGPLAT-640: temp-hack: disable PSP going to low power state
FEAT-24956: Navi 10: Fix UMC COLD RESETB SMN address
RTGPLAT-960: Add register headers for Navi14
FEAT-26164: Add Gfx-to-PSP APIs for passing parameters for GDDR6 from KMD.
PLAT-46066: New Gfx-to-PSP command for programming VM default address
PLAT-45692: Skip complete frame for vm_switch
SWDEV-185449: Prevent programming VM table for base address zero
PLAT-46130: Renoir: Update PSP message codes
DEREM-182: C2P registers not being updated for SLVERRs on PCIE0 RSMU MMIO register accesses
RTGPLAT-960: Add PSP FW image header for Navi14
RTGPLAT-960: Update Makfiles for signing function and help for Navi14
RTGPLAT-960: Add separate product number for Navi14
RTGPLAT-386: [VCN RAM]: Program GPU Physical Address into VCN RAM buffer.
RTGPLAT-651: drv_sys: setup_tmr should not fail when already setup
RTGPLAT-386: [VCN RAM]: Program GPU Physical Address into VCN RAM buffer.
PLAT-46066: New Gfx-to-PSP command for programming VM default address
FEAT-26164: Update data structure for handling GDDR6 training parameters.
RTGPLAT-386: [VCN RAM]: Program UVD_LMI_SPACE_INTERNAL3 register by PSP.
Store TOS data abort information into new firmware status registers.

Release Version 0.11.0.C
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-32123 Add eSPI support
[BOOTLOADER] PLAT-38153 32MB SBIOS Support
[BOOTLOADER] PLAT-42917: Key Database [1/N]

Trusted OS
----------------
PLAT-45827: Add new cmd in TEE interface
RTGPLAT-960: Use common ccp lib for Navi1x platform
RTGPLAT-386: VCN RAM loading - FW case in Reset IP FW
RTGPLAT-960: Make SMU interface header common for Navi1x platform
RTGPLAT-960: Introduce common flag for Navi1x platform
RTGPLAT-977: Implement TOC fw size multiplier to accomodate larger fw in TMR
FEAT-26164: Implementation of  save/invalidate of GDDR6 training parameters in SPI.
PLAT-44810: drv_sys: Clear TMZ key data while debug unlock
RTGPLAT-386: [VCN IP monitoring]: Implementation of VCN RAM loading.
FEAT-26164: Add data structures and API for handling GDDR6 training parameters.
PLAT-44359: PSP FW to support Pro SKU detection by reading fuse bit
RTGPLAT-928: Disable VCPU instruction fetch monitoring
RTGPLAT-535: DrvSys: Apply UMC unlock policy for MPV feature
FEAT-24472: DMCU Firmware front-door Loading in system driver
RTGPLAT-427: Enable TMR configuration for VCN ucode memory
PLAT-45708: [RN] Fix a bug in RSMU security interrupt clearing

Release Version 0.11.0.B
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-38153 32MB SBIOS Support
[BOOTLOADER] PLAT-42917: Key Database [1/N]
[BOOTLOADER] Implemented MBAT programming and SVC_REMAP_MBAT_ENTRY
[BOOTLOADER] PLAT-42932: Added GPU Host Translation Cache Feature
[BOOTLOADER] PLAT-43208 SVCcall for Reserved DRAM memory
[BOOTLOADER] PLAT-43946 Load Diag bootloader only when soft-fuse bit5 is set
[BOOTLOADER] Pass zero-padded exponent in CCP mod exp command
[BOOTLOADER] Add support for hardware PC sniffer
[BOOTLOADER] PLAT-41898 VBL loading by iGFX fuse

Trusted OS
----------------
NA

Release Version 0.11.0.A
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-42936 S3 Entry/Exit in Simnow
[BOOTLOADER] PLAT-43310/PLAT-43443 Port changes from Raven to Renior 4/X
[BOOTLOADER] PLAT-44281 Allocate 0x29 to KVM binary
[BOOTLOADER] HW-IP-Discovery feature implementation
[BOOTLOADER] PLAT-44395 DEREM-168 MP2 support

Trusted OS
----------------
NA

Release Version 0.11.0.9
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-43698 SVC call "SVC_SEARCH_BIOS_DIR_V2"
[BOOTLOADER] Add build flags to Makefile's "help"
[BOOTLOADER] Remove SKIP_ERROR
[BOOTLOADER] PLAT-38344/PLAT-43443 Port changes from Raven to Renior 3/X
[BOOTLOADER] PLAT-44006 Headerless FW loading
[BOOTLOADER] S0i3 feature implementation

Trusted OS
----------------
PLAT-43197: PSP FW Version Manifest Generation
PLAT-42720: Enable TMZ for Navi10
Skip SMU FW reload only on dGPU
PLAT-37871: Navi10 - Enable GC violation logging
RTGPLAT-591: Fix secureOS debug unlock sequence to unlock GC
SWDEV-183202: RV2 and RV1 S3 failure after 25 cycles
FEAT-25096: NV10 SRIOV - Update Load Vector Value and Destination
PSP-3521: Add support for IPC in SysDrv
SWDEV-185623: NV10 SRIOV - RLC Autoload Failure on VF
FEAT-26140: MES/MES_STACK FW Loading Case in Reset IP FW
Add MP0 Power Features to trustedOS
Remove compilation warning in tOS
SWDEV-184767: Save/restore VCN FW size over S4 cycle
FEAT-25091: NV10 SRIOV - Remove SDMA Jump Table Copy
PLAT-42918: Fix S0i2 support in tOS
RTGPLAT-433: Update product code in firmware version
PLAT-44359: PSP FW to support Pro SKU detection by reading fuse bit
Add support for PC Sniffer in tOS kernel
RTGPLAT-552: TMR - Disable write enable for read only TMRs
PLAT-45138: Fix encrypted TA load failure
PLAT-43197: PSP controlled shared memory buffer
PLAT-45469: BIOS-PSP SMI Mutex C2PMSG_23 Attribute Bug
Disable PC Sniffer when changing timeouts
FEAT-24957: Navi10 - Add Mode2 Reset Support
FEAT-25096: NV10 SRIOV - L1 Policy Apply and Revert Sections
FEAT-25098: NV10 SRIOV - Periodic VCN FW Validation for VFs
SWDEV-184767: Reorganize IP FW Loading Code
RTGPLAT-386: Implementation of VCN RAM Loading
PLAT-45596: Bug introduced by moving virtual interrupts beyond max physical interrupts
PLAT-32090: Race condition leads to memory corruption in BIOS2PSP command dispatcher
FEAT-25098: NV10 SRIOV - Temporarily Disable Periodic VCN FW Validation
RTGPLAT-760: Add support to blanking active display pipe in Mode2 reset
RTGPLAT-814: Skip EA and UTCL2 reset in Mode2
RTGPLAT-760: Refactor "32. Add support to blanking active display pipe in Mode2 reset"
FEAT-24956: Navi10 - Add Mode1 Reset Support
RTGPLAT-540: Restore APCC tuning registers on PnP and Mode2 reset
SWDEV-185391: Configure cold/hard reset in SMUIO_GFX_MISC_CNTL
RTGPLAT-464: Add support to apply GRBM CAM settings in Mode2 reset
Revert "FEAT-25091 : NV10 Baremetal - Add SDMA Jump Table Copy"

Release Version 0.11.0.8
-----------------------------------
BootLoader
----------------
[BOOTLOADER] PLAT-38351 Increase ABL SRAM SIZE
[BOOTLOADER] PLAT-43604 Error return of MapUserStack()
[BOOTLOADER] Fixed bug introduced in code cleanup CL 60132
[BOOTLOADER] PLAT-43443 Port changes from Raven to Renoir 2/X

Trusted OS
----------------
PSP-3520: Support multi-level FW headers for IP FW
PLAT-42376: RPMC support needed in trustedOS
PSP-3520: Fix TOCTOCU security issue in IP FW validation
FEAT-25091: NV10 SRIOV - VF GFX FW Loading in TMR
SWDEV-182169: VCN FW Restore Fix
FEAT-25094: NV10 SRIOV - RLC Autoload for VF
PLAT-42113: NV10 GFX Security Policy Update
PLAT-43743: Driver Syscall API Update to Differentiate Error and Valid Return Code
PLAT-41792: DRTM Address Mapping API in System Driver
FEAT-25097: NV10 SRIOV - VCN FW Loading in VMR
PLAT-43580: Set status bit in BIOS-to-PSP command register for A/B recovery
PSP-3505: Add synchronization barrier to SMN write service
SWDEV-181915: Fix PlayReady playback issue after S3 resume
PLAT-43197: PSP FW version Manifest Generation
FEAT-25091: NV10 SRIOV - Remove SDMA Jump Table Copy
PLAT-43719: Change fTPM signing key from root key to AMDTEE TA key
FEAT-25096: NV10 SRIOV - VF ID Update to Load GFX FW and TOC in PF Memory
PSP-3521: Initial coding for IPC implementation
PLAT-44084: Bug check when resume from sleep and Netflix app open
PLAT-44089: Port P4 CL#62884 - SMU RAS Fatal Error During FW Loading

Release Version 0.11.0.7
-----------------------------------
BootLoader
----------------
[BOOTLOADER] S0i3 feature implementation
[BOOTLOADER] Fix FW version print
[BOOTLOADER] PLAT-43443 Port changes from Raven to Renoir
[BOOTLOADER] PLAT-37728 Add Combo Bios Directory Support

Trusted OS
----------------
FEAT-25098: Enable MMSCH FW Front Door Loading on Navi 10.
PLAT-41793: APIs for dynamic allocation of TMR regions.
PLAT-41792: DRTM Address Mapping API.
FEAT-25098: Port SDMA Jump Table 4K alignment from Navi 10 repo.

Release Version 0.11.0.6
-----------------------------------
BootLoader
----------------
[BOOTLOADER] Update RN fuse file
[BOOTLOADER] Removed HSTI support
[BOOTLOADER] Update PSP BL Crypto functions to use CCP_HAL layer which supports RN CCP12
[BOOTLOADER] PLAT-41423 Implement USB-C PHY (FW type: 0x44) loading in PSP bootloader
[BOOTLOADER] SWDEV-176482 Clear a TLB busy bit early in smnif
[BOOTLOADER] Change crLsb algorithm to support double slot allocations
[BOOTLOADER] PLAT-42113 Implement Renoir L0 security policy loading and execution
[BOOTLOADER] PLAT-42482 Implement Renoir L1 security policy loading to DRAM
[BOOTLOADER] Fixed DC.String_Buffer error in file kdf.c function DeriveKeyUsingPRF
[BOOTLOADER] PLAT-37433 Enhancement in white-list feature
[BOOTLOADER] Add error log when PSP BL enters into recovery mode
[BOOTLOADER] SWDEV-175419 TMR s0i3 restore cleanup
[BOOTLOADER] Fixed MP2 SRAM1 layout overlap with BootRom
[BOOTLOADER] Eliminated MP2 SRAM1 data save/restore authentication
[BOOTLOADER] Add RAM cookie check in AddEntryToMP2RAM1()
[BOOTLOADER] Fix CCP zlib argument order
[BOOTLOADER] PMFW-1072 Workaround for BootRom bug by programming MP0_ROMBIST_BYPASS to 0
[BOOTLOADER] Update RN register files with CL#1027599
[BOOTLOADER] Fix a bug in PutVcnInReset()
[BOOTLOADER] PSP-3505 Remove the ASIC TYPE from commom_defs.h

Trusted OS
----------------
Port Gfx FW loading functionality from Navi 10 repo.
Initial implementation of USBC FW loading.
Use latest CCP HAL build which includes Renoir specific register definitions.
SWDEV-175419: refactor TMR handling functionality (use index/data access to TMR registers).
Multiple updates to Security Policy definitions (including section ID refactoring).
Remove periodic MEC FW validation code.
Implement DRTM specific SysDrv services for register access.
Implement DRTM specific SysDrv services for TMR handling (not completed yet).
Clean up SMU message handler.
Updated GFXOFF exit sequence (support multiple SMU messages).
PLAT-38975: Refactor FW validation function to support 2KB and 4KB signatures.
FEAT-25092: PSP detects SR-IOV Capability.
Add support for Customer Key enablement (Key Database). Not completed yet.
PMFW-1071: Set MP2_FW_OVERRIDE.MP0_ROMBIST_BYPASS = 1 before entering S0i3.
PLAT-42376: RPMC support in Trusted OS.
Update BootLoader-to-tOS mailbox location and size across all builds (NV10/RN).
Add PSP (MP0) activity counter.
SWDEV-175419: Add mutex for protection for TMR modification.
DEIPCSMU11-3418: Increase SysDrv SRAM buffer from 4 KB to 8 KB to solve CCP issues with ECC.
SWDEV-178153: Implement PSP Virtual Mode.

Release Version 0.11.0.5
-----------------------------------
BootLoader
----------------
NA

Trusted OS
----------------
Remove SimNow debug code.
Reserve DRAM buffer for DRTM TA.
Fix SimNow Data Abort caused by overlap of temporary L1 page table with tOS code.
