Difference between revisions of "Developer Manual/RAM init"

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=== Introduction ===
 
One of the most important tasks of coreboot is to '''initialize your system RAM'''.
 
One of the most important tasks of coreboot is to '''initialize your system RAM'''.
  
 
This initialization depends on the type of RAM in your motherboard. To detect the type of RAM the
 
This initialization depends on the type of RAM in your motherboard. To detect the type of RAM the
SPD (Serial Presence Detect) must be read for each DIMM. This reading is done using I2C communication using one of the [[I2C]] buses on the motherboard. The exact method of reading depends on the motherboard.
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SPD (Serial Presence Detect) must be read for each DIMM. This reading is done using I2C communication using one of the [[Developer Manual/I2C]] buses on the motherboard. The exact method of reading depends on the motherboard.
  
 
=== SDRAM ===
 
=== SDRAM ===

Latest revision as of 19:32, 1 April 2011

Introduction

One of the most important tasks of coreboot is to initialize your system RAM.

This initialization depends on the type of RAM in your motherboard. To detect the type of RAM the SPD (Serial Presence Detect) must be read for each DIMM. This reading is done using I2C communication using one of the Developer Manual/I2C buses on the motherboard. The exact method of reading depends on the motherboard.

SDRAM

There are a number of steps you have to perform to properly initialize SDRAM. This depends on the chipset, as well as the DIMMs which are inserted into the mainboard (and their properties, such as CAS latencies, and so on).

Sample northbridge datasheets:

Sample SDRAM datasheets:

DDR

DDR2

DDR3

Resources

SDRAM:

DDR SDRAM:

DDR2 SDRAM

DDR3 SDRAM

Note: Micron lists SPD values for all the memory they produce. This really helps when trying to trouble shoot memory and SPD values. Micron SPD Lookup.