[coreboot-gerrit] Patch set updated for coreboot: 7fe1aa3 i945: Disable check for 2-dimm support.

Vladimir Serbinenko (phcoder@gmail.com) gerrit at coreboot.org
Sat Dec 6 12:00:53 CET 2014


Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7568

-gerrit

commit 7fe1aa39dd98cf9298ddf60644a1a7dd6f2030c8
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Sat Nov 22 21:12:14 2014 +0100

    i945: Disable check for 2-dimm support.
    
    The check is wrong. On Acer Aspire One it returns 0 despite 2 DIMMs working
    fine on the same channel if this check is disabled (tested by memtest).
    On boards that have only 1 DIMM per channel, the code will simply find no
    SPD and skip empty slot.
    
    Change-Id: I5f2fdcd1d948ebf3eabebaea4441af4c19e47f8f
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/northbridge/intel/i945/raminit.c | 14 --------------
 1 file changed, 14 deletions(-)

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 187bcf5..726fbfe 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -208,16 +208,6 @@ static int sdram_capabilities_enhanced_addressing_xor(void)
 	return (!reg8);
 }
 
-static int sdram_capabilities_two_dimms_per_channel(void)
-{
-	u8 reg8;
-
-	reg8 = pci_read_config8(PCI_DEV(0, 0x00, 0), 0xe8); /* CAPID0 + 8 */
-	reg8 &= (1 << 0);
-
-	return (reg8 != 0);
-}
-
 // TODO check if we ever need this function
 #if 0
 static int sdram_capabilities_MEM4G_disable(void)
@@ -382,10 +372,6 @@ static void sdram_get_dram_configuration(struct sys_info *sysinfo)
 		if (!sdram_capabilities_dual_channel() && (dimmno >> 1))
 			continue;
 
-		/* Two DIMMs per channel not supported, but odd DIMM number? */
-		if (!sdram_capabilities_two_dimms_per_channel() && (dimmno& 1))
-			continue;
-
 		printk(BIOS_DEBUG, "DDR II Channel %d Socket %d: ", (dimmno >> 1), (dimmno & 1));
 
 		if (sysinfo->spd[dimmno][SPD_MEMORY_TYPE] != SPD_MEMORY_TYPE_SDRAM_DDR2) {



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