[coreboot-gerrit] Patch set updated for coreboot: e88e1e9 igd.asl rewrite
Vladimir Serbinenko (phcoder@gmail.com)
gerrit at coreboot.org
Sat Dec 6 12:00:58 CET 2014
Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7472
-gerrit
commit e88e1e9b4872da77782b034cc8004b40bb746e45
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date: Fri Oct 31 09:16:31 2014 +0100
igd.asl rewrite
Old igd.asl had inconsistent addresses (between _DOD and actual device)
and ghost devices. Any of those is enough to make brightness on windows
fail and make igd.asl out-of-ACPI-spec. Also old code favoured ridiculous
copying of the same thing 6 times per chipset. Leave only hooking up and
chipset-specific part in chipset directory. Move NVS handling and ACPI-spec
parts to a common file.
Change-Id: I556769e5e28b83e7465e3db689e26c8c0ab44757
Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
src/drivers/intel/gma/Kconfig | 4 +
src/drivers/intel/gma/Makefile.inc | 1 +
src/drivers/intel/gma/acpi.c | 135 +++++++
src/drivers/intel/gma/i915.h | 7 +
src/drivers/intel/gma/igd.asl | 113 ++++++
src/mainboard/apple/macbook21/acpi/video.asl | 51 ---
src/mainboard/apple/macbook21/acpi_tables.c | 7 -
src/mainboard/apple/macbook21/cmos.default | 1 -
src/mainboard/apple/macbook21/cmos.layout | 1 -
src/mainboard/apple/macbook21/devicetree.cb | 5 +-
src/mainboard/getac/p470/acpi/ec.asl | 2 +-
src/mainboard/getac/p470/acpi/video.asl | 44 ---
src/mainboard/getac/p470/acpi_tables.c | 8 -
src/mainboard/getac/p470/devicetree.cb | 3 +
src/mainboard/google/bolt/acpi_tables.c | 7 -
src/mainboard/google/bolt/devicetree.cb | 3 +
src/mainboard/google/butterfly/acpi_tables.c | 7 -
src/mainboard/google/butterfly/devicetree.cb | 3 +
src/mainboard/google/falco/acpi_tables.c | 7 -
src/mainboard/google/falco/devicetree.cb | 3 +
src/mainboard/google/link/acpi_tables.c | 8 -
src/mainboard/google/link/devicetree.cb | 3 +
src/mainboard/google/panther/acpi_tables.c | 7 -
src/mainboard/google/panther/devicetree.cb | 3 +
src/mainboard/google/parrot/acpi_tables.c | 7 -
src/mainboard/google/parrot/devicetree.cb | 3 +
src/mainboard/google/peppy/acpi_tables.c | 7 -
src/mainboard/google/peppy/devicetree.cb | 3 +
src/mainboard/google/samus/acpi_tables.c | 7 -
src/mainboard/google/samus/devicetree.cb | 3 +
src/mainboard/google/slippy/acpi_tables.c | 7 -
src/mainboard/google/slippy/devicetree.cb | 3 +
src/mainboard/google/stout/acpi_tables.c | 7 -
src/mainboard/google/stout/devicetree.cb | 3 +
src/mainboard/ibase/mb899/acpi/video.asl | 42 --
src/mainboard/ibase/mb899/acpi_tables.c | 7 -
src/mainboard/ibase/mb899/devicetree.cb | 4 +
src/mainboard/intel/baskingridge/acpi_tables.c | 7 -
src/mainboard/intel/baskingridge/devicetree.cb | 3 +
src/mainboard/intel/cougar_canyon2/acpi_tables.c | 9 -
src/mainboard/intel/cougar_canyon2/devicetree.cb | 3 +
src/mainboard/intel/d945gclf/acpi/video.asl | 42 --
src/mainboard/intel/emeraldlake2/acpi_tables.c | 7 -
src/mainboard/intel/emeraldlake2/devicetree.cb | 3 +
src/mainboard/intel/wtm2/acpi_tables.c | 7 -
src/mainboard/intel/wtm2/devicetree.cb | 3 +
src/mainboard/iwave/iWRainbowG6/acpi/video.asl | 44 ---
src/mainboard/iwave/iWRainbowG6/acpi_tables.c | 8 -
src/mainboard/iwave/iWRainbowG6/devicetree.cb | 3 +
src/mainboard/kontron/986lcd-m/acpi/video.asl | 42 --
src/mainboard/kontron/986lcd-m/acpi_tables.c | 7 -
src/mainboard/kontron/986lcd-m/devicetree.cb | 3 +
src/mainboard/kontron/ktqm77/acpi_tables.c | 8 -
src/mainboard/kontron/ktqm77/devicetree.cb | 3 +
src/mainboard/lenovo/t520/acpi_tables.c | 7 -
src/mainboard/lenovo/t520/devicetree.cb | 3 +
src/mainboard/lenovo/t520/dsdt.asl | 5 +-
src/mainboard/lenovo/t530/acpi_tables.c | 7 -
src/mainboard/lenovo/t530/devicetree.cb | 3 +
src/mainboard/lenovo/t530/dsdt.asl | 5 +-
src/mainboard/lenovo/t60/acpi/video.asl | 24 +-
src/mainboard/lenovo/t60/acpi_tables.c | 7 -
src/mainboard/lenovo/t60/devicetree.cb | 3 +
src/mainboard/lenovo/t60/dsdt.asl | 10 +-
src/mainboard/lenovo/x200/acpi_tables.c | 7 -
src/mainboard/lenovo/x200/devicetree.cb | 3 +
src/mainboard/lenovo/x200/dsdt.asl | 4 +-
src/mainboard/lenovo/x201/acpi_tables.c | 7 -
src/mainboard/lenovo/x201/devicetree.cb | 3 +
src/mainboard/lenovo/x201/dsdt.asl | 5 +-
src/mainboard/lenovo/x220/acpi_tables.c | 6 -
src/mainboard/lenovo/x220/devicetree.cb | 3 +
src/mainboard/lenovo/x220/dsdt.asl | 5 +-
src/mainboard/lenovo/x230/acpi_tables.c | 6 -
src/mainboard/lenovo/x230/devicetree.cb | 3 +
src/mainboard/lenovo/x230/dsdt.asl | 5 +-
src/mainboard/lenovo/x60/acpi/video.asl | 55 ---
src/mainboard/lenovo/x60/acpi_tables.c | 7 -
src/mainboard/lenovo/x60/devicetree.cb | 3 +
src/mainboard/lenovo/x60/dsdt.asl | 6 +-
src/mainboard/packardbell/ms2290/acpi/ec.asl | 4 +-
src/mainboard/packardbell/ms2290/acpi_tables.c | 7 -
src/mainboard/packardbell/ms2290/devicetree.cb | 3 +
src/mainboard/packardbell/ms2290/dsdt.asl | 2 -
src/mainboard/roda/rk886ex/acpi/ec.asl | 2 +-
src/mainboard/roda/rk886ex/acpi/video.asl | 44 ---
src/mainboard/roda/rk886ex/acpi_tables.c | 7 -
src/mainboard/roda/rk886ex/devicetree.cb | 3 +
src/mainboard/roda/rk9/acpi_tables.c | 7 -
src/mainboard/roda/rk9/devicetree.cb | 3 +
src/mainboard/samsung/lumpy/acpi_tables.c | 7 -
src/mainboard/samsung/lumpy/devicetree.cb | 3 +
src/mainboard/samsung/stumpy/acpi_tables.c | 7 -
src/mainboard/samsung/stumpy/devicetree.cb | 3 +
src/northbridge/intel/fsp_sandybridge/Kconfig | 2 +
src/northbridge/intel/fsp_sandybridge/acpi/igd.asl | 326 ++--------------
src/northbridge/intel/fsp_sandybridge/chip.h | 4 +
src/northbridge/intel/fsp_sandybridge/gma.c | 22 ++
src/northbridge/intel/gm45/Kconfig | 1 +
src/northbridge/intel/gm45/acpi/igd.asl | 423 ++-------------------
src/northbridge/intel/gm45/gma.c | 22 ++
src/northbridge/intel/haswell/Kconfig | 1 +
src/northbridge/intel/haswell/acpi/igd.asl | 326 ++--------------
src/northbridge/intel/haswell/chip.h | 4 +
src/northbridge/intel/haswell/gma.c | 22 ++
src/northbridge/intel/i945/Kconfig | 1 +
src/northbridge/intel/i945/acpi/i945.asl | 6 -
src/northbridge/intel/i945/acpi/igd.asl | 329 ++--------------
src/northbridge/intel/i945/chip.h | 3 +
src/northbridge/intel/i945/gma.c | 22 ++
src/northbridge/intel/nehalem/Kconfig | 1 +
src/northbridge/intel/nehalem/acpi/igd.asl | 415 ++------------------
src/northbridge/intel/nehalem/gma.c | 22 ++
src/northbridge/intel/sandybridge/Kconfig | 4 +
src/northbridge/intel/sandybridge/acpi/igd.asl | 411 ++------------------
src/northbridge/intel/sandybridge/gma.c | 22 ++
src/northbridge/intel/sch/Kconfig | 1 +
src/northbridge/intel/sch/acpi/igd.asl | 325 ++--------------
src/northbridge/intel/sch/acpi/sch.asl | 6 -
src/northbridge/intel/sch/chip.h | 30 ++
src/northbridge/intel/sch/gma.c | 24 ++
src/southbridge/intel/bd82x6x/lpc.c | 4 +
src/southbridge/intel/fsp_bd82x6x/lpc.c | 6 +
src/southbridge/intel/i82801gx/lpc.c | 7 +
src/southbridge/intel/i82801ix/lpc.c | 6 +
src/southbridge/intel/ibexpeak/lpc.c | 5 +
src/southbridge/intel/lynxpoint/lpc.c | 6 +
src/southbridge/intel/sch/lpc.c | 6 +
128 files changed, 896 insertions(+), 2961 deletions(-)
diff --git a/src/drivers/intel/gma/Kconfig b/src/drivers/intel/gma/Kconfig
index 6657224..112f262 100644
--- a/src/drivers/intel/gma/Kconfig
+++ b/src/drivers/intel/gma/Kconfig
@@ -36,3 +36,7 @@ config INTEL_EDID
config INTEL_INT15
bool
default n
+
+config INTEL_GMA_ACPI
+ bool
+ default n
diff --git a/src/drivers/intel/gma/Makefile.inc b/src/drivers/intel/gma/Makefile.inc
index d963df9..039d1d4 100644
--- a/src/drivers/intel/gma/Makefile.inc
+++ b/src/drivers/intel/gma/Makefile.inc
@@ -23,3 +23,4 @@ ramstage-$(CONFIG_INTEL_EDID) += edid.c vbt.c
ifeq ($(CONFIG_VGA_ROM_RUN),y)
ramstage-$(CONFIG_INTEL_INT15) += int15.c
endif
+ramstage-$(CONFIG_INTEL_GMA_ACPI) += acpi.c
\ No newline at end of file
diff --git a/src/drivers/intel/gma/acpi.c b/src/drivers/intel/gma/acpi.c
new file mode 100644
index 0000000..c3a9b8a
--- /dev/null
+++ b/src/drivers/intel/gma/acpi.c
@@ -0,0 +1,135 @@
+/*
+ * Copyright (C) 2014 Vladimir Serbinenko
+ * Subject to the GNU GPL v2, or (at your option) any later version.
+ */
+
+#include <arch/acpi.h>
+#include <arch/acpigen.h>
+#include <string.h>
+#include "i915.h"
+
+void
+drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info *conf)
+{
+ size_t i;
+ const char *names[] = { "UNK", "VGA", "TV", "DVI", "LCD" };
+ int counters[ARRAY_SIZE(names)];
+
+ memset(counters, 0, sizeof(counters));
+
+ acpigen_write_scope("\\_SB.PCI0.GFX0");
+
+ /*
+ Method (_DOD, 0)
+ {
+ Return (Package() {
+ 0x5a5a5a5a,
+ 0x5a5a5a5a,
+ 0x5a5a5a5a
+ })
+ }
+ */
+ acpigen_write_method("_DOD", 0);
+ acpigen_emit_byte(0xa4); /* ReturnOp. */
+ acpigen_write_package(conf->ndid);
+
+ for (i = 0; i < conf->ndid; i++) {
+ acpigen_write_dword (conf->did[i] | 0x80010000);
+ }
+ acpigen_pop_len(); /* End Package. */
+ acpigen_pop_len(); /* End Method. */
+
+ for (i = 0; i < conf->ndid; i++) {
+ char name[10];
+ char *ptr;
+ int kind;
+ kind = (conf->did[i] >> 8) & 0xf;
+ if (kind >= ARRAY_SIZE(names)) {
+ kind = 0;
+ }
+ strcpy(name, names[kind]);
+ for (ptr = name; *ptr; ptr++);
+ *ptr++ = counters[kind] + '0';
+ *ptr++ = '\0';
+ counters[kind]++;
+ acpigen_write_device(name);
+ /* Name (_ADR, 0x0410) */
+ acpigen_write_name_dword("_ADR", conf->did[i] & 0xffff);
+
+ /* ACPI brightness for LCD. */
+ if (kind == 4) {
+ /*
+ Method (_BCL, 0, NotSerialized)
+ {
+ Return (^^XBCL())
+ }
+ */
+ acpigen_write_method("_BCL", 0);
+ acpigen_emit_byte(0xa4); /* ReturnOp. */
+ acpigen_emit_namestring("^^XBCL");
+ acpigen_pop_len();
+
+ /*
+ Method (_BCM, 1, NotSerialized)
+ {
+ ^^XBCM(Arg0)
+ }
+ */
+ acpigen_write_method("_BCM", 1);
+ acpigen_emit_namestring("^^XBCM");
+ acpigen_emit_byte(0x68); /* Arg0Op. */
+ acpigen_pop_len();
+
+ /*
+ Method (_BQC, 0, NotSerialized)
+ {
+ Return (^^XBQC())
+ }
+ */
+ acpigen_write_method("_BQC", 0);
+ acpigen_emit_byte(0xa4); /* ReturnOp. */
+ acpigen_emit_namestring("^^XBQC");
+ acpigen_pop_len();
+ }
+
+ /*
+ Method(_DCS, 0)
+ {
+ Return (^^XDCS(<device number>))
+ }
+ */
+ acpigen_write_method("_DCS", 0);
+ acpigen_emit_byte(0xa4); /* ReturnOp. */
+ acpigen_emit_namestring("^^XDCS");
+ acpigen_write_byte(i);
+ acpigen_pop_len();
+
+ /*
+ Method(_DGS, 0)
+ {
+ Return (^^XDGS(<device number>))
+ }
+ */
+ acpigen_write_method("_DGS", 0);
+ acpigen_emit_byte(0xa4); /* ReturnOp. */
+ acpigen_emit_namestring("^^XDGS");
+ acpigen_write_byte(i);
+ acpigen_pop_len();
+
+ /*
+ Method(_DSS, 1)
+ {
+ ^^XDSS(0x5a, Arg0)
+ }
+ */
+ acpigen_write_method("_DSS", 0);
+ acpigen_emit_namestring("^^XDSS");
+ acpigen_write_byte(i);
+ acpigen_emit_byte(0x68); /* Arg0Op. */
+ acpigen_pop_len();
+
+ acpigen_pop_len();
+ }
+
+ acpigen_pop_len();
+}
diff --git a/src/drivers/intel/gma/i915.h b/src/drivers/intel/gma/i915.h
index 0d5b8af..c930a81 100644
--- a/src/drivers/intel/gma/i915.h
+++ b/src/drivers/intel/gma/i915.h
@@ -291,8 +291,15 @@ struct i915_gpu_controller_info
int lvds_dual_channel;
int link_frequency_270_mhz;
int lvds_num_lanes;
+ int ndid;
+ u32 did[5];
};
+void
+drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info *conf);
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void);
+
int i915lightup(unsigned int physbase, unsigned int mmio,
unsigned int gfx, unsigned int init_fb);
int panel_lightup(struct intel_dp *dp, unsigned int init_fb);
diff --git a/src/drivers/intel/gma/igd.asl b/src/drivers/intel/gma/igd.asl
new file mode 100644
index 0000000..31e8fec
--- /dev/null
+++ b/src/drivers/intel/gma/igd.asl
@@ -0,0 +1,113 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+ External(LCD0, DeviceObj)
+
+ Name (BRCT, 0)
+
+ Method(BRID, 1, NotSerialized)
+ {
+ Store (Match (BRIG, MEQ, Arg0, MTR, Zero, 2), Local0)
+ If (LEqual (Local0, Ones))
+ {
+ Return (Subtract(SizeOf(BRIG), One))
+ }
+ Return (Local0)
+ }
+
+ Method (XBCL, 0, NotSerialized)
+ {
+ Store (1, BRCT)
+ Return (BRIG)
+ }
+
+ /* Display Output Switching */
+ Method (_DOS, 1)
+ {
+ /* Windows 2000 and Windows XP call _DOS to enable/disable
+ * Display Output Switching during init and while a switch
+ * is already active
+ */
+ Store (And(Arg0, 7), DSEN)
+ }
+
+ /* Using Notify is the right way. But Windows doesn't handle
+ it well. So use both method in a way to avoid double action.
+ */
+ Method (DECB, 0, NotSerialized)
+ {
+ If (BRCT)
+ {
+ Notify (LCD0, 0x87)
+ } Else {
+ Store (BRID (XBQC ()), Local0)
+ If (LNotEqual (Local0, 2))
+ {
+ Decrement (Local0)
+ }
+ XBCM (DerefOf (Index (BRIG, Local0)))
+ }
+ }
+
+ Method (INCB, 0, NotSerialized)
+ {
+ If (BRCT)
+ {
+ Notify (LCD0, 0x86)
+ } Else {
+ Store (BRID (XBQC ()), Local0)
+ If (LNotEqual (Local0, Subtract(SizeOf(BRIG), One)))
+ {
+ Increment (Local0)
+ }
+ XBCM (DerefOf (Index (BRIG, Local0)))
+ }
+ }
+
+ /* Device Current Status */
+ Method(XDCS, 1)
+ {
+ TRAP(1)
+ If (And(CSTE, ShiftLeft (1, Arg0))) {
+ Return (0x1f)
+ }
+ Return(0x1d)
+ }
+
+ /* Query Device Graphics State */
+ Method(XDGS, 1)
+ {
+ If (And(NSTE, ShiftLeft (1, Arg0))) {
+ Return(1)
+ }
+ Return(0)
+ }
+
+ /* Device Set State */
+ Method(XDSS, 2)
+ {
+ /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
+ * display switch was completed
+ */
+ If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
+ Store (NSTE, CSTE)
+ }
+ }
diff --git a/src/mainboard/apple/macbook21/acpi/video.asl b/src/mainboard/apple/macbook21/acpi/video.asl
deleted file mode 100644
index c2f9dfb..0000000
--- a/src/mainboard/apple/macbook21/acpi/video.asl
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (c) 2011 Sven Schnelle <svens at stackframe.org>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-Device (DSPC)
-{
- Name (_ADR, 0x00020001)
- OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
- Field (DSPC, ByteAcc, NoLock, Preserve)
- {
- Offset (0xf4),
- BRTC, 8
- }
-
- Method(BRTD, 0, NotSerialized)
- {
- Store(BRTC, Local0)
- if (LGreater (Local0, 15))
- {
- Subtract(Local0, 16, Local0)
- Store(Local0, BRTC)
- }
- }
-
- Method(BRTU, 0, NotSerialized)
- {
- Store (BRTC, Local0)
- if (LLess(Local0, 0xff))
- {
- Add (Local0, 16, Local0)
- Store(Local0, BRTC)
- }
- }
-}
diff --git a/src/mainboard/apple/macbook21/acpi_tables.c b/src/mainboard/apple/macbook21/acpi_tables.c
index 48c6f89..f26ab7d 100644
--- a/src/mainboard/apple/macbook21/acpi_tables.c
+++ b/src/mainboard/apple/macbook21/acpi_tables.c
@@ -37,11 +37,4 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->cmap = 0x01;
gnvs->cmbp = 0x01;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default
index 0185e94..e0b992c 100644
--- a/src/mainboard/apple/macbook21/cmos.default
+++ b/src/mainboard/apple/macbook21/cmos.default
@@ -9,7 +9,6 @@ boot_default=0x40
cmos_defaults_loaded=Yes
lpt=Enable
volume=0x3
-tft_brightness=0xff
first_battery=Primary
bluetooth=Enable
wlan=Enable
diff --git a/src/mainboard/apple/macbook21/cmos.layout b/src/mainboard/apple/macbook21/cmos.layout
index 469371e..521a1e6 100644
--- a/src/mainboard/apple/macbook21/cmos.layout
+++ b/src/mainboard/apple/macbook21/cmos.layout
@@ -108,7 +108,6 @@ entries
1052 4 r 0 C1DRT1
1064 8 h 0 volume
-1072 8 h 0 tft_brightness
1080 1 e 9 first_battery
1081 1 e 1 bluetooth
1082 1 e 1 wwan
diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
index 822d7a3..dd27cb0 100644
--- a/src/mainboard/apple/macbook21/devicetree.cb
+++ b/src/mainboard/apple/macbook21/devicetree.cb
@@ -21,11 +21,14 @@
##
chip northbridge/intel/i945
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gpu_hotplug" = "0x00000220"
register "gpu_lvds_use_spread_spectrum_clock" = "1"
register "gpu_lvds_is_dual_channel" = "0"
- register "gpu_backlight" = "0x1280128"
+ register "gpu_backlight" = "0x1290128"
device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478
diff --git a/src/mainboard/getac/p470/acpi/ec.asl b/src/mainboard/getac/p470/acpi/ec.asl
index 1b1c157..23619bc 100644
--- a/src/mainboard/getac/p470/acpi/ec.asl
+++ b/src/mainboard/getac/p470/acpi/ec.asl
@@ -193,7 +193,7 @@ Device(EC0)
{
Store(0x3f, HOTK)
If(IGDS) {
- HKDS(10)
+ Notify (\_SB.PCI0.GFX0, 0x82)
} Else {
TRAP(0xE1)
}
diff --git a/src/mainboard/getac/p470/acpi/video.asl b/src/mainboard/getac/p470/acpi/video.asl
deleted file mode 100644
index 3536913..0000000
--- a/src/mainboard/getac/p470/acpi/video.asl
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
- // TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
- // TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
- // TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
- // TODO (no displays defined yet)
-}
diff --git a/src/mainboard/getac/p470/acpi_tables.c b/src/mainboard/getac/p470/acpi_tables.c
index 3e8abe5..df5e774 100644
--- a/src/mainboard/getac/p470/acpi_tables.c
+++ b/src/mainboard/getac/p470/acpi_tables.c
@@ -38,14 +38,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
/* Enable COM port(s) */
gnvs->cmap = 0x01;
gnvs->cmbp = 0x00;
-
- /* IGD Displays */
- gnvs->ndid = 2;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000410;
- gnvs->did[2] = 0x80000320;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
static long acpi_create_ecdt(acpi_ecdt_t * ecdt)
diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb
index 919e9e3..3d2b209 100644
--- a/src/mainboard/getac/p470/devicetree.cb
+++ b/src/mainboard/getac/p470/devicetree.cb
@@ -20,6 +20,9 @@
##
chip northbridge/intel/i945
+ # IGD Displays
+ register "gfx.ndid" = "2"
+ register "gfx.did" = "{ 0x80000100, 0x80000410, 0x80000320, 0x80000410, 0x00000005 }"
device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478
diff --git a/src/mainboard/google/bolt/acpi_tables.c b/src/mainboard/google/bolt/acpi_tables.c
index 3b851c4..9b3a23d 100644
--- a/src/mainboard/google/bolt/acpi_tables.c
+++ b/src/mainboard/google/bolt/acpi_tables.c
@@ -66,13 +66,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
/* TPM Present */
gnvs->tpmp = 1;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
#if CONFIG_CHROMEOS
gnvs->chromeos.vbt2 = google_ec_running_ro() ?
diff --git a/src/mainboard/google/bolt/devicetree.cb b/src/mainboard/google/bolt/devicetree.cb
index f514bb4..e5be428 100644
--- a/src/mainboard/google/bolt/devicetree.cb
+++ b/src/mainboard/google/bolt/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/haswell
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable eDP Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/butterfly/acpi_tables.c b/src/mainboard/google/butterfly/acpi_tables.c
index cabc052..1c45c22 100644
--- a/src/mainboard/google/butterfly/acpi_tables.c
+++ b/src/mainboard/google/butterfly/acpi_tables.c
@@ -54,13 +54,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
// TODO: MLR
// The firmware read/write status is a "virtual" switch and
diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb
index ed0d8d1..915b588 100644
--- a/src/mainboard/google/butterfly/devicetree.cb
+++ b/src/mainboard/google/butterfly/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/falco/acpi_tables.c b/src/mainboard/google/falco/acpi_tables.c
index 5849087..444d9e9 100644
--- a/src/mainboard/google/falco/acpi_tables.c
+++ b/src/mainboard/google/falco/acpi_tables.c
@@ -60,13 +60,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
/* TPM Present */
gnvs->tpmp = 1;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
#if CONFIG_CHROMEOS
gnvs->chromeos.vbt2 = google_ec_running_ro() ?
diff --git a/src/mainboard/google/falco/devicetree.cb b/src/mainboard/google/falco/devicetree.cb
index 428a060..eaf2064 100644
--- a/src/mainboard/google/falco/devicetree.cb
+++ b/src/mainboard/google/falco/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/haswell
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable eDP Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/link/acpi_tables.c b/src/mainboard/google/link/acpi_tables.c
index d1d4fcb..547717a 100644
--- a/src/mainboard/google/link/acpi_tables.c
+++ b/src/mainboard/google/link/acpi_tables.c
@@ -64,14 +64,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
- /* IGD Displays */
- gnvs->ndid = 1;
- gnvs->did[0] = 0x80000000;
- gnvs->did[1] = 0x80000000;
- gnvs->did[2] = 0x00000000;
- gnvs->did[3] = 0x00000000;
- gnvs->did[4] = 0x00000000;
-
#if CONFIG_CHROMEOS
gnvs->chromeos.vbt2 = google_ec_running_ro() ?
ACTIVE_ECFW_RO : ACTIVE_ECFW_RW;
diff --git a/src/mainboard/google/link/devicetree.cb b/src/mainboard/google/link/devicetree.cb
index 5333dfc..382a8c4 100644
--- a/src/mainboard/google/link/devicetree.cb
+++ b/src/mainboard/google/link/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "1"
+ register "gfx.did" = "{ 0x80000000, 0x80000000, 0x00000000, 0x00000000, 0x00000000 }"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/panther/acpi_tables.c b/src/mainboard/google/panther/acpi_tables.c
index 9340c5a..3954821 100644
--- a/src/mainboard/google/panther/acpi_tables.c
+++ b/src/mainboard/google/panther/acpi_tables.c
@@ -77,13 +77,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
/* TPM Present */
gnvs->tpmp = 1;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
#if CONFIG_CHROMEOS
// SuperIO is always RO
diff --git a/src/mainboard/google/panther/devicetree.cb b/src/mainboard/google/panther/devicetree.cb
index d37b622..79da543 100644
--- a/src/mainboard/google/panther/devicetree.cb
+++ b/src/mainboard/google/panther/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/haswell
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Disable eDP Hotplug
register "gpu_dp_d_hotplug" = "0x00"
diff --git a/src/mainboard/google/parrot/acpi_tables.c b/src/mainboard/google/parrot/acpi_tables.c
index 0041c98..3f5b719 100644
--- a/src/mainboard/google/parrot/acpi_tables.c
+++ b/src/mainboard/google/parrot/acpi_tables.c
@@ -55,13 +55,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
#if CONFIG_CHROMEOS
gnvs->chromeos.vbt2 = parrot_ec_running_ro() ?
diff --git a/src/mainboard/google/parrot/devicetree.cb b/src/mainboard/google/parrot/devicetree.cb
index a4baafd..034309f 100644
--- a/src/mainboard/google/parrot/devicetree.cb
+++ b/src/mainboard/google/parrot/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort B Hotplug with 6ms pulse
register "gpu_dp_b_hotplug" = "0x06"
diff --git a/src/mainboard/google/peppy/acpi_tables.c b/src/mainboard/google/peppy/acpi_tables.c
index 265fe65..369c7fb 100644
--- a/src/mainboard/google/peppy/acpi_tables.c
+++ b/src/mainboard/google/peppy/acpi_tables.c
@@ -69,13 +69,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
/* TPM Present */
gnvs->tpmp = 1;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
#if CONFIG_CHROMEOS
gnvs->chromeos.vbt2 = google_ec_running_ro() ?
diff --git a/src/mainboard/google/peppy/devicetree.cb b/src/mainboard/google/peppy/devicetree.cb
index 4c0d02d..4718435 100644
--- a/src/mainboard/google/peppy/devicetree.cb
+++ b/src/mainboard/google/peppy/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/haswell
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable eDP Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/samus/acpi_tables.c b/src/mainboard/google/samus/acpi_tables.c
index 1978494..af05d5c 100644
--- a/src/mainboard/google/samus/acpi_tables.c
+++ b/src/mainboard/google/samus/acpi_tables.c
@@ -60,13 +60,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
/* TPM Present */
gnvs->tpmp = 1;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
#if CONFIG_CHROMEOS
gnvs->chromeos.vbt2 = google_ec_running_ro() ?
diff --git a/src/mainboard/google/samus/devicetree.cb b/src/mainboard/google/samus/devicetree.cb
index 12a21ec..06a7421 100644
--- a/src/mainboard/google/samus/devicetree.cb
+++ b/src/mainboard/google/samus/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/haswell
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable eDP Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/slippy/acpi_tables.c b/src/mainboard/google/slippy/acpi_tables.c
index 3b851c4..9b3a23d 100644
--- a/src/mainboard/google/slippy/acpi_tables.c
+++ b/src/mainboard/google/slippy/acpi_tables.c
@@ -66,13 +66,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
/* TPM Present */
gnvs->tpmp = 1;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
#if CONFIG_CHROMEOS
gnvs->chromeos.vbt2 = google_ec_running_ro() ?
diff --git a/src/mainboard/google/slippy/devicetree.cb b/src/mainboard/google/slippy/devicetree.cb
index 06ca93c..ecaa43e 100644
--- a/src/mainboard/google/slippy/devicetree.cb
+++ b/src/mainboard/google/slippy/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/haswell
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable eDP Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/stout/acpi_tables.c b/src/mainboard/google/stout/acpi_tables.c
index 23c47f9..9e5c6a1 100644
--- a/src/mainboard/google/stout/acpi_tables.c
+++ b/src/mainboard/google/stout/acpi_tables.c
@@ -58,13 +58,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
#if CONFIG_CHROMEOS
gnvs->chromeos.vbt2 = get_recovery_mode_switch() ?
diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb
index 4ac89f6..cd33cd7 100644
--- a/src/mainboard/google/stout/devicetree.cb
+++ b/src/mainboard/google/stout/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/ibase/mb899/acpi/video.asl b/src/mainboard/ibase/mb899/acpi/video.asl
deleted file mode 100644
index cca1a3b..0000000
--- a/src/mainboard/ibase/mb899/acpi/video.asl
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
- // TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
- // TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
- // TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
- // TODO (no displays defined yet)
-}
diff --git a/src/mainboard/ibase/mb899/acpi_tables.c b/src/mainboard/ibase/mb899/acpi_tables.c
index 54ee4f6..b032fe7 100644
--- a/src/mainboard/ibase/mb899/acpi_tables.c
+++ b/src/mainboard/ibase/mb899/acpi_tables.c
@@ -36,11 +36,4 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->cmap = 0x01;
gnvs->cmbp = 0x01;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
diff --git a/src/mainboard/ibase/mb899/devicetree.cb b/src/mainboard/ibase/mb899/devicetree.cb
index ccf6405..b59a295 100644
--- a/src/mainboard/ibase/mb899/devicetree.cb
+++ b/src/mainboard/ibase/mb899/devicetree.cb
@@ -1,4 +1,8 @@
chip northbridge/intel/i945
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
+
device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478
device lapic 0 on end
diff --git a/src/mainboard/intel/baskingridge/acpi_tables.c b/src/mainboard/intel/baskingridge/acpi_tables.c
index d5a5f03..d3034a9 100644
--- a/src/mainboard/intel/baskingridge/acpi_tables.c
+++ b/src/mainboard/intel/baskingridge/acpi_tables.c
@@ -79,13 +79,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
/* TPM Present */
gnvs->tpmp = 1;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
#if CONFIG_CHROMEOS
/* Emerald Lake has no EC (?) */
diff --git a/src/mainboard/intel/baskingridge/devicetree.cb b/src/mainboard/intel/baskingridge/devicetree.cb
index a173aaa..5576590 100644
--- a/src/mainboard/intel/baskingridge/devicetree.cb
+++ b/src/mainboard/intel/baskingridge/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/haswell
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort 1 Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/intel/cougar_canyon2/acpi_tables.c b/src/mainboard/intel/cougar_canyon2/acpi_tables.c
index dca35b5..b89c865 100644
--- a/src/mainboard/intel/cougar_canyon2/acpi_tables.c
+++ b/src/mainboard/intel/cougar_canyon2/acpi_tables.c
@@ -62,16 +62,7 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u0 = 1;
gnvs->s5u1 = 1;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
-
acpi_update_thermal_table(gnvs);
-
}
unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/intel/cougar_canyon2/devicetree.cb b/src/mainboard/intel/cougar_canyon2/devicetree.cb
index c386853..d7c6aab 100644
--- a/src/mainboard/intel/cougar_canyon2/devicetree.cb
+++ b/src/mainboard/intel/cougar_canyon2/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/fsp_sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort 1 Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/intel/d945gclf/acpi/video.asl b/src/mainboard/intel/d945gclf/acpi/video.asl
deleted file mode 100644
index 7baf995..0000000
--- a/src/mainboard/intel/d945gclf/acpi/video.asl
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
- // TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
- // TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
- // TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
- // TODO (no displays defined yet)
-}
diff --git a/src/mainboard/intel/emeraldlake2/acpi_tables.c b/src/mainboard/intel/emeraldlake2/acpi_tables.c
index f17e1f4..2953e2b 100644
--- a/src/mainboard/intel/emeraldlake2/acpi_tables.c
+++ b/src/mainboard/intel/emeraldlake2/acpi_tables.c
@@ -78,13 +78,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u0 = 1;
gnvs->s5u1 = 1;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
acpi_update_thermal_table(gnvs);
diff --git a/src/mainboard/intel/emeraldlake2/devicetree.cb b/src/mainboard/intel/emeraldlake2/devicetree.cb
index e5a8ea0..0b3e788 100644
--- a/src/mainboard/intel/emeraldlake2/devicetree.cb
+++ b/src/mainboard/intel/emeraldlake2/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort 1 Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/intel/wtm2/acpi_tables.c b/src/mainboard/intel/wtm2/acpi_tables.c
index 20814ab..af02b76 100644
--- a/src/mainboard/intel/wtm2/acpi_tables.c
+++ b/src/mainboard/intel/wtm2/acpi_tables.c
@@ -76,13 +76,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
/* TPM Present */
gnvs->tpmp = 1;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
#if CONFIG_CHROMEOS
/* Emerald Lake has no EC (?) */
diff --git a/src/mainboard/intel/wtm2/devicetree.cb b/src/mainboard/intel/wtm2/devicetree.cb
index 2790cb9..52945d1 100644
--- a/src/mainboard/intel/wtm2/devicetree.cb
+++ b/src/mainboard/intel/wtm2/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/haswell
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort 1 Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/iwave/iWRainbowG6/acpi/video.asl b/src/mainboard/iwave/iWRainbowG6/acpi/video.asl
deleted file mode 100644
index 3536913..0000000
--- a/src/mainboard/iwave/iWRainbowG6/acpi/video.asl
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
- // TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
- // TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
- // TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
- // TODO (no displays defined yet)
-}
diff --git a/src/mainboard/iwave/iWRainbowG6/acpi_tables.c b/src/mainboard/iwave/iWRainbowG6/acpi_tables.c
index 4dcda79..eb4ab22 100644
--- a/src/mainboard/iwave/iWRainbowG6/acpi_tables.c
+++ b/src/mainboard/iwave/iWRainbowG6/acpi_tables.c
@@ -40,14 +40,6 @@ void acpi_create_gnvs(global_nvs_t * gnvs)
/* Enable both COM ports. */
gnvs->cmap = 0x01;
gnvs->cmbp = 0x01;
-
- /* IGD Displays. */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/iwave/iWRainbowG6/devicetree.cb b/src/mainboard/iwave/iWRainbowG6/devicetree.cb
index 84cfc4b..29e9e5e 100644
--- a/src/mainboard/iwave/iWRainbowG6/devicetree.cb
+++ b/src/mainboard/iwave/iWRainbowG6/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sch
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
device cpu_cluster 0 on
chip cpu/intel/socket_441
diff --git a/src/mainboard/kontron/986lcd-m/acpi/video.asl b/src/mainboard/kontron/986lcd-m/acpi/video.asl
deleted file mode 100644
index cca1a3b..0000000
--- a/src/mainboard/kontron/986lcd-m/acpi/video.asl
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
- // TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
- // TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
- // TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
- // TODO (no displays defined yet)
-}
diff --git a/src/mainboard/kontron/986lcd-m/acpi_tables.c b/src/mainboard/kontron/986lcd-m/acpi_tables.c
index 54ee4f6..b032fe7 100644
--- a/src/mainboard/kontron/986lcd-m/acpi_tables.c
+++ b/src/mainboard/kontron/986lcd-m/acpi_tables.c
@@ -36,11 +36,4 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->cmap = 0x01;
gnvs->cmbp = 0x01;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb
index 1fdd4e5..d94530d 100644
--- a/src/mainboard/kontron/986lcd-m/devicetree.cb
+++ b/src/mainboard/kontron/986lcd-m/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/i945
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478
diff --git a/src/mainboard/kontron/ktqm77/acpi_tables.c b/src/mainboard/kontron/ktqm77/acpi_tables.c
index d2d70e9..b434d5f 100644
--- a/src/mainboard/kontron/ktqm77/acpi_tables.c
+++ b/src/mainboard/kontron/ktqm77/acpi_tables.c
@@ -52,14 +52,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
- /* IGD Displays */
- gnvs->ndid = 0;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
-
acpi_update_thermal_table(gnvs);
}
diff --git a/src/mainboard/kontron/ktqm77/devicetree.cb b/src/mainboard/kontron/ktqm77/devicetree.cb
index 855fd5c..24306ef 100644
--- a/src/mainboard/kontron/ktqm77/devicetree.cb
+++ b/src/mainboard/kontron/ktqm77/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989
diff --git a/src/mainboard/lenovo/t520/acpi_tables.c b/src/mainboard/lenovo/t520/acpi_tables.c
index 15b9d9a..862a5e5 100644
--- a/src/mainboard/lenovo/t520/acpi_tables.c
+++ b/src/mainboard/lenovo/t520/acpi_tables.c
@@ -51,13 +51,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
// the lid is open by default.
gnvs->lids = 1;
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb
index d2a4d6b..e08f213 100644
--- a/src/mainboard/lenovo/t520/devicetree.cb
+++ b/src/mainboard/lenovo/t520/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl
index 85e2b4f..e98afe0 100644
--- a/src/mainboard/lenovo/t520/dsdt.asl
+++ b/src/mainboard/lenovo/t520/dsdt.asl
@@ -20,11 +20,10 @@
*/
#define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
#define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
DefinitionBlock(
"dsdt.aml",
diff --git a/src/mainboard/lenovo/t530/acpi_tables.c b/src/mainboard/lenovo/t530/acpi_tables.c
index 15b9d9a..862a5e5 100644
--- a/src/mainboard/lenovo/t530/acpi_tables.c
+++ b/src/mainboard/lenovo/t530/acpi_tables.c
@@ -51,13 +51,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
// the lid is open by default.
gnvs->lids = 1;
diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb
index c44f927..f84b70f 100644
--- a/src/mainboard/lenovo/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl
index 85e2b4f..e98afe0 100644
--- a/src/mainboard/lenovo/t530/dsdt.asl
+++ b/src/mainboard/lenovo/t530/dsdt.asl
@@ -20,11 +20,10 @@
*/
#define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
#define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
DefinitionBlock(
"dsdt.aml",
diff --git a/src/mainboard/lenovo/t60/acpi/video.asl b/src/mainboard/lenovo/t60/acpi/video.asl
index 9a458e9..9dea2b0 100644
--- a/src/mainboard/lenovo/t60/acpi/video.asl
+++ b/src/mainboard/lenovo/t60/acpi/video.asl
@@ -21,35 +21,17 @@
#include "smi.h"
-Device (DSPC)
+Scope (\)
{
- Name (_ADR, 0x00020001)
- OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
- Field (DSPC, ByteAcc, NoLock, Preserve)
- {
- Offset (0xf4),
- BRTC, 8
- }
-
Method(BRTD, 0, NotSerialized)
{
Trap(SMI_BRIGHTNESS_DOWN)
- Store(BRTC, Local0)
- if (LGreater (Local0, 15))
- {
- Subtract(Local0, 16, Local0)
- Store(Local0, BRTC)
- }
+ \_SB.PCI0.GFX0.DECB()
}
Method(BRTU, 0, NotSerialized)
{
Trap(SMI_BRIGHTNESS_UP)
- Store (BRTC, Local0)
- if (LLess(Local0, 0xff))
- {
- Add (Local0, 16, Local0)
- Store(Local0, BRTC)
- }
+ \_SB.PCI0.GFX0.INCB()
}
}
diff --git a/src/mainboard/lenovo/t60/acpi_tables.c b/src/mainboard/lenovo/t60/acpi_tables.c
index 48c6f89..f26ab7d 100644
--- a/src/mainboard/lenovo/t60/acpi_tables.c
+++ b/src/mainboard/lenovo/t60/acpi_tables.c
@@ -37,11 +37,4 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->cmap = 0x01;
gnvs->cmbp = 0x01;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb
index 1d5f549..76ec6e0 100644
--- a/src/mainboard/lenovo/t60/devicetree.cb
+++ b/src/mainboard/lenovo/t60/devicetree.cb
@@ -21,6 +21,9 @@
##
chip northbridge/intel/i945
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478
diff --git a/src/mainboard/lenovo/t60/dsdt.asl b/src/mainboard/lenovo/t60/dsdt.asl
index 7807687..71ba71f 100644
--- a/src/mainboard/lenovo/t60/dsdt.asl
+++ b/src/mainboard/lenovo/t60/dsdt.asl
@@ -20,8 +20,8 @@
*/
#define THINKPAD_EC_GPE 28
-#define BRIGHTNESS_UP \DSPC.BRTU
-#define BRIGHTNESS_DOWN \DSPC.BRTD
+#define BRIGHTNESS_UP \BRTU
+#define BRIGHTNESS_DOWN \BRTD
#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
DefinitionBlock(
@@ -46,6 +46,12 @@ DefinitionBlock(
// mainboard specific devices
#include "acpi/mainboard.asl"
+ Scope (\)
+ {
+ // backlight control, display switching, lid
+ #include "acpi/video.asl"
+ }
+
#include <cpu/intel/model_6dx/acpi/cpu.asl>
Scope (\_SB) {
diff --git a/src/mainboard/lenovo/x200/acpi_tables.c b/src/mainboard/lenovo/x200/acpi_tables.c
index 77491dc..ebdfe8f 100644
--- a/src/mainboard/lenovo/x200/acpi_tables.c
+++ b/src/mainboard/lenovo/x200/acpi_tables.c
@@ -41,13 +41,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->cmap = 0x01;
gnvs->cmbp = 0x01;
- /* IGD Displays */
- gnvs->ndid = 0; /* Will use default of 0x00000400. */
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb
index acc6c3a..30a97a7 100644
--- a/src/mainboard/lenovo/x200/devicetree.cb
+++ b/src/mainboard/lenovo/x200/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/gm45
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx.use_spread_spectrum_clock" = "1"
register "gfx.lvds_dual_channel" = "0"
diff --git a/src/mainboard/lenovo/x200/dsdt.asl b/src/mainboard/lenovo/x200/dsdt.asl
index 0409e66..ac40bcc 100644
--- a/src/mainboard/lenovo/x200/dsdt.asl
+++ b/src/mainboard/lenovo/x200/dsdt.asl
@@ -20,8 +20,8 @@
*/
#define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
#define DISPLAY_DEVICE_2_IS_LCD_SCREEN 1
diff --git a/src/mainboard/lenovo/x201/acpi_tables.c b/src/mainboard/lenovo/x201/acpi_tables.c
index 85eabc7..bee0e06 100644
--- a/src/mainboard/lenovo/x201/acpi_tables.c
+++ b/src/mainboard/lenovo/x201/acpi_tables.c
@@ -39,13 +39,6 @@ void acpi_create_gnvs(global_nvs_t * gnvs)
gnvs->mpen = 1; /* Enable Multi Processing */
gnvs->pcnt = dev_count_cpu();
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
unsigned long acpi_fill_slit(unsigned long current)
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index 117c25c..78045a6 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -21,6 +21,9 @@
##
chip northbridge/intel/nehalem
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort Hotplug with 6ms pulse
diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl
index 5265a91..f7ec349c 100644
--- a/src/mainboard/lenovo/x201/dsdt.asl
+++ b/src/mainboard/lenovo/x201/dsdt.asl
@@ -20,11 +20,10 @@
*/
#define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
#define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
DefinitionBlock(
"dsdt.aml",
diff --git a/src/mainboard/lenovo/x220/acpi_tables.c b/src/mainboard/lenovo/x220/acpi_tables.c
index 15b9d9a..eadc44b 100644
--- a/src/mainboard/lenovo/x220/acpi_tables.c
+++ b/src/mainboard/lenovo/x220/acpi_tables.c
@@ -52,12 +52,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u1 = 0;
/* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
// the lid is open by default.
gnvs->lids = 1;
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb
index 982e30b..fc96c1d 100644
--- a/src/mainboard/lenovo/x220/devicetree.cb
+++ b/src/mainboard/lenovo/x220/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl
index 85e2b4f..e98afe0 100644
--- a/src/mainboard/lenovo/x220/dsdt.asl
+++ b/src/mainboard/lenovo/x220/dsdt.asl
@@ -20,11 +20,10 @@
*/
#define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
#define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
DefinitionBlock(
"dsdt.aml",
diff --git a/src/mainboard/lenovo/x230/acpi_tables.c b/src/mainboard/lenovo/x230/acpi_tables.c
index 15b9d9a..eadc44b 100644
--- a/src/mainboard/lenovo/x230/acpi_tables.c
+++ b/src/mainboard/lenovo/x230/acpi_tables.c
@@ -52,12 +52,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u1 = 0;
/* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
// the lid is open by default.
gnvs->lids = 1;
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb
index 5130410..3624bea 100644
--- a/src/mainboard/lenovo/x230/devicetree.cb
+++ b/src/mainboard/lenovo/x230/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl
index 85e2b4f..e98afe0 100644
--- a/src/mainboard/lenovo/x230/dsdt.asl
+++ b/src/mainboard/lenovo/x230/dsdt.asl
@@ -20,11 +20,10 @@
*/
#define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
#define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
DefinitionBlock(
"dsdt.aml",
diff --git a/src/mainboard/lenovo/x60/acpi/video.asl b/src/mainboard/lenovo/x60/acpi/video.asl
deleted file mode 100644
index b38d82b..0000000
--- a/src/mainboard/lenovo/x60/acpi/video.asl
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (c) 2011 Sven Schnelle <svens at stackframe.org>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-#include "smi.h"
-
-Device (DSPC)
-{
- Name (_ADR, 0x00020001)
- OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
- Field (DSPC, ByteAcc, NoLock, Preserve)
- {
- Offset (0xf4),
- BRTC, 8
- }
-
- Method(BRTD, 0, NotSerialized)
- {
- Store(BRTC, Local0)
- if (LGreater (Local0, 15))
- {
- Subtract(Local0, 16, Local0)
- Store(Local0, BRTC)
- Trap(SMI_SAVE_CMOS)
- }
- }
-
- Method(BRTU, 0, NotSerialized)
- {
- Store (BRTC, Local0)
- if (LLess(Local0, 0xff))
- {
- Add (Local0, 16, Local0)
- Store(Local0, BRTC)
- Trap(SMI_SAVE_CMOS)
- }
- }
-}
diff --git a/src/mainboard/lenovo/x60/acpi_tables.c b/src/mainboard/lenovo/x60/acpi_tables.c
index 48c6f89..f26ab7d 100644
--- a/src/mainboard/lenovo/x60/acpi_tables.c
+++ b/src/mainboard/lenovo/x60/acpi_tables.c
@@ -37,11 +37,4 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->cmap = 0x01;
gnvs->cmbp = 0x01;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb
index 5cf6ccf..25073bf 100644
--- a/src/mainboard/lenovo/x60/devicetree.cb
+++ b/src/mainboard/lenovo/x60/devicetree.cb
@@ -21,6 +21,9 @@
##
chip northbridge/intel/i945
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gpu_hotplug" = "0x00000220"
register "gpu_lvds_use_spread_spectrum_clock" = "1"
diff --git a/src/mainboard/lenovo/x60/dsdt.asl b/src/mainboard/lenovo/x60/dsdt.asl
index 7807687..d8990ef 100644
--- a/src/mainboard/lenovo/x60/dsdt.asl
+++ b/src/mainboard/lenovo/x60/dsdt.asl
@@ -19,9 +19,11 @@
* MA 02110-1301 USA
*/
+#include "smi.h"
+
#define THINKPAD_EC_GPE 28
-#define BRIGHTNESS_UP \DSPC.BRTU
-#define BRIGHTNESS_DOWN \DSPC.BRTD
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
DefinitionBlock(
diff --git a/src/mainboard/packardbell/ms2290/acpi/ec.asl b/src/mainboard/packardbell/ms2290/acpi/ec.asl
index 3735f20..e53c367 100644
--- a/src/mainboard/packardbell/ms2290/acpi/ec.asl
+++ b/src/mainboard/packardbell/ms2290/acpi/ec.asl
@@ -122,12 +122,12 @@ Device(EC)
/* Decrease brightness. */
Method(_Q1D, 0, NotSerialized)
{
- \_SB.PCI0.GFX0.LCD0.DECB()
+ \_SB.PCI0.GFX0.DECB()
}
/* Increase brightness. */
Method(_Q1C, 0, NotSerialized)
{
- \_SB.PCI0.GFX0.LCD0.INCB()
+ \_SB.PCI0.GFX0.INCB()
}
#include "battery.asl"
diff --git a/src/mainboard/packardbell/ms2290/acpi_tables.c b/src/mainboard/packardbell/ms2290/acpi_tables.c
index 85eabc7..bee0e06 100644
--- a/src/mainboard/packardbell/ms2290/acpi_tables.c
+++ b/src/mainboard/packardbell/ms2290/acpi_tables.c
@@ -39,13 +39,6 @@ void acpi_create_gnvs(global_nvs_t * gnvs)
gnvs->mpen = 1; /* Enable Multi Processing */
gnvs->pcnt = dev_count_cpu();
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
unsigned long acpi_fill_slit(unsigned long current)
diff --git a/src/mainboard/packardbell/ms2290/devicetree.cb b/src/mainboard/packardbell/ms2290/devicetree.cb
index 2f4bce1..ae2c5ed 100644
--- a/src/mainboard/packardbell/ms2290/devicetree.cb
+++ b/src/mainboard/packardbell/ms2290/devicetree.cb
@@ -21,6 +21,9 @@
##
chip northbridge/intel/nehalem
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gpu_dp_b_hotplug" = "0x04"
register "gpu_dp_c_hotplug" = "0x04"
diff --git a/src/mainboard/packardbell/ms2290/dsdt.asl b/src/mainboard/packardbell/ms2290/dsdt.asl
index f0eb8ec..f9c0112 100644
--- a/src/mainboard/packardbell/ms2290/dsdt.asl
+++ b/src/mainboard/packardbell/ms2290/dsdt.asl
@@ -19,8 +19,6 @@
* MA 02110-1301 USA
*/
-#define HAVE_LCD_SCREEN 1
-
DefinitionBlock(
"dsdt.aml",
"DSDT",
diff --git a/src/mainboard/roda/rk886ex/acpi/ec.asl b/src/mainboard/roda/rk886ex/acpi/ec.asl
index d174e98..f3b6021 100644
--- a/src/mainboard/roda/rk886ex/acpi/ec.asl
+++ b/src/mainboard/roda/rk886ex/acpi/ec.asl
@@ -98,8 +98,8 @@ Device(EC0)
Method (_Q12, 0)
{
Store("_Q12: Fn-F9 (Display Switch) pressed", Debug)
+ Notify (\_SB.PCI0.GFX0, 0x82)
// Store(1, TLST)
- // HKDS(10)
}
Method (_Q30, 0)
diff --git a/src/mainboard/roda/rk886ex/acpi/video.asl b/src/mainboard/roda/rk886ex/acpi/video.asl
deleted file mode 100644
index 3536913..0000000
--- a/src/mainboard/roda/rk886ex/acpi/video.asl
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
- // TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
- // TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
- // TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
- // TODO (no displays defined yet)
-}
diff --git a/src/mainboard/roda/rk886ex/acpi_tables.c b/src/mainboard/roda/rk886ex/acpi_tables.c
index 48c6f89..f26ab7d 100644
--- a/src/mainboard/roda/rk886ex/acpi_tables.c
+++ b/src/mainboard/roda/rk886ex/acpi_tables.c
@@ -37,11 +37,4 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->cmap = 0x01;
gnvs->cmbp = 0x01;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb
index 8e4a665..1c59b2a 100644
--- a/src/mainboard/roda/rk886ex/devicetree.cb
+++ b/src/mainboard/roda/rk886ex/devicetree.cb
@@ -20,6 +20,9 @@
##
chip northbridge/intel/i945
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478
diff --git a/src/mainboard/roda/rk9/acpi_tables.c b/src/mainboard/roda/rk9/acpi_tables.c
index 77491dc..ebdfe8f 100644
--- a/src/mainboard/roda/rk9/acpi_tables.c
+++ b/src/mainboard/roda/rk9/acpi_tables.c
@@ -41,13 +41,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->cmap = 0x01;
gnvs->cmbp = 0x01;
- /* IGD Displays */
- gnvs->ndid = 0; /* Will use default of 0x00000400. */
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
}
unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb
index deece86..84ba59a 100644
--- a/src/mainboard/roda/rk9/devicetree.cb
+++ b/src/mainboard/roda/rk9/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/gm45
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
device cpu_cluster 0 on
chip cpu/intel/socket_BGA956
device lapic 0 on end
diff --git a/src/mainboard/samsung/lumpy/acpi_tables.c b/src/mainboard/samsung/lumpy/acpi_tables.c
index 6d8517c..d115053 100644
--- a/src/mainboard/samsung/lumpy/acpi_tables.c
+++ b/src/mainboard/samsung/lumpy/acpi_tables.c
@@ -80,13 +80,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
acpi_update_thermal_table(gnvs);
diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb
index 9b0fc40..ceac051 100644
--- a/src/mainboard/samsung/lumpy/devicetree.cb
+++ b/src/mainboard/samsung/lumpy/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/samsung/stumpy/acpi_tables.c b/src/mainboard/samsung/stumpy/acpi_tables.c
index dc2197a..9dc24cc 100644
--- a/src/mainboard/samsung/stumpy/acpi_tables.c
+++ b/src/mainboard/samsung/stumpy/acpi_tables.c
@@ -79,13 +79,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->s5u0 = 1;
gnvs->s5u1 = 1;
- /* IGD Displays */
- gnvs->ndid = 3;
- gnvs->did[0] = 0x80000100;
- gnvs->did[1] = 0x80000240;
- gnvs->did[2] = 0x80000410;
- gnvs->did[3] = 0x80000410;
- gnvs->did[4] = 0x00000005;
acpi_update_thermal_table(gnvs);
diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb
index 60b112b..df91a72 100644
--- a/src/mainboard/samsung/stumpy/devicetree.cb
+++ b/src/mainboard/samsung/stumpy/devicetree.cb
@@ -1,4 +1,7 @@
chip northbridge/intel/sandybridge
+ # IGD Displays
+ register "gfx.ndid" = "3"
+ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
# Enable DisplayPort 1 Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/northbridge/intel/fsp_sandybridge/Kconfig b/src/northbridge/intel/fsp_sandybridge/Kconfig
index 4eb5b8e..44ec95d 100644
--- a/src/northbridge/intel/fsp_sandybridge/Kconfig
+++ b/src/northbridge/intel/fsp_sandybridge/Kconfig
@@ -22,11 +22,13 @@ config NORTHBRIDGE_INTEL_FSP_SANDYBRIDGE
bool
select CPU_INTEL_FSP_MODEL_206AX
select PER_DEVICE_ACPI_TABLES
+ select INTEL_GMA_ACPI
config NORTHBRIDGE_INTEL_FSP_IVYBRIDGE
bool
select CPU_INTEL_FSP_MODEL_306AX
select PER_DEVICE_ACPI_TABLES
+ select INTEL_GMA_ACPI
if NORTHBRIDGE_INTEL_FSP_IVYBRIDGE || NORTHBRIDGE_INTEL_FSP_SANDYBRIDGE
diff --git a/src/northbridge/intel/fsp_sandybridge/acpi/igd.asl b/src/northbridge/intel/fsp_sandybridge/acpi/igd.asl
index 9399554..15a7df2 100644
--- a/src/northbridge/intel/fsp_sandybridge/acpi/igd.asl
+++ b/src/northbridge/intel/fsp_sandybridge/acpi/igd.asl
@@ -23,301 +23,57 @@ Device (GFX0)
{
Name (_ADR, 0x00020000)
- /* Display Output Switching */
- Method (_DOS, 1)
+ OperationRegion (GFXC, PCI_Config, 0x00, 0x0100)
+ Field (GFXC, DWordAcc, NoLock, Preserve)
{
- /* Windows 2000 and Windows XP call _DOS to enable/disable
- * Display Output Switching during init and while a switch
- * is already active
- */
- Store (And(Arg0, 7), DSEN)
+ Offset (0x10),
+ BAR0, 64
}
- /* We try to support as many i945 systems as possible,
- * so keep the number of DIDs flexible.
- */
- Method (_DOD, 0)
+ OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000)
+ Field (GFRG, DWordAcc, NoLock, Preserve)
{
- If (LEqual(NDID, 1)) {
- Name(DOD1, Package() {
- 0xffffffff
- })
- Store (Or(0x00010000, DID1), Index(DOD1, 0))
- Return(DOD1)
- }
-
- If (LEqual(NDID, 2)) {
- Name(DOD2, Package() {
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID2), Index(DOD2, 0))
- Store (Or(0x00010000, DID2), Index(DOD2, 1))
- Return(DOD2)
- }
-
- If (LEqual(NDID, 3)) {
- Name(DOD3, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID3), Index(DOD3, 0))
- Store (Or(0x00010000, DID3), Index(DOD3, 1))
- Store (Or(0x00010000, DID3), Index(DOD3, 2))
- Return(DOD3)
- }
-
- If (LEqual(NDID, 4)) {
- Name(DOD4, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID4), Index(DOD4, 0))
- Store (Or(0x00010000, DID4), Index(DOD4, 1))
- Store (Or(0x00010000, DID4), Index(DOD4, 2))
- Store (Or(0x00010000, DID4), Index(DOD4, 3))
- Return(DOD4)
- }
-
- If (LGreater(NDID, 4)) {
- Name(DOD5, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID5), Index(DOD5, 0))
- Store (Or(0x00010000, DID5), Index(DOD5, 1))
- Store (Or(0x00010000, DID5), Index(DOD5, 2))
- Store (Or(0x00010000, DID5), Index(DOD5, 3))
- Store (Or(0x00010000, DID5), Index(DOD5, 4))
- Return(DOD5)
- }
-
- /* Some error happened, but we have to return something */
- Return (Package() {0x00000400})
- }
-
- Device(DD01)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID1, 0)) {
- Return (1)
- } Else {
- Return (And(0xffff, DID1))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 1)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 1)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
- Device(DD02)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID2, 0)) {
- Return (2)
- } Else {
- Return (And(0xffff, DID2))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 2)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 2)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Offset (0x48254),
+ BCLV, 16,
+ Offset (0xc8250),
+ CR1, 32,
+ CR2, 32
}
-
- Device(DD03)
+ Name (BRIG, Package (0x12)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID3, 0)) {
- Return (3)
- } Else {
- Return (And(0xffff, DID3))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 4)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-
- Device(DD04)
+ 0x61,
+ 0x61,
+ 0x2,
+ 0x4,
+ 0x5,
+ 0x7,
+ 0x9,
+ 0xb,
+ 0xd,
+ 0x11,
+ 0x14,
+ 0x17,
+ 0x1c,
+ 0x20,
+ 0x27,
+ 0x31,
+ 0x41,
+ 0x61,
+ })
+
+ Method (XBCM, 1, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID4, 0)) {
- Return (4)
- } Else {
- Return (And(0xffff, DID4))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 8)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Store (ShiftLeft (Arg0, 4), BCLV)
+ Store (0x80000000, CR1)
+ Store (0x061a061a, CR2)
}
-
- Device(DD05)
+ Method (XBQC, 0, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID5, 0)) {
- Return (5)
- } Else {
- Return (And(0xffff, DID5))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 16)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Store (BCLV, Local0)
+ ShiftRight (Local0, 4, Local0)
+ Return (Local0)
}
-
+#include <drivers/intel/gma/igd.asl>
}
diff --git a/src/northbridge/intel/fsp_sandybridge/chip.h b/src/northbridge/intel/fsp_sandybridge/chip.h
index 9b5f605..656d0f3 100644
--- a/src/northbridge/intel/fsp_sandybridge/chip.h
+++ b/src/northbridge/intel/fsp_sandybridge/chip.h
@@ -17,6 +17,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <drivers/intel/gma/i915.h>
+
/*
* Digital Port Hotplug Enable:
* 0x04 = Enabled, 2ms short pulse
@@ -38,4 +40,6 @@ struct northbridge_intel_fsp_sandybridge_config {
u32 gpu_cpu_backlight; /* CPU Backlight PWM value */
u32 gpu_pch_backlight; /* PCH Backlight PWM value */
+
+ struct i915_gpu_controller_info gfx;
};
diff --git a/src/northbridge/intel/fsp_sandybridge/gma.c b/src/northbridge/intel/fsp_sandybridge/gma.c
index d578d56..64b34b5 100644
--- a/src/northbridge/intel/fsp_sandybridge/gma.c
+++ b/src/northbridge/intel/fsp_sandybridge/gma.c
@@ -63,6 +63,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+ device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+ if (!dev) {
+ return NULL;
+ }
+ struct northbridge_intel_fsp_sandybridge_config *chip = dev->chip_info;
+ return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+ if (!gfx) {
+ return;
+ }
+
+ drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
@@ -71,6 +92,7 @@ static struct device_operations gma_func0_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
+ .acpi_fill_ssdt_generator = gma_ssdt,
.init = pci_dev_init,
.scan_bus = 0,
.enable = 0,
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index fac7329..6783851 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -32,6 +32,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select VGA
select INTEL_EDID
select PER_DEVICE_ACPI_TABLES
+ select INTEL_GMA_ACPI
config BOOTBLOCK_NORTHBRIDGE_INIT
string
diff --git a/src/northbridge/intel/gm45/acpi/igd.asl b/src/northbridge/intel/gm45/acpi/igd.asl
index 199765b..1b58383 100644
--- a/src/northbridge/intel/gm45/acpi/igd.asl
+++ b/src/northbridge/intel/gm45/acpi/igd.asl
@@ -27,10 +27,10 @@ Device (GFX0)
Field (GFXC, DWordAcc, NoLock, Preserve)
{
Offset (0x10),
- BAR0, 64
+ BAR0, 64
}
- OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000)
+ OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000)
Field (GFRG, DWordAcc, NoLock, Preserve)
{
Offset (0x61250),
@@ -39,399 +39,40 @@ Device (GFX0)
BCLM, 16,
}
- /* Display Output Switching */
- Method (_DOS, 1)
+ Name (BRIG, Package (0x12)
{
- /* Windows 2000 and Windows XP call _DOS to enable/disable
- * Display Output Switching during init and while a switch
- * is already active
- */
- Store (And(Arg0, 7), DSEN)
- }
-
- /* We try to support as many GM45 systems as possible,
- * so keep the number of DIDs flexible.
- */
- Method (_DOD, 0)
- {
- If (LEqual(NDID, 1)) {
- Name(DOD1, Package() {
- 0xffffffff
- })
- Store (Or(0x00010000, DID1), Index(DOD1, 0))
- Return(DOD1)
- }
-
- If (LEqual(NDID, 2)) {
- Name(DOD2, Package() {
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID1), Index(DOD2, 0))
- Store (Or(0x00010000, DID2), Index(DOD2, 1))
- Return(DOD2)
- }
-
- If (LEqual(NDID, 3)) {
- Name(DOD3, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID1), Index(DOD3, 0))
- Store (Or(0x00010000, DID2), Index(DOD3, 1))
- Store (Or(0x00010000, DID3), Index(DOD3, 2))
- Return(DOD3)
- }
-
- If (LEqual(NDID, 4)) {
- Name(DOD4, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID1), Index(DOD4, 0))
- Store (Or(0x00010000, DID2), Index(DOD4, 1))
- Store (Or(0x00010000, DID3), Index(DOD4, 2))
- Store (Or(0x00010000, DID4), Index(DOD4, 3))
- Return(DOD4)
- }
-
- If (LGreater(NDID, 4)) {
- Name(DOD5, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID1), Index(DOD5, 0))
- Store (Or(0x00010000, DID2), Index(DOD5, 1))
- Store (Or(0x00010000, DID3), Index(DOD5, 2))
- Store (Or(0x00010000, DID4), Index(DOD5, 3))
- Store (Or(0x00010000, DID5), Index(DOD5, 4))
- Return(DOD5)
- }
-
- /* Some error happened, but we have to return something */
- Return (Package() {0x00000400})
- }
-
- Device(DD01)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID1, 0)) {
- Return (1)
- } Else {
- Return (And(0xffff, DID1))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 1)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 1)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-#ifdef DISPLAY_DEVICE_2_IS_LCD_SCREEN
- Device (LCD0)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID2, 0)) {
- Return (2)
- } Else {
- Return (And(0xffff, DID2))
- }
- }
-
- Name (BRCT, 0)
-
- Name (BRIG, Package (0x12)
- {
- 0x61,
- 0x61,
- 0x2,
- 0x4,
- 0x5,
- 0x7,
- 0x9,
- 0xb,
- 0xd,
- 0x11,
- 0x14,
- 0x17,
- 0x1c,
- 0x20,
- 0x27,
- 0x31,
- 0x41,
- 0x61,
- })
-
- Method (_BCL, 0, NotSerialized)
- {
- Store (1, BRCT)
- Return (BRIG)
- }
-
- Method (_BCM, 1, NotSerialized)
- {
- Store (ShiftLeft (Arg0, 4), ^^BCLV)
- Store (0x80000000, ^^CR1)
- Store (0x0610, ^^BCLM)
- }
- Method (_BQC, 0, NotSerialized)
- {
- Store (^^BCLV, Local0)
- ShiftRight (Local0, 4, Local0)
- Return (Local0)
- }
-
- Method(BRID, 1, NotSerialized)
- {
- Store (Match (BRIG, MEQ, Arg0, MTR, Zero, 2), Local0)
- If (LEqual (Local0, Ones))
- {
- Return (0x11)
- }
- Return (Local0)
- }
-
- /* Using Notify is the right way. But Windows doesn't handle
- it well. So use both method in a way to avoid double action.
- */
- Method (DECB, 0, NotSerialized)
- {
- If (BRCT)
- {
- Notify (LCD0, 0x87)
- } Else {
- Store (BRID (_BQC ()), Local0)
- If (LNotEqual (Local0, 2))
- {
- Decrement (Local0)
- }
- _BCM (DerefOf (Index (BRIG, Local0)))
- }
- }
- Method (INCB, 0, NotSerialized)
- {
- If (BRCT)
- {
- Notify (LCD0, 0x86)
- } Else {
- Store (BRID (_BQC ()), Local0)
- If (LNotEqual (Local0, 0x11))
- {
- Increment (Local0)
- }
- _BCM (DerefOf (Index (BRIG, Local0)))
- }
- }
- }
-#else
- Device(DD02)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID2, 0)) {
- Return (2)
- } Else {
- Return (And(0xffff, DID2))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 2)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 2)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-#endif
-
- Device(DD03)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID3, 0)) {
- Return (3)
- } Else {
- Return (And(0xffff, DID3))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 4)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-
- Device(DD04)
+ 0x61,
+ 0x61,
+ 0x2,
+ 0x4,
+ 0x5,
+ 0x7,
+ 0x9,
+ 0xb,
+ 0xd,
+ 0x11,
+ 0x14,
+ 0x17,
+ 0x1c,
+ 0x20,
+ 0x27,
+ 0x31,
+ 0x41,
+ 0x61,
+ })
+
+ Method (XBCM, 1, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID4, 0)) {
- Return (4)
- } Else {
- Return (And(0xffff, DID4))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 8)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Store (ShiftLeft (Arg0, 4), BCLV)
+ Store (0x80000000, CR1)
+ Store (0x0610, BCLM)
}
-
- Device(DD05)
+ Method (XBQC, 0, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID5, 0)) {
- Return (5)
- } Else {
- Return (And(0xffff, DID5))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 16)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Store (BCLV, Local0)
+ ShiftRight (Local0, 4, Local0)
+ Return (Local0)
}
+#include <drivers/intel/gma/igd.asl>
}
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index 74e16ad..25e31b2 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -490,6 +490,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+ device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+ if (!dev) {
+ return NULL;
+ }
+ struct northbridge_intel_gm45_config *chip = dev->chip_info;
+ return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+ if (!gfx) {
+ return;
+ }
+
+ drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
@@ -498,6 +519,7 @@ static struct device_operations gma_func0_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
+ .acpi_fill_ssdt_generator = gma_ssdt,
.init = gma_func0_init,
.scan_bus = 0,
.enable = 0,
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index cac5c46..7e94143 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -27,6 +27,7 @@ config NORTHBRIDGE_INTEL_HASWELL
select INTEL_DDI
select INTEL_DP
select PER_DEVICE_ACPI_TABLES
+ select INTEL_GMA_ACPI
if NORTHBRIDGE_INTEL_HASWELL
diff --git a/src/northbridge/intel/haswell/acpi/igd.asl b/src/northbridge/intel/haswell/acpi/igd.asl
index 9399554..15a7df2 100644
--- a/src/northbridge/intel/haswell/acpi/igd.asl
+++ b/src/northbridge/intel/haswell/acpi/igd.asl
@@ -23,301 +23,57 @@ Device (GFX0)
{
Name (_ADR, 0x00020000)
- /* Display Output Switching */
- Method (_DOS, 1)
+ OperationRegion (GFXC, PCI_Config, 0x00, 0x0100)
+ Field (GFXC, DWordAcc, NoLock, Preserve)
{
- /* Windows 2000 and Windows XP call _DOS to enable/disable
- * Display Output Switching during init and while a switch
- * is already active
- */
- Store (And(Arg0, 7), DSEN)
+ Offset (0x10),
+ BAR0, 64
}
- /* We try to support as many i945 systems as possible,
- * so keep the number of DIDs flexible.
- */
- Method (_DOD, 0)
+ OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000)
+ Field (GFRG, DWordAcc, NoLock, Preserve)
{
- If (LEqual(NDID, 1)) {
- Name(DOD1, Package() {
- 0xffffffff
- })
- Store (Or(0x00010000, DID1), Index(DOD1, 0))
- Return(DOD1)
- }
-
- If (LEqual(NDID, 2)) {
- Name(DOD2, Package() {
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID2), Index(DOD2, 0))
- Store (Or(0x00010000, DID2), Index(DOD2, 1))
- Return(DOD2)
- }
-
- If (LEqual(NDID, 3)) {
- Name(DOD3, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID3), Index(DOD3, 0))
- Store (Or(0x00010000, DID3), Index(DOD3, 1))
- Store (Or(0x00010000, DID3), Index(DOD3, 2))
- Return(DOD3)
- }
-
- If (LEqual(NDID, 4)) {
- Name(DOD4, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID4), Index(DOD4, 0))
- Store (Or(0x00010000, DID4), Index(DOD4, 1))
- Store (Or(0x00010000, DID4), Index(DOD4, 2))
- Store (Or(0x00010000, DID4), Index(DOD4, 3))
- Return(DOD4)
- }
-
- If (LGreater(NDID, 4)) {
- Name(DOD5, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID5), Index(DOD5, 0))
- Store (Or(0x00010000, DID5), Index(DOD5, 1))
- Store (Or(0x00010000, DID5), Index(DOD5, 2))
- Store (Or(0x00010000, DID5), Index(DOD5, 3))
- Store (Or(0x00010000, DID5), Index(DOD5, 4))
- Return(DOD5)
- }
-
- /* Some error happened, but we have to return something */
- Return (Package() {0x00000400})
- }
-
- Device(DD01)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID1, 0)) {
- Return (1)
- } Else {
- Return (And(0xffff, DID1))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 1)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 1)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
- Device(DD02)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID2, 0)) {
- Return (2)
- } Else {
- Return (And(0xffff, DID2))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 2)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 2)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Offset (0x48254),
+ BCLV, 16,
+ Offset (0xc8250),
+ CR1, 32,
+ CR2, 32
}
-
- Device(DD03)
+ Name (BRIG, Package (0x12)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID3, 0)) {
- Return (3)
- } Else {
- Return (And(0xffff, DID3))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 4)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-
- Device(DD04)
+ 0x61,
+ 0x61,
+ 0x2,
+ 0x4,
+ 0x5,
+ 0x7,
+ 0x9,
+ 0xb,
+ 0xd,
+ 0x11,
+ 0x14,
+ 0x17,
+ 0x1c,
+ 0x20,
+ 0x27,
+ 0x31,
+ 0x41,
+ 0x61,
+ })
+
+ Method (XBCM, 1, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID4, 0)) {
- Return (4)
- } Else {
- Return (And(0xffff, DID4))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 8)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Store (ShiftLeft (Arg0, 4), BCLV)
+ Store (0x80000000, CR1)
+ Store (0x061a061a, CR2)
}
-
- Device(DD05)
+ Method (XBQC, 0, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID5, 0)) {
- Return (5)
- } Else {
- Return (And(0xffff, DID5))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 16)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Store (BCLV, Local0)
+ ShiftRight (Local0, 4, Local0)
+ Return (Local0)
}
-
+#include <drivers/intel/gma/igd.asl>
}
diff --git a/src/northbridge/intel/haswell/chip.h b/src/northbridge/intel/haswell/chip.h
index d60504c..97c4036 100644
--- a/src/northbridge/intel/haswell/chip.h
+++ b/src/northbridge/intel/haswell/chip.h
@@ -17,6 +17,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <drivers/intel/gma/i915.h>
+
/*
* Digital Port Hotplug Enable:
* 0x04 = Enabled, 2ms short pulse
@@ -38,6 +40,8 @@ struct northbridge_intel_haswell_config {
u32 gpu_cpu_backlight; /* CPU Backlight PWM value */
u32 gpu_pch_backlight; /* PCH Backlight PWM value */
+
+ struct i915_gpu_controller_info gfx;
};
extern struct chip_operations northbridge_intel_haswell_ops;
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 325edbd..5f49c00 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -487,6 +487,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+ device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+ if (!dev) {
+ return NULL;
+ }
+ struct northbridge_intel_haswell_config *chip = dev->chip_info;
+ return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+ if (!gfx) {
+ return;
+ }
+
+ drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
@@ -496,6 +517,7 @@ static struct device_operations gma_func0_ops = {
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = gma_func0_init,
+ .acpi_fill_ssdt_generator = gma_ssdt,
.scan_bus = 0,
.enable = 0,
.ops_pci = &gma_pci_ops,
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index 086be8a..f3f4dbe 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -31,6 +31,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select LAPIC_MONOTONIC_TIMER
select VGA
select PER_DEVICE_ACPI_TABLES
+ select INTEL_GMA_ACPI
config NORTHBRIDGE_INTEL_SUBTYPE_I945GC
def_bool n
diff --git a/src/northbridge/intel/i945/acpi/i945.asl b/src/northbridge/intel/i945/acpi/i945.asl
index 6a34b94..4eac006 100644
--- a/src/northbridge/intel/i945/acpi/i945.asl
+++ b/src/northbridge/intel/i945/acpi/i945.asl
@@ -100,9 +100,3 @@ Device (PDRC)
// Integrated graphics 0:2.0
#include "igd.asl"
-
-Scope (\)
-{
- // backlight control, display switching, lid
- #include "acpi/video.asl"
-}
diff --git a/src/northbridge/intel/i945/acpi/igd.asl b/src/northbridge/intel/i945/acpi/igd.asl
index 9399554..1dc281f 100644
--- a/src/northbridge/intel/i945/acpi/igd.asl
+++ b/src/northbridge/intel/i945/acpi/igd.asl
@@ -23,301 +23,52 @@ Device (GFX0)
{
Name (_ADR, 0x00020000)
- /* Display Output Switching */
- Method (_DOS, 1)
+ Name (BRIG, Package (0x12)
{
- /* Windows 2000 and Windows XP call _DOS to enable/disable
- * Display Output Switching during init and while a switch
- * is already active
- */
- Store (And(Arg0, 7), DSEN)
- }
-
- /* We try to support as many i945 systems as possible,
- * so keep the number of DIDs flexible.
- */
- Method (_DOD, 0)
- {
- If (LEqual(NDID, 1)) {
- Name(DOD1, Package() {
- 0xffffffff
- })
- Store (Or(0x00010000, DID1), Index(DOD1, 0))
- Return(DOD1)
- }
-
- If (LEqual(NDID, 2)) {
- Name(DOD2, Package() {
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID2), Index(DOD2, 0))
- Store (Or(0x00010000, DID2), Index(DOD2, 1))
- Return(DOD2)
- }
-
- If (LEqual(NDID, 3)) {
- Name(DOD3, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID3), Index(DOD3, 0))
- Store (Or(0x00010000, DID3), Index(DOD3, 1))
- Store (Or(0x00010000, DID3), Index(DOD3, 2))
- Return(DOD3)
- }
-
- If (LEqual(NDID, 4)) {
- Name(DOD4, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID4), Index(DOD4, 0))
- Store (Or(0x00010000, DID4), Index(DOD4, 1))
- Store (Or(0x00010000, DID4), Index(DOD4, 2))
- Store (Or(0x00010000, DID4), Index(DOD4, 3))
- Return(DOD4)
- }
-
- If (LGreater(NDID, 4)) {
- Name(DOD5, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID5), Index(DOD5, 0))
- Store (Or(0x00010000, DID5), Index(DOD5, 1))
- Store (Or(0x00010000, DID5), Index(DOD5, 2))
- Store (Or(0x00010000, DID5), Index(DOD5, 3))
- Store (Or(0x00010000, DID5), Index(DOD5, 4))
- Return(DOD5)
- }
-
- /* Some error happened, but we have to return something */
- Return (Package() {0x00000400})
- }
-
- Device(DD01)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID1, 0)) {
- Return (1)
- } Else {
- Return (And(0xffff, DID1))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 1)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 1)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
- Device(DD02)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID2, 0)) {
- Return (2)
- } Else {
- Return (And(0xffff, DID2))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 2)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 2)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-
- Device(DD03)
+ 0xf,
+ 0xf,
+ 0x0,
+ 0x1,
+ 0x2,
+ 0x3,
+ 0x4,
+ 0x5,
+ 0x6,
+ 0x7,
+ 0x8,
+ 0x9,
+ 0xa,
+ 0xb,
+ 0xc,
+ 0xd,
+ 0xe,
+ 0xf,
+ })
+
+ Method (XBCM, 1, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID3, 0)) {
- Return (3)
- } Else {
- Return (And(0xffff, DID3))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 4)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Store (Or(ShiftLeft (Arg0, 4), 0xf), ^^DSPC.BRTC)
+#ifdef SMI_SAVE_CMOS
+ Trap(SMI_SAVE_CMOS)
+#endif
}
-
- Device(DD04)
+ Method (XBQC, 0, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID4, 0)) {
- Return (4)
- } Else {
- Return (And(0xffff, DID4))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 8)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Store (^^DSPC.BRTC, Local0)
+ ShiftRight (Local0, 4, Local0)
+ Return (Local0)
}
+#include <drivers/intel/gma/igd.asl>
+}
-
- Device(DD05)
+Device (DSPC)
+{
+ Name (_ADR, 0x00020001)
+ OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
+ Field (DSPC, ByteAcc, NoLock, Preserve)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID5, 0)) {
- Return (5)
- } Else {
- Return (And(0xffff, DID5))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 16)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Offset (0xf4),
+ BRTC, 8
}
-
-}
+}
\ No newline at end of file
diff --git a/src/northbridge/intel/i945/chip.h b/src/northbridge/intel/i945/chip.h
index 9e25ecc..5706086 100644
--- a/src/northbridge/intel/i945/chip.h
+++ b/src/northbridge/intel/i945/chip.h
@@ -1,6 +1,9 @@
+#include <drivers/intel/gma/i915.h>
+
struct northbridge_intel_i945_config {
u32 gpu_hotplug;
u32 gpu_backlight;
int gpu_lvds_use_spread_spectrum_clock;
int gpu_lvds_is_dual_channel;
+ struct i915_gpu_controller_info gfx;
};
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index 204ba01..2949fea 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -495,6 +495,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+ device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+ if (!dev) {
+ return NULL;
+ }
+ struct northbridge_intel_i945_config *chip = dev->chip_info;
+ return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+ if (!gfx) {
+ return;
+ }
+
+ drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
@@ -504,6 +525,7 @@ static struct device_operations gma_func0_ops = {
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = gma_func0_init,
+ .acpi_fill_ssdt_generator = gma_ssdt,
.scan_bus = 0,
.enable = 0,
.disable = gma_func0_disable,
diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig
index b49f331..370e7fe 100644
--- a/src/northbridge/intel/nehalem/Kconfig
+++ b/src/northbridge/intel/nehalem/Kconfig
@@ -27,6 +27,7 @@ config NORTHBRIDGE_INTEL_NEHALEM
select INTEL_EDID
select TSC_MONOTONIC_TIMER
select PER_DEVICE_ACPI_TABLES
+ select INTEL_GMA_ACPI
if NORTHBRIDGE_INTEL_NEHALEM
diff --git a/src/northbridge/intel/nehalem/acpi/igd.asl b/src/northbridge/intel/nehalem/acpi/igd.asl
index 8c6c174..15a7df2 100644
--- a/src/northbridge/intel/nehalem/acpi/igd.asl
+++ b/src/northbridge/intel/nehalem/acpi/igd.asl
@@ -27,10 +27,10 @@ Device (GFX0)
Field (GFXC, DWordAcc, NoLock, Preserve)
{
Offset (0x10),
- BAR0, 64
+ BAR0, 64
}
- OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000)
+ OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000)
Field (GFRG, DWordAcc, NoLock, Preserve)
{
Offset (0x48254),
@@ -40,391 +40,40 @@ Device (GFX0)
CR2, 32
}
- /* Display Output Switching */
- Method (_DOS, 1)
+ Name (BRIG, Package (0x12)
{
- /* Windows 2000 and Windows XP call _DOS to enable/disable
- * Display Output Switching during init and while a switch
- * is already active
- */
- Store (And(Arg0, 7), DSEN)
- }
-
- /* We try to support as many i945 systems as possible,
- * so keep the number of DIDs flexible.
- */
- Method (_DOD, 0)
+ 0x61,
+ 0x61,
+ 0x2,
+ 0x4,
+ 0x5,
+ 0x7,
+ 0x9,
+ 0xb,
+ 0xd,
+ 0x11,
+ 0x14,
+ 0x17,
+ 0x1c,
+ 0x20,
+ 0x27,
+ 0x31,
+ 0x41,
+ 0x61,
+ })
+
+ Method (XBCM, 1, NotSerialized)
{
- If (LEqual(NDID, 1)) {
- Name(DOD1, Package() {
- 0xffffffff
- })
- Store (Or(0x00010000, DID1), Index(DOD1, 0))
- Return(DOD1)
- }
-
- If (LEqual(NDID, 2)) {
- Name(DOD2, Package() {
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID2), Index(DOD2, 0))
- Store (Or(0x00010000, DID2), Index(DOD2, 1))
- Return(DOD2)
- }
-
- If (LEqual(NDID, 3)) {
- Name(DOD3, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID3), Index(DOD3, 0))
- Store (Or(0x00010000, DID3), Index(DOD3, 1))
- Store (Or(0x00010000, DID3), Index(DOD3, 2))
- Return(DOD3)
- }
-
- If (LEqual(NDID, 4)) {
- Name(DOD4, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID4), Index(DOD4, 0))
- Store (Or(0x00010000, DID4), Index(DOD4, 1))
- Store (Or(0x00010000, DID4), Index(DOD4, 2))
- Store (Or(0x00010000, DID4), Index(DOD4, 3))
- Return(DOD4)
- }
-
- If (LGreater(NDID, 4)) {
- Name(DOD5, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID5), Index(DOD5, 0))
- Store (Or(0x00010000, DID5), Index(DOD5, 1))
- Store (Or(0x00010000, DID5), Index(DOD5, 2))
- Store (Or(0x00010000, DID5), Index(DOD5, 3))
- Store (Or(0x00010000, DID5), Index(DOD5, 4))
- Return(DOD5)
- }
-
- /* Some error happened, but we have to return something */
- Return (Package() {0x00000400})
+ Store (ShiftLeft (Arg0, 4), BCLV)
+ Store (0x80000000, CR1)
+ Store (0x061a061a, CR2)
}
- Device(DD01)
+ Method (XBQC, 0, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID1, 0)) {
- Return (1)
- } Else {
- Return (And(0xffff, DID1))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 1)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 1)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
- Device(DD02)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID2, 0)) {
- Return (2)
- } Else {
- Return (And(0xffff, DID2))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 2)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 2)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-
- Device(DD03)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID3, 0)) {
- Return (3)
- } Else {
- Return (And(0xffff, DID3))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 4)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-
- Device(DD04)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID4, 0)) {
- Return (4)
- } Else {
- Return (And(0xffff, DID4))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 8)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-
- Device(DD05)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID5, 0)) {
- Return (5)
- } Else {
- Return (And(0xffff, DID5))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 16)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-#ifdef HAVE_LCD_SCREEN
- Device (LCD0)
- {
- Name (_ADR, 0x0400)
- Name (BRCT, 0)
-
- Name (BRIG, Package (0x12)
- {
- 0x61,
- 0x61,
- 0x2,
- 0x4,
- 0x5,
- 0x7,
- 0x9,
- 0xb,
- 0xd,
- 0x11,
- 0x14,
- 0x17,
- 0x1c,
- 0x20,
- 0x27,
- 0x31,
- 0x41,
- 0x61,
- })
-
- Method (_BCL, 0, NotSerialized)
- {
- Store (1, BRCT)
- Return (BRIG)
- }
-
- Method (_BCM, 1, NotSerialized)
- {
- Store (ShiftLeft (Arg0, 4), ^^BCLV)
- Store (0x80000000, ^^CR1)
- Store (0x061a061a, ^^CR2)
- }
- Method (_BQC, 0, NotSerialized)
- {
- Store (^^BCLV, Local0)
- ShiftRight (Local0, 4, Local0)
- Return (Local0)
- }
-
- Method(BRID, 1, NotSerialized)
- {
- Store (Match (BRIG, MEQ, Arg0, MTR, Zero, 2), Local0)
- If (LEqual (Local0, Ones))
- {
- Return (0x11)
- }
- Return (Local0)
- }
-
- /* Using Notify is the right way. But Windows doesn't handle
- it well. So use both method in a way to avoid double action.
- */
- Method (DECB, 0, NotSerialized)
- {
- If (BRCT)
- {
- Notify (LCD0, 0x87)
- } Else {
- Store (BRID (_BQC ()), Local0)
- If (LNotEqual (Local0, 2))
- {
- Decrement (Local0)
- }
- _BCM (DerefOf (Index (BRIG, Local0)))
- }
- }
- Method (INCB, 0, NotSerialized)
- {
- If (BRCT)
- {
- Notify (LCD0, 0x86)
- } Else {
- Store (BRID (_BQC ()), Local0)
- If (LNotEqual (Local0, 0x11))
- {
- Increment (Local0)
- }
- _BCM (DerefOf (Index (BRIG, Local0)))
- }
- }
+ Store (BCLV, Local0)
+ ShiftRight (Local0, 4, Local0)
+ Return (Local0)
}
-#endif
+#include <drivers/intel/gma/igd.asl>
}
diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c
index c3e2a49..184781f 100644
--- a/src/northbridge/intel/nehalem/gma.c
+++ b/src/northbridge/intel/nehalem/gma.c
@@ -1066,6 +1066,27 @@ static void gma_read_resources(struct device *dev)
res->size = (resource_t) 0x10000000;
}
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+ device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+ if (!dev) {
+ return NULL;
+ }
+ struct northbridge_intel_nehalem_config *chip = dev->chip_info;
+ return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+ if (!gfx) {
+ return;
+ }
+
+ drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
@@ -1074,6 +1095,7 @@ static struct device_operations gma_func0_ops = {
.read_resources = gma_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
+ .acpi_fill_ssdt_generator = gma_ssdt,
.init = gma_func0_init,
.scan_bus = 0,
.enable = 0,
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index 647b4fb..6e66de5 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -25,6 +25,7 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE
select DYNAMIC_CBMEM
select CPU_INTEL_MODEL_206AX
select PER_DEVICE_ACPI_TABLES
+ select INTEL_GMA_ACPI
config NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
bool
@@ -35,6 +36,7 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
select CPU_INTEL_MODEL_206AX
select HAVE_DEBUG_RAM_SETUP
select PER_DEVICE_ACPI_TABLES
+ select INTEL_GMA_ACPI
config NORTHBRIDGE_INTEL_IVYBRIDGE
bool
@@ -44,6 +46,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
select DYNAMIC_CBMEM
select CPU_INTEL_MODEL_306AX
select PER_DEVICE_ACPI_TABLES
+ select INTEL_GMA_ACPI
config NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE
bool
@@ -54,6 +57,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE
select CPU_INTEL_MODEL_306AX
select HAVE_DEBUG_RAM_SETUP
select PER_DEVICE_ACPI_TABLES
+ select INTEL_GMA_ACPI
if NORTHBRIDGE_INTEL_SANDYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE || NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
diff --git a/src/northbridge/intel/sandybridge/acpi/igd.asl b/src/northbridge/intel/sandybridge/acpi/igd.asl
index 8c6c174..5c008f4 100644
--- a/src/northbridge/intel/sandybridge/acpi/igd.asl
+++ b/src/northbridge/intel/sandybridge/acpi/igd.asl
@@ -40,391 +40,40 @@ Device (GFX0)
CR2, 32
}
- /* Display Output Switching */
- Method (_DOS, 1)
+ Name (BRIG, Package (0x12)
{
- /* Windows 2000 and Windows XP call _DOS to enable/disable
- * Display Output Switching during init and while a switch
- * is already active
- */
- Store (And(Arg0, 7), DSEN)
- }
-
- /* We try to support as many i945 systems as possible,
- * so keep the number of DIDs flexible.
- */
- Method (_DOD, 0)
+ 0x61,
+ 0x61,
+ 0x2,
+ 0x4,
+ 0x5,
+ 0x7,
+ 0x9,
+ 0xb,
+ 0xd,
+ 0x11,
+ 0x14,
+ 0x17,
+ 0x1c,
+ 0x20,
+ 0x27,
+ 0x31,
+ 0x41,
+ 0x61,
+ })
+
+ Method (XBCM, 1, NotSerialized)
{
- If (LEqual(NDID, 1)) {
- Name(DOD1, Package() {
- 0xffffffff
- })
- Store (Or(0x00010000, DID1), Index(DOD1, 0))
- Return(DOD1)
- }
-
- If (LEqual(NDID, 2)) {
- Name(DOD2, Package() {
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID2), Index(DOD2, 0))
- Store (Or(0x00010000, DID2), Index(DOD2, 1))
- Return(DOD2)
- }
-
- If (LEqual(NDID, 3)) {
- Name(DOD3, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID3), Index(DOD3, 0))
- Store (Or(0x00010000, DID3), Index(DOD3, 1))
- Store (Or(0x00010000, DID3), Index(DOD3, 2))
- Return(DOD3)
- }
-
- If (LEqual(NDID, 4)) {
- Name(DOD4, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID4), Index(DOD4, 0))
- Store (Or(0x00010000, DID4), Index(DOD4, 1))
- Store (Or(0x00010000, DID4), Index(DOD4, 2))
- Store (Or(0x00010000, DID4), Index(DOD4, 3))
- Return(DOD4)
- }
-
- If (LGreater(NDID, 4)) {
- Name(DOD5, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID5), Index(DOD5, 0))
- Store (Or(0x00010000, DID5), Index(DOD5, 1))
- Store (Or(0x00010000, DID5), Index(DOD5, 2))
- Store (Or(0x00010000, DID5), Index(DOD5, 3))
- Store (Or(0x00010000, DID5), Index(DOD5, 4))
- Return(DOD5)
- }
-
- /* Some error happened, but we have to return something */
- Return (Package() {0x00000400})
+ Store (ShiftLeft (Arg0, 4), BCLV)
+ Store (0x80000000, CR1)
+ Store (0x061a061a, CR2)
}
- Device(DD01)
+ Method (XBQC, 0, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID1, 0)) {
- Return (1)
- } Else {
- Return (And(0xffff, DID1))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 1)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 1)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
- Device(DD02)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID2, 0)) {
- Return (2)
- } Else {
- Return (And(0xffff, DID2))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 2)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 2)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-
- Device(DD03)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID3, 0)) {
- Return (3)
- } Else {
- Return (And(0xffff, DID3))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 4)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-
- Device(DD04)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID4, 0)) {
- Return (4)
- } Else {
- Return (And(0xffff, DID4))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 8)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-
- Device(DD05)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID5, 0)) {
- Return (5)
- } Else {
- Return (And(0xffff, DID5))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 16)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-#ifdef HAVE_LCD_SCREEN
- Device (LCD0)
- {
- Name (_ADR, 0x0400)
- Name (BRCT, 0)
-
- Name (BRIG, Package (0x12)
- {
- 0x61,
- 0x61,
- 0x2,
- 0x4,
- 0x5,
- 0x7,
- 0x9,
- 0xb,
- 0xd,
- 0x11,
- 0x14,
- 0x17,
- 0x1c,
- 0x20,
- 0x27,
- 0x31,
- 0x41,
- 0x61,
- })
-
- Method (_BCL, 0, NotSerialized)
- {
- Store (1, BRCT)
- Return (BRIG)
- }
-
- Method (_BCM, 1, NotSerialized)
- {
- Store (ShiftLeft (Arg0, 4), ^^BCLV)
- Store (0x80000000, ^^CR1)
- Store (0x061a061a, ^^CR2)
- }
- Method (_BQC, 0, NotSerialized)
- {
- Store (^^BCLV, Local0)
- ShiftRight (Local0, 4, Local0)
- Return (Local0)
- }
-
- Method(BRID, 1, NotSerialized)
- {
- Store (Match (BRIG, MEQ, Arg0, MTR, Zero, 2), Local0)
- If (LEqual (Local0, Ones))
- {
- Return (0x11)
- }
- Return (Local0)
- }
-
- /* Using Notify is the right way. But Windows doesn't handle
- it well. So use both method in a way to avoid double action.
- */
- Method (DECB, 0, NotSerialized)
- {
- If (BRCT)
- {
- Notify (LCD0, 0x87)
- } Else {
- Store (BRID (_BQC ()), Local0)
- If (LNotEqual (Local0, 2))
- {
- Decrement (Local0)
- }
- _BCM (DerefOf (Index (BRIG, Local0)))
- }
- }
- Method (INCB, 0, NotSerialized)
- {
- If (BRCT)
- {
- Notify (LCD0, 0x86)
- } Else {
- Store (BRID (_BQC ()), Local0)
- If (LNotEqual (Local0, 0x11))
- {
- Increment (Local0)
- }
- _BCM (DerefOf (Index (BRIG, Local0)))
- }
- }
+ Store (BCLV, Local0)
+ ShiftRight (Local0, 4, Local0)
+ Return (Local0)
}
-#endif
+#include <drivers/intel/gma/igd.asl>
}
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index 247c723..117e9df 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -612,6 +612,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+ device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+ if (!dev) {
+ return NULL;
+ }
+ struct northbridge_intel_sandybridge_config *chip = dev->chip_info;
+ return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+ if (!gfx) {
+ return;
+ }
+
+ drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
@@ -620,6 +641,7 @@ static struct device_operations gma_func0_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
+ .acpi_fill_ssdt_generator = gma_ssdt,
.init = gma_func0_init,
.scan_bus = 0,
.enable = 0,
diff --git a/src/northbridge/intel/sch/Kconfig b/src/northbridge/intel/sch/Kconfig
index b8dad72..ac1f79a 100644
--- a/src/northbridge/intel/sch/Kconfig
+++ b/src/northbridge/intel/sch/Kconfig
@@ -21,6 +21,7 @@ config NORTHBRIDGE_INTEL_SCH
bool
select MMCONF_SUPPORT
select PER_DEVICE_ACPI_TABLES
+ select INTEL_GMA_ACPI
if NORTHBRIDGE_INTEL_SCH
diff --git a/src/northbridge/intel/sch/acpi/igd.asl b/src/northbridge/intel/sch/acpi/igd.asl
index 9399554..1b58383 100644
--- a/src/northbridge/intel/sch/acpi/igd.asl
+++ b/src/northbridge/intel/sch/acpi/igd.asl
@@ -23,301 +23,56 @@ Device (GFX0)
{
Name (_ADR, 0x00020000)
- /* Display Output Switching */
- Method (_DOS, 1)
+ OperationRegion (GFXC, PCI_Config, 0x00, 0x0100)
+ Field (GFXC, DWordAcc, NoLock, Preserve)
{
- /* Windows 2000 and Windows XP call _DOS to enable/disable
- * Display Output Switching during init and while a switch
- * is already active
- */
- Store (And(Arg0, 7), DSEN)
+ Offset (0x10),
+ BAR0, 64
}
- /* We try to support as many i945 systems as possible,
- * so keep the number of DIDs flexible.
- */
- Method (_DOD, 0)
+ OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000)
+ Field (GFRG, DWordAcc, NoLock, Preserve)
{
- If (LEqual(NDID, 1)) {
- Name(DOD1, Package() {
- 0xffffffff
- })
- Store (Or(0x00010000, DID1), Index(DOD1, 0))
- Return(DOD1)
- }
-
- If (LEqual(NDID, 2)) {
- Name(DOD2, Package() {
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID2), Index(DOD2, 0))
- Store (Or(0x00010000, DID2), Index(DOD2, 1))
- Return(DOD2)
- }
-
- If (LEqual(NDID, 3)) {
- Name(DOD3, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID3), Index(DOD3, 0))
- Store (Or(0x00010000, DID3), Index(DOD3, 1))
- Store (Or(0x00010000, DID3), Index(DOD3, 2))
- Return(DOD3)
- }
-
- If (LEqual(NDID, 4)) {
- Name(DOD4, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID4), Index(DOD4, 0))
- Store (Or(0x00010000, DID4), Index(DOD4, 1))
- Store (Or(0x00010000, DID4), Index(DOD4, 2))
- Store (Or(0x00010000, DID4), Index(DOD4, 3))
- Return(DOD4)
- }
-
- If (LGreater(NDID, 4)) {
- Name(DOD5, Package() {
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff,
- 0xffffffff
- })
- Store (Or(0x00010000, DID5), Index(DOD5, 0))
- Store (Or(0x00010000, DID5), Index(DOD5, 1))
- Store (Or(0x00010000, DID5), Index(DOD5, 2))
- Store (Or(0x00010000, DID5), Index(DOD5, 3))
- Store (Or(0x00010000, DID5), Index(DOD5, 4))
- Return(DOD5)
- }
-
- /* Some error happened, but we have to return something */
- Return (Package() {0x00000400})
- }
-
- Device(DD01)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID1, 0)) {
- Return (1)
- } Else {
- Return (And(0xffff, DID1))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 1)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 1)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
- Device(DD02)
- {
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID2, 0)) {
- Return (2)
- } Else {
- Return (And(0xffff, DID2))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 2)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 2)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Offset (0x61250),
+ CR1, 32,
+ BCLV, 16,
+ BCLM, 16,
}
-
- Device(DD03)
+ Name (BRIG, Package (0x12)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID3, 0)) {
- Return (3)
- } Else {
- Return (And(0xffff, DID3))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 4)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
- }
-
-
- Device(DD04)
+ 0x61,
+ 0x61,
+ 0x2,
+ 0x4,
+ 0x5,
+ 0x7,
+ 0x9,
+ 0xb,
+ 0xd,
+ 0x11,
+ 0x14,
+ 0x17,
+ 0x1c,
+ 0x20,
+ 0x27,
+ 0x31,
+ 0x41,
+ 0x61,
+ })
+
+ Method (XBCM, 1, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID4, 0)) {
- Return (4)
- } Else {
- Return (And(0xffff, DID4))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 8)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Store (ShiftLeft (Arg0, 4), BCLV)
+ Store (0x80000000, CR1)
+ Store (0x0610, BCLM)
}
-
- Device(DD05)
+ Method (XBQC, 0, NotSerialized)
{
- /* Device Unique ID */
- Method(_ADR, 0, Serialized)
- {
- If(LEqual(DID5, 0)) {
- Return (5)
- } Else {
- Return (And(0xffff, DID5))
- }
- }
-
- /* Device Current Status */
- Method(_DCS, 0)
- {
- TRAP(1)
- If (And(CSTE, 16)) {
- Return (0x1f)
- }
- Return(0x1d)
- }
-
- /* Query Device Graphics State */
- Method(_DGS, 0)
- {
- If (And(NSTE, 4)) {
- Return(1)
- }
- Return(0)
- }
-
- /* Device Set State */
- Method(_DSS, 1)
- {
- /* If Parameter Arg0 is (1 << 31) | (1 << 30), the
- * display switch was completed
- */
- If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
- Store (NSTE, CSTE)
- }
- }
+ Store (BCLV, Local0)
+ ShiftRight (Local0, 4, Local0)
+ Return (Local0)
}
-
+#include <drivers/intel/gma/igd.asl>
}
diff --git a/src/northbridge/intel/sch/acpi/sch.asl b/src/northbridge/intel/sch/acpi/sch.asl
index 5e0b3f8..d1acc48 100644
--- a/src/northbridge/intel/sch/acpi/sch.asl
+++ b/src/northbridge/intel/sch/acpi/sch.asl
@@ -80,9 +80,3 @@ Device (PDRC)
// Integrated graphics 0:2.0
#include "igd.asl"
-
-Scope (\)
-{
- // backlight control, display switching, lid
- #include "acpi/video.asl"
-}
diff --git a/src/northbridge/intel/sch/chip.h b/src/northbridge/intel/sch/chip.h
new file mode 100644
index 0000000..d39931f
--- /dev/null
+++ b/src/northbridge/intel/sch/chip.h
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2008 coresystems GmbH
+ * 2012 secunet Security Networks AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef NORTHBRIDGE_INTEL_SCH_CHIP_H
+#define NORTHBRIDGE_INTEL_SCH_CHIP_H
+
+#include <drivers/intel/gma/i915.h>
+
+struct northbridge_intel_sch_config {
+ struct i915_gpu_controller_info gfx;
+};
+
+#endif /* NORTHBRIDGE_INTEL_SCH_CHIP_H */
diff --git a/src/northbridge/intel/sch/gma.c b/src/northbridge/intel/sch/gma.c
index 59ff024..3b2bf81 100644
--- a/src/northbridge/intel/sch/gma.c
+++ b/src/northbridge/intel/sch/gma.c
@@ -21,6 +21,8 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <drivers/intel/gma/i915.h>
+#include "chip.h"
static void gma_func0_init(struct device *dev)
{
@@ -44,6 +46,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+ device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+ if (!dev) {
+ return NULL;
+ }
+ struct northbridge_intel_sch_config *chip = dev->chip_info;
+ return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+ if (!gfx) {
+ return;
+ }
+
+ drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
@@ -52,6 +75,7 @@ static struct device_operations gma_func0_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
+ .acpi_fill_ssdt_generator = gma_ssdt,
.init = gma_func0_init,
.scan_bus = 0,
.enable = 0,
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 11b765a..ae10a33 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -678,6 +678,7 @@ static void southbridge_inject_dsdt(void)
opregion = igd_make_opregion();
if (gnvs) {
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
memset(gnvs, 0, sizeof (*gnvs));
acpi_create_gnvs(gnvs);
@@ -686,6 +687,9 @@ static void southbridge_inject_dsdt(void)
gnvs->mpen = 1; /* Enable Multi Processing */
gnvs->pcnt = dev_count_cpu();
+ gnvs->ndid = gfx->ndid;
+ memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
#if CONFIG_CHROMEOS
chromeos_init_vboot(&(gnvs->chromeos));
#endif
diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c
index f9961f9..d02a800 100644
--- a/src/southbridge/intel/fsp_bd82x6x/lpc.c
+++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c
@@ -640,11 +640,17 @@ static void southbridge_inject_dsdt(void)
opregion = igd_make_opregion();
if (gnvs) {
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+
memset(gnvs, 0, sizeof (*gnvs));
acpi_create_gnvs(gnvs);
/* IGD OpRegion Base Address */
gnvs->aslb = (u32)opregion;
+
+ gnvs->ndid = gfx->ndid;
+ memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
/* And tell SMI about it */
smm_setup_structures(gnvs, NULL, NULL);
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 22ffd7f..de02686 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -35,6 +35,7 @@
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <string.h>
+#include <drivers/intel/gma/i915.h>
#include "nvs.h"
#define NMI_OFF 0
@@ -641,12 +642,18 @@ static void southbridge_inject_dsdt(void)
global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
if (gnvs) {
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+
memset(gnvs, 0, sizeof(*gnvs));
gnvs->apic = 1;
gnvs->mpen = 1; /* Enable Multi Processing */
acpi_create_gnvs(gnvs);
+
+ gnvs->ndid = gfx->ndid;
+ memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
/* And tell SMI about it */
smm_setup_structures(gnvs, NULL, NULL);
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index e12c724..38202bf 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -37,6 +37,7 @@
#include "i82801ix.h"
#include "nvs.h"
#include <southbridge/intel/common/pciehp.h>
+#include <drivers/intel/gma/i915.h>
#define NMI_OFF 0
@@ -545,8 +546,13 @@ static void southbridge_inject_dsdt(void)
global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
if (gnvs) {
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
memset(gnvs, 0, sizeof (*gnvs));
acpi_create_gnvs(gnvs);
+
+ gnvs->ndid = gfx->ndid;
+ memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
/* And tell SMI about it */
smm_setup_structures(gnvs, NULL, NULL);
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index 2124711..1210f4f 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -671,9 +671,14 @@ static void southbridge_inject_dsdt(void)
opregion = igd_make_opregion();
if (gnvs) {
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
memset(gnvs, 0, sizeof (*gnvs));
acpi_create_gnvs(gnvs);
+
+ gnvs->ndid = gfx->ndid;
+ memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
/* IGD OpRegion Base Address */
gnvs->aslb = (u32)opregion;
/* And tell SMI about it */
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 563cb0a..93384d6 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -38,6 +38,7 @@
#include "pch.h"
#include <arch/acpigen.h>
#include <cbmem.h>
+#include <drivers/intel/gma/i915.h>
#define NMI_OFF 0
@@ -755,6 +756,8 @@ static void southbridge_inject_dsdt(void)
}
if (gnvs) {
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+
acpi_create_gnvs(gnvs);
gnvs->apic = 1;
@@ -768,6 +771,9 @@ static void southbridge_inject_dsdt(void)
/* Update the mem console pointer. */
gnvs->cbmc = (u32)cbmem_find(CBMEM_ID_CONSOLE);
+ gnvs->ndid = gfx->ndid;
+ memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
acpi_save_gnvs((unsigned long)gnvs);
/* And tell SMI about it */
smm_setup_structures(gnvs, NULL, NULL);
diff --git a/src/southbridge/intel/sch/lpc.c b/src/southbridge/intel/sch/lpc.c
index dcf9e33..176e562 100644
--- a/src/southbridge/intel/sch/lpc.c
+++ b/src/southbridge/intel/sch/lpc.c
@@ -29,6 +29,7 @@
#include <cpu/cpu.h>
#include <cbmem.h>
#include <string.h>
+#include <drivers/intel/gma/i915.h>
#include "nvs.h"
#include "chip.h"
@@ -193,8 +194,13 @@ static void southbridge_inject_dsdt(void)
global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
if (gnvs) {
+ const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
memset(gnvs, 0, sizeof(*gnvs));
acpi_create_gnvs(gnvs);
+
+ gnvs->ndid = gfx->ndid;
+ memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
/* And tell SMI about it */
smm_setup_structures(gnvs, NULL, NULL);
More information about the coreboot-gerrit
mailing list