[coreboot-gerrit] Patch set updated for coreboot: a8406ea rambi: make ramids non-legacy gpio inputs

Aaron Durbin (adurbin@google.com) gerrit at coreboot.org
Wed May 7 17:11:06 CEST 2014


Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4977

-gerrit

commit a8406ea3f8bf67fbea0675c07f8f3cc545f320af
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Mon Nov 18 13:50:02 2013 -0600

    rambi: make ramids non-legacy gpio inputs
    
    The romstage code for rambi uses the mmio way of reading
    inputs. However, this is a problem is the GPIOs are set up
    as legacy mode. Subsequent warm resets mean the ram_id is
    read incorrectly. Ensure the ram_id is read consistently
    by keeping the GPIOs for ram_id in mmio mode.
    
    BUG=chrome-os-partner:24085
    BRANCH=None
    TEST=Built and booted. And rebooted. Now seeing consistent ram_id
         values on warm resets.
    
    Change-Id: Ieff98c000be80998854f325754f1e819975d2be5
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://chromium-review.googlesource.com/177230
    Reviewed-by: Shawn Nematbakhsh <shawnn at chromium.org>
---
 src/mainboard/google/rambi/gpio.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/google/rambi/gpio.c b/src/mainboard/google/rambi/gpio.c
index 7d44968..dfe880a 100644
--- a/src/mainboard/google/rambi/gpio.c
+++ b/src/mainboard/google/rambi/gpio.c
@@ -200,9 +200,9 @@ static const struct soc_gpio_map gpssus_gpio_map[] = {
 	GPIO_NC,	/* S534 - NC */
 	GPIO_OUT_HIGH,	/* S535 - LTE_DISABLE_L */
 	GPIO_NC,	/* S536 - NC */
-	GPIO_INPUT,	/* S537 - RAM_ID0 */
-	GPIO_INPUT,	/* S538 - RAM_ID1 */
-	GPIO_INPUT,	/* S539 - RAM_ID2 */
+	GPIO_FUNC0,	/* S537 - RAM_ID0 */
+	GPIO_FUNC0,	/* S538 - RAM_ID1 */
+	GPIO_FUNC0,	/* S539 - RAM_ID2 */
 	GPIO_NC,	/* S540 - NC */
 	GPIO_NC,	/* S541 - NC */
 	GPIO_NC,	/* S542 - NC */



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