[coreboot-gerrit] Patch set updated for coreboot: ecf535e tegra124: Fix some bugs in the clock configuration macros.

[Marc Jones (marc.jones@se-eng.com)]

Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7416

-gerrit

commit ecf535ea01c545c2c85e2b2bc551dff5b4f53dd8
Author: Gabe Black <gabeblack at google.com>
Date:   Wed Mar 5 21:53:02 2014 -0800

    tegra124: Fix some bugs in the clock configuration macros.
    
    There were some missing parenthesis and some extra semicolons which this
    change adds and removes, respectively.
    
    BUG=chrome-os-partner:25467
    TEST=Built and booted on nyan rev1. Verified that the same frequency calculated
    differently results in the same settings. Before operator precedence would
    pull apart the frequency calculation and use the pieces in the wrong order.
    BRANCH=None
    
    Original-Change-Id: I843d4ae9f7a2ae362926d94b6b77ef31d350a329
    Original-Signed-off-by: Gabe Black <gabeblack at google.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/189013
    Original-Reviewed-by: Hung-Te Lin <hungte at chromium.org>
    Original-Reviewed-by: Tom Warren <twarren at nvidia.com>
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
    Original-Commit-Queue: Gabe Black <gabeblack at chromium.org>
    Original-Tested-by: Gabe Black <gabeblack at chromium.org>
    (cherry picked from commit 462e61ad898a4d6a99c1d161d77bde245c5b1f5c)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: Ifce3aac262cf5e2ec0496c5b3ad894bf6f0f9a46
---
 src/soc/nvidia/tegra124/include/soc/clock.h | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/soc/nvidia/tegra124/include/soc/clock.h b/src/soc/nvidia/tegra124/include/soc/clock.h
index 9f3f0a4..c0a3f39 100644
--- a/src/soc/nvidia/tegra124/include/soc/clock.h
+++ b/src/soc/nvidia/tegra124/include/soc/clock.h
@@ -1,4 +1,5 @@
 /*
+ * Copyright 2014 Google Inc.
  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
@@ -192,7 +193,7 @@ enum {
  * and voila, upper 7 bits are (ref/freq-1), and lowest bit is h. Since you
  * will assign this to a u8, it gets nicely truncated for you.
  */
-#define CLK_DIVIDER(REF, FREQ)	((((REF) * 2) / FREQ) - 2)
+#define CLK_DIVIDER(REF, FREQ)	((((REF) * 2) / (FREQ)) - 2)
 
 /* Calculate clock frequency value from reference and clock divider value
  * The discussion in the book is pretty lacking.
@@ -211,18 +212,18 @@ enum {
  * Since you multiply denominator * 2 (by NOT shifting it),
  * you multiply numerator * 2 to cancel it out.
  */
-#define CLK_FREQUENCY(REF, REG)	(((REF) * 2) / (REG + 2))
+#define CLK_FREQUENCY(REF, REG)	(((REF) * 2) / ((REG) + 2))
 
 #define clock_configure_irregular_source(device, src, freq, src_id) \
 	clrsetbits_le32(&clk_rst->clk_src_##device, \
 		CLK_SOURCE_MASK | CLK_DIVISOR_MASK, \
 		src_id << CLK_SOURCE_SHIFT | \
-		CLK_DIVIDER(TEGRA_##src##_KHZ, freq));
+		CLK_DIVIDER(TEGRA_##src##_KHZ, freq))
 
 /* Warning: Some devices just use different bits for the same sources for no
  * apparent reason. *Always* double-check the TRM before trusting this macro. */
 #define clock_configure_source(device, src, freq) \
-	clock_configure_irregular_source(device, src, freq, src);
+	clock_configure_irregular_source(device, src, freq, src)
 
 enum clock_source {  /* Careful: Not true for all sources, always check TRM! */
 	PLLP = 0,