[coreboot-gerrit] Patch set updated for coreboot: 91511a6 tegra124: Add a macro specifically for configuring the I2C controller clocks.

[Marc Jones (marc.jones@se-eng.com)]

Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7417

-gerrit

commit 91511a6fb3935506633469985f3fc9ee72cccdce
Author: Gabe Black <gabeblack at google.com>
Date:   Wed Mar 5 21:57:02 2014 -0800

    tegra124: Add a macro specifically for configuring the I2C controller clocks.
    
    The divider for the I2C clocks works differently than for other IP blocks and
    needs to be set up to reflect that. There's also a large internal divider which
    means you have to do extra calculations to determine what the frequency of the
    bus itself will be based on the I2C controller clock. The new macro takes the
    desired frequency of the bus itself and figures everything else out.
    
    BUG=chrome-os-partner:25467
    TEST=Built and booted on nyan rev1 using this function to set up the i2c
    busses.
    BRANCH=None
    
    Original-Change-Id: Ib62a5659bcc0d0e15de41887514ae8efb8c8129a
    Original-Signed-off-by: Gabe Black <gabeblack at google.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/189014
    Original-Reviewed-by: Hung-Te Lin <hungte at chromium.org>
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
    Original-Tested-by: Gabe Black <gabeblack at chromium.org>
    Original-Commit-Queue: Gabe Black <gabeblack at chromium.org>
    (cherry picked from commit 24714399a9a89cf33ad20ee43da87e9b04ba394c)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I9a1eabb16fdb27fb813fe6bc56cdcc593eca166e
---
 src/soc/nvidia/tegra124/include/soc/clock.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/src/soc/nvidia/tegra124/include/soc/clock.h b/src/soc/nvidia/tegra124/include/soc/clock.h
index c0a3f39..d4c5046 100644
--- a/src/soc/nvidia/tegra124/include/soc/clock.h
+++ b/src/soc/nvidia/tegra124/include/soc/clock.h
@@ -225,6 +225,17 @@ enum {
 #define clock_configure_source(device, src, freq) \
 	clock_configure_irregular_source(device, src, freq, src)
 
+/* The I2C divisors are not 7.1 divisors like the others, they divide by n + 1
+ * directly. Also, there are internal divisors in the I2C controller itself.
+ * We can deal with those here and make it easier to select what the actual
+ * bus frequency will be. The 0x19 value is the default divisor in the
+ * clk_divisor register in the controller, and 8 is just a magic number in the
+ * documentation. Multiplying by 2 compensates for the different format of the
+ * divisor.
+ */
+#define clock_configure_i2c_scl_freq(device, src, freq) \
+	clock_configure_source(device, src, (freq) * (0x19 + 1) * 8 * 2)
+
 enum clock_source {  /* Careful: Not true for all sources, always check TRM! */
 	PLLP = 0,
 	PLLC2 = 1,