[coreboot-gerrit] Patch set updated for coreboot: amdfwtool: Fill the first 3 romsig entries as 0

[Zheng Bao (zheng.bao@amd.com)]

Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12665

-gerrit

commit e2dda328d9d160f5f93c4c3ca435be909f43a731
Author: zbao <fishbaozi at gmail.com>
Date:   Mon Dec 7 05:17:23 2015 -0500

    amdfwtool: Fill the first 3 romsig entries as 0
    
    I didn't go back through the development guide for this.
    But based on test, if the empty entry is filled as 0xFFFFFFFF,
    instead of 0, the USB3 port can not be used.
    
    Leave the entries of PSP and PSP2 as 0xFFFFFFFF to be compliant
    with the case before the amdfwtool is used.
    
    Change-Id: Icd5f9891e541279dbd551bbceaf091488d22bfef
    Signed-off-by: Zheng Bao <fishbaozi at gmail.com>
---
 util/amdfwtool/amdfwtool.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c
index f958aba..b08a961 100644
--- a/util/amdfwtool/amdfwtool.c
+++ b/util/amdfwtool/amdfwtool.c
@@ -377,6 +377,9 @@ int main(int argc, char **argv)
 	current = AMD_ROMSIG_OFFSET;
 	amd_romsig = rom + AMD_ROMSIG_OFFSET;
 	amd_romsig[0] = 0x55AA55AA; /* romsig */
+	amd_romsig[1] = 0;
+	amd_romsig[2] = 0;
+	amd_romsig[3] = 0;
 
 	current += 0x20;	    /* size of ROMSIG */