[coreboot-gerrit] Patch set updated for coreboot: google: veryron_*: CBFS_SIZE to match the available size for coreboot

Paul Kocialkowski (contact@paulk.fr) gerrit at coreboot.org
Wed Sep 2 21:55:42 CET 2015


Paul Kocialkowski (contact at paulk.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11117

-gerrit

commit 69a2d313abdf898f5b701d5b787e9912132d8142
Author: Paul Kocialkowski <contact at paulk.fr>
Date:   Mon Aug 3 14:24:09 2015 +0200

    google: veryron_*: CBFS_SIZE to match the available size for coreboot
    
    Veyron boards come with a 4 MiB SPI flash chip. However, only 1 MiB of those is
    available for coreboot and the rest shouldn't be overriden by it.
    
    Change-Id: I168386a5011222866654a496d8d054faff7a9406
    Signed-off-by: Paul Kocialkowski <contact at paulk.fr>
---
 src/mainboard/google/veyron_brain/Kconfig  | 5 +++++
 src/mainboard/google/veyron_danger/Kconfig | 5 +++++
 src/mainboard/google/veyron_jerry/Kconfig  | 5 +++++
 src/mainboard/google/veyron_mickey/Kconfig | 5 +++++
 src/mainboard/google/veyron_mighty/Kconfig | 5 +++++
 src/mainboard/google/veyron_minnie/Kconfig | 5 +++++
 src/mainboard/google/veyron_pinky/Kconfig  | 5 +++++
 src/mainboard/google/veyron_rialto/Kconfig | 5 +++++
 src/mainboard/google/veyron_romy/Kconfig   | 5 +++++
 src/mainboard/google/veyron_shark/Kconfig  | 5 +++++
 src/mainboard/google/veyron_speedy/Kconfig | 5 +++++
 11 files changed, 55 insertions(+)

diff --git a/src/mainboard/google/veyron_brain/Kconfig b/src/mainboard/google/veyron_brain/Kconfig
index f96e92c..3297d29 100644
--- a/src/mainboard/google/veyron_brain/Kconfig
+++ b/src/mainboard/google/veyron_brain/Kconfig
@@ -72,4 +72,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON_BRAIN
diff --git a/src/mainboard/google/veyron_danger/Kconfig b/src/mainboard/google/veyron_danger/Kconfig
index 4c213f2..f8f31ab 100644
--- a/src/mainboard/google/veyron_danger/Kconfig
+++ b/src/mainboard/google/veyron_danger/Kconfig
@@ -71,4 +71,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON_DANGER
diff --git a/src/mainboard/google/veyron_jerry/Kconfig b/src/mainboard/google/veyron_jerry/Kconfig
index 1bbcf94..1e36e22 100644
--- a/src/mainboard/google/veyron_jerry/Kconfig
+++ b/src/mainboard/google/veyron_jerry/Kconfig
@@ -82,4 +82,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON_JERRY
diff --git a/src/mainboard/google/veyron_mickey/Kconfig b/src/mainboard/google/veyron_mickey/Kconfig
index bbe5f7d..efec03a 100644
--- a/src/mainboard/google/veyron_mickey/Kconfig
+++ b/src/mainboard/google/veyron_mickey/Kconfig
@@ -72,4 +72,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON_MICKEY
diff --git a/src/mainboard/google/veyron_mighty/Kconfig b/src/mainboard/google/veyron_mighty/Kconfig
index 4dad49c..40162b3 100644
--- a/src/mainboard/google/veyron_mighty/Kconfig
+++ b/src/mainboard/google/veyron_mighty/Kconfig
@@ -82,4 +82,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON_MIGHTY
diff --git a/src/mainboard/google/veyron_minnie/Kconfig b/src/mainboard/google/veyron_minnie/Kconfig
index f2cd87b..6735ca1 100644
--- a/src/mainboard/google/veyron_minnie/Kconfig
+++ b/src/mainboard/google/veyron_minnie/Kconfig
@@ -82,4 +82,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON_MINNIE
diff --git a/src/mainboard/google/veyron_pinky/Kconfig b/src/mainboard/google/veyron_pinky/Kconfig
index 5c6e7cd..68ad87c 100644
--- a/src/mainboard/google/veyron_pinky/Kconfig
+++ b/src/mainboard/google/veyron_pinky/Kconfig
@@ -82,4 +82,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON_PINKY
diff --git a/src/mainboard/google/veyron_rialto/Kconfig b/src/mainboard/google/veyron_rialto/Kconfig
index 0c72667..8feb331 100644
--- a/src/mainboard/google/veyron_rialto/Kconfig
+++ b/src/mainboard/google/veyron_rialto/Kconfig
@@ -72,4 +72,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON_RIALTO
diff --git a/src/mainboard/google/veyron_romy/Kconfig b/src/mainboard/google/veyron_romy/Kconfig
index 9cb6d89..85adb78 100644
--- a/src/mainboard/google/veyron_romy/Kconfig
+++ b/src/mainboard/google/veyron_romy/Kconfig
@@ -72,4 +72,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON_ROMY
diff --git a/src/mainboard/google/veyron_shark/Kconfig b/src/mainboard/google/veyron_shark/Kconfig
index 829fb85..4e4f167 100644
--- a/src/mainboard/google/veyron_shark/Kconfig
+++ b/src/mainboard/google/veyron_shark/Kconfig
@@ -82,4 +82,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON_SHARK
diff --git a/src/mainboard/google/veyron_speedy/Kconfig b/src/mainboard/google/veyron_speedy/Kconfig
index 411ea42..5fab628 100644
--- a/src/mainboard/google/veyron_speedy/Kconfig
+++ b/src/mainboard/google/veyron_speedy/Kconfig
@@ -82,4 +82,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON_SPEEDY



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