[LinuxBIOS] SPD as debug channel
stuge-linuxbios at cdy.org
Fri Dec 1 19:16:01 CET 2006
On Fri, Dec 01, 2006 at 09:10:08AM -0700, ron minnich wrote:
> > This is pretty special-purpose though. Perhaps time would be better
> > spent on the LPC thingy, since they can be used for testing too.
> I am missing something here. If we have enough of PCI up to do
> SPD->USB, I would bet that we have enough of it up to do USB debug?
> or not?
SPD as in instead of reading from an EEPROM on a DIMM you would be
talking to a I2C slave on a special DIMM-like board that sends data
to a host somehow.
The assumption was that not much needs to happen before the SPD I2C
bus is accessible by the CPU - is that valid?
If not, what IS easily accessible besides the boot ROM? (Which we
don't want to rely on since we don't know exactly what it will speak
when in the future.) We just need one bit that can do kHz signalling.
> LPC is going away on many boards, I understand.
But DDR(2) SDRAM will probably stay a while longer. Or not?
> I think that we are going into a world where we have to figure out
> usb debug port.
It's certainly one good debugging option but maybe not the only good
> I don't think that the PCI initial setup for USB debug is going to
> be impossible -- the vendors have to debug these boards too. All
> the boards I have used lately have a very straightforward path to
> USB, that could be set up in the ROMCC or CAR code.
I think it should be fairly simple on x86 too, but we would also like
more exotic systems in v3 so exploring other options is good.
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