[coreboot] v3 stage2 running from flash

ron minnich rminnich at gmail.com
Wed Dec 24 08:43:45 CET 2008

On Tue, Dec 23, 2008 at 9:13 PM, Corey Osgood <corey.osgood at gmail.com> wrote:

> What should I be doing where? I can enable, disable, or make the shadow ram
> dance like a monkey (yeah, Via hardware's got some odd features), but it
> makes no real difference in the boot speed.

I don't know but 15 mins means for certain you are not caching. I
would be interested to know how long each stage -- stage0, initram,
stage2 -- takes, can you get that info?

>> I wonder if moving mtrr out of stage0 was the right move?
> The only other option AFAIK is to go back to ROMCC, CAR uses those MTRRs and
> enabling them breaks CAR.

No, we don't need to go back to romcc, we need to figure this out.

First off, MTRRs will need to be properly set up once car is disabled.
I have this suspicion that you've removed the post-mtrr, pre-stage2
setup of mtrrs that is needed to make things go fast. I could be
wrong. But there is no question that your caching is not right.

> Is the whole flash copied to dram once, or are the segments copied as their
> needed? LAR is saying it's opening the segments directly from flash
> (0xfff00000).

no, it's not really saying that. It's telling you where it is looking
and where it found them. But stage2 is copied to RAM and executed. And
if stage 2 is taking more than, say, 30 seconds, then you have a very
serious problem. How long does stage 2 take?

But those numbers are what you get when no caching is turned on at all.


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