[coreboot] [PATCH]es 7 assorted fixes

Marc Jones Marc.Jones at amd.com
Thu Oct 23 00:31:35 CEST 2008

Thanks for the patches. I have acked and committed some of these. Please 
see my comments.

Jens Rottmann wrote:
> route_irq15.diff (changes pirq_routing.c):
> Fixes a off-by-one error when routing the IRQs. This led to IRQ15 not
> getting assigned.

Acked-by: Marc Jones <marc.jones at amd.com>

> autoboot_delay.diff (changes filo.c):
> Fixes compile error when AUTOBOOT_DELAY=0.

But this would break if AUTOBOOT_DELAY wasn't defined. Don't set 
AUTOBOOT_DELAY to 0 or do a more complete fix.

> dword_copy.diff (changes crt0.S.lb, cache_as_ram.inc (Geode LX)):
> Speed up copying coreboot to ram by using "movsl" instead of "movsb".
> Also use different console messages for copying and uncompressing, like
> it's already done in similar code in other places.

Acked-by: Marc Jones <marc.jones at amd.com>

> speed_calc.diff (changes raminit.c (Geode LX)):
> Changed RAM speed calculation to fix RAM modules getting rejected only
> due to integer rounding errors. Previously, the formula was:
> 	speed = 2 * (10000/spd_value)
> For spd_value=60 this means speed = 2 * 166 = 332, which is less than
> 333 and coreboot died saying RAM was incompatible. The new formula is:
> 	speed = 20000 / spd_value
> For spd_value=60, speed=333, which is fine.

Acked-by: Marc Jones <marc.jones at amd.com>

> await_ide.diff (changes ide.c):
> Made await_ide(), which polls for an ide status change, check the status
> reg much more often. In my case this reduced the time spent in coreboot
> by 1.5 sec!
> The timeout values of course aren't changed, only the granularity. Also,
> I didn't see any udelay() implementation that looked like it couldn't
> cope with 10 us delays. (Most are written as for (...) inb(0x80) loops.)

Acked-by: Marc Jones <marc.jones at amd.com>

> fs_arch.diff (changes ext2fs.c, fat.c):
> #if ARCH == 'i386' results in a compile error: character constant too
> long (or something alike). Changed it to
> #ifdef __i386
> I'm unsure if this is correct, though! Why didn't anyone hit this
> problem before? Is this some ROMCC-special?

I don't think anyone builds this so we wouldn't see it.  We just use 
filo. Can you send the build output?

> it8712_gpio.diff (changes superio.c (IT8712F)):
> Added the missing I/O resources for IT8712F GPIOs. Our boards need these
> e.g. to switch the com ports between RS232 and RS485.

> {&ops, IT8712F_GPIO, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IRQ0, {0xfff, 0}, {0xff8, 0}, {0xff8, 0},},

I think that PNP_IO1 should be 0xfff

{&ops, IT8712F_GPIO, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IRQ0, {0xfff, 0}, 
{0xfff, 0}, {0xff8, 0},},

Please send new patches for the ones that need it.


Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:Marc.Jones at amd.com

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