[coreboot] v3 HT
Carl-Daniel Hailfinger
c-d.hailfinger.devel.2006 at gmx.net
Tue Oct 28 00:25:24 CET 2008
The explanations by Tom and Marc made a few things clear for me:
- The physical HT structure is not what we want to model.
- The appearance of HT and topology in PCI config space is what matters.
- 18.0 is not a PCI bridge, don't pretend it is one
With that in mind, I'd like to propose another dts.
I know that it has its own quirks, but it can serve as a discussion point.
I'm pretty sure someone already posted a lspci -tn and lspci -n for the
Serengeti, but I can't find it in my mails right now. A pointer to the
archives and/or a repost would be appreciated.
Regards,
Carl-Daniel
/{
device_operations="serengeti";
mainboard_vendor = "AMD";
mainboard_name = "Serengeti";
cpus { };
apic at 0 {
};
domain at 0 {
/config/("northbridge/amd/k8/domain");
bus at 0{
pci at 18,0 {
/config/("northbridge/amd/k8/pci");
};
pci at 18,1 {};
pci at 18,2 {};
pci at 18,3 {};
};
bus at 1{
pci at 0,0 {
/config/("southbridge/amd/amd8111/pci.dts");
pci at 0,0{
/config/("southbridge/amd/amd8111/usb.dts");
};
pci at 0,1{
/config/("southbridge/amd/amd8111/usb.dts");
};
pci at 0,2{
/config/("southbridge/amd/amd8111/usb2.dts");
disable;
};
pci at 1,0{
/config/("southbridge/amd/amd8111/nic.dts");
disable;
};
};
pci at 1,0 {
/config/("southbridge/amd/amd8111/lpc.dts");
};
pci at 1,1 {
/config/("southbridge/amd/amd8111/ide.dts");
};
pci at 1,2 {
/config/("southbridge/amd/amd8111/smbus.dts");
};
pci at 1,3 {
/config/("southbridge/amd/amd8111/acpi.dts");
};
pci at 1,5 {
/config/("southbridge/amd/amd8111/ac97audio.dts");
};
pci at 1,6 {
/config/("southbridge/amd/amd8111/ac97modem.dts");
};
pci at 2,0 {
/config/("southbridge/amd/amd8132/pcix.dts");
};
};
ioport at 2e {
/config/("superio/winbond/w83627hf/dts");
com1enable = "1";
};
};
};
--
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