[coreboot] Problems porting H8dmr_fam10 to H8qme-2+
mylesgw at gmail.com
Tue Dec 29 17:50:27 CET 2009
> > Unfortunately, it's undocumented, so you have a couple of options:
> > 1. Look at http://www.coreboot.org/Nvidia_MCP55_Porting_Notes
> > 2. Decode the ACPI interrrupt assignments
> > Either way you may need to look at the interrupt assignments in Linux
> > when booted with the factory BIOS.
> I'm wondering if it isn't possible to just read those registers out once
> booted with a factory BIOS?
You can. You still have to make the mptable and irq table match, which
requires you to know what the values mean.
> Using SeaBios 5.0 it "accepts" level 8 for debugging, but still no luck
> with the vga initialization. It doesn't even seem to be SeaBios "fault"
> because Coreboot complains exactly the same story:
> PCI: 01:01.0 init
> CBFS: Could not find file pci1002,515e.rom
You could read the ROM, correct the signature, and put it in CBFS as
> On card, rom address for PCI: 01:01.0 = fc000000
> PCI Expansion ROM, signature 0x7373, INIT size 0xe600, data ptr 0x7373
> Incorrect Expansion ROM Header Signature 7373
You're right. It looks like the signature in your ROM is not coming out
correctly. You need to figure out why, or just try to ignore the bad
signature and see if you can get past it. In Linux with the factory BIOS
you could see if the signature is still broken.
> Another thing is a line from the booting linux:
> Found 2 Quad-Core AMD Opteron(tm) Processor 8350 processors (16 cpu
> cores) (version 2.20.00)
> But there are 4 and I thing that coreboot finds them. So here my
> question could these problems be related to my bad IRQ handling ?
I don't know where Linux got that information. It looks like it found all
16 cores, though.
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