[coreboot] Coreboot patches for v2 with SeaBIOS

Myles Watson mylesgw at gmail.com
Fri Feb 13 20:32:42 CET 2009


On Wed, Feb 11, 2009 at 10:01 AM, Rudolf Marek <r.marek at assembler.cz> wrote:
> Hi,
> http://www.coreboot.org/ACPI_in_coreboot
>
>
> Did you checked link above?
>
>> - I can't figure out the correspondence between pnp devices in
>> /proc/ioports and coreboot.  The ACPI device is missing, and I'm not
>> sure how to add it.  That causes problems when it tries to read the
>> timer specified in fadt.c.  If I remove the timer reference Linux
>> complains but continues until it breaks based on interrupt routing.
>
> You dont need ACPI device...
I wasn't clear.  I needed the address for the fadt pm_base.  Since
coreboot allocates it at 0x1000 and the factory BIOS allocates it at
0x8000 I was having a hard time finding it.

>
>> - The disassembled dsdt from the board doesn't match the way coreboot
>> configures the board, so I was trying to add my own based on another
>> board...
>>
>> - I don't see the relationship between /proc/interrupts and how to
>> generate the _PRT in the dsdt
>
> You need to check the MPTable/PIRQ the _PRT is just another way how to
> express the tables. Check the link above.
>
>> - I just want the bare minimum for now.  If there's something I should
>> disable to make it simpler, I'm happy to do that.
>
> Well, for Linux you can remove:
>
>
> +                       Method (_CRS, 0, NotSerialized)
> +                       {
> +                               Name (BUF0, ResourceTemplate ()
> +                               {
> +                               IO (Decode16,
> +                               0x0CF8, // Address Range Minimum
> +                               0x0CF8, // Address Range Maximum
> +                               0x01,   // Address Alignment
> +                               0x08,   // Address Length
> +                               )
> +                               WordIO (ResourceProducer, MinFixed,
> MaxFixed, PosDecode, EntireRange,
> +                               0x0000, // Address Space Granularity
> +                               0x0000, // Address Range Minimum
> +                               0x0CF7, // Address Range Maximum
> +                               0x0000, // Address Translation Offset
> +                               0x0CF8, // Address Length
> +                               ,, , TypeStatic)
> +                               })
> +                               /* Methods bellow use SSDT to get actual
> MMIO regs
> +                                * The IO ports are from 0xd00, optionally
> an VGA,
> +                                * otherwise the info from MMIO is used.
> +                                */
> +                               Concatenate (\_SB.GMEM (0x00,
> \_SB.PCI0.SBLK), BUF0, Local1)
> +                               Concatenate (\_SB.GIOR (0x00,
> \_SB.PCI0.SBLK), Local1, Local2)
> +                               Concatenate (\_SB.GWBN (0x00,
> \_SB.PCI0.SBLK), Local2, Local3)
> +                               Return (Local3)
> +                       }
>
> As well the  Include ("amdk8_util.asl")

It doesn't help to take this out, except that it removes this error:
 ACPI Error (psargs-0358): [SBLK] Namespace lookup failure, AE_NOT_FOUND
 ACPI Error (psparse-0530): Method parse/execution failed
[\_SB_.PCI0._CRS] (Node ffff88013fc01720), AE_NOT_FOUND

Do you get that error too, or was I supposed to change some value to
make it work?

>
>
> From mptable:
>
> 165     // Onboard ck804 SATA 0
> 166             smp_write_intsrc(mc, mp_INT,
> MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +7)<<2)|0,
> apicid_ck804, 0x17); // 23
> 167
> 168     // Onboard ck804 SATA 1
> 169             smp_write_intsrc(mc, mp_INT,
> MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +8)<<2)|0,
> apicid_ck804, 0x16); // 22
> 170
>
>
> The sbdn is static? Lets assume SBDN is 0 for now.

It is 0.

> for SATA 0 the _PR looks like this:
>
>  Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x17 }, //sata at 7.0 goes to IRQ
> 23

Thanks, that helped a lot.  I'm still not booting though.  I get this
error in the boot log, then the hard drives stop working.  The
interrupts shouldn't be at fault, because they match the mptable.

 ..TIMER: vector=0x30 apic1=0 pin1=0 apic2=-1 pin2=-1
 ..MP-BIOS bug: 8254 timer not connected to IO-APIC
 ...trying to set up timer (IRQ0) through the 8259A ...
 ..... (found apic 0 pin 0) ...
 ....... failed.
 ...trying to set up timer as Virtual Wire IRQ...
 ..... failed.
 ...trying to set up timer as ExtINT IRQ...
 ..... works.

Here's the first line from the acpi=off boot:
 ..TIMER: vector=0x30 apic1=0 pin1=0 apic2=0 pin2=0

Unfortunately I can't see where it gets set to correct it.

I'm attaching my latest dsdt file.  Thanks for guiding me through this!

Myles
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