[coreboot] slow load times

Myles Watson mylesgw at gmail.com
Thu Feb 19 05:47:29 CET 2009

> If we don't want to compile in a max, and it's not reasonable to
> autodetect it, then I guess we could have coreboot pass in the max to
> SeaBIOS via the coreboot table.

I like the PCI roots better.  It seems like there will always be a small
number of root buses.

> Finally, I suppose SeaBIOS could just scan all 256 buses.  (Does
> anyone know if a bus is guaranteed to have a device 0?  If so, that
> would speed the scan significantly.)

The AMD Serengeti board doesn't.  The 8111 has a base device number of 6.


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