[coreboot] cbfs XIP patch
peter at stuge.se
Tue May 5 19:50:03 CEST 2009
ron minnich wrote:
> > 'next' foils the desirable property that single files in cbfs can
> > be updated in the flash chip without touching any other regions.
> Isn't this somewhat mythical anyway?
> how many flash chips support 'erase byte' at this point (I honestly
> don't know!). I.e., isn't an update of any one byte in a block
> going to wipe out a whole block? How many cbfs files fit on neat
> 64k or 16k or whatever boundaries?
None have single byte erase blocks, but most of the SPI flash chips
can actually do 256 byte erase blocks.
I think it is important to keep the alignment in mind, so that files
can be fit onto boundaries. I also think we should try to do it in
the normal case.
I keep imagining how I will be able to safely update the coreboot
normal image but keep fallback, stages and payloads untouched.
Another factor is that this is something our competition already
allows, so we want to do it as well.
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