[coreboot] [PATCH] flashrom: Trim default ICH SPI delay from 1000 to 10 microseconds
c-d.hailfinger.devel.2006 at gmx.net
Sat May 9 09:24:55 CEST 2009
On 09.05.2009 05:42, Myles Watson wrote:
> On Thu, May 7, 2009 at 6:45 PM, Carl-Daniel Hailfinger
> <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>> Trim default ICH SPI delay from 1000 to 10 microseconds. Since many
>> commands take around 10 microseconds to complete, it is totally
>> pointless to wait for 1000 microseconds before checking the status again.
>> This patch is tested and reduced write time on ICH7 with SST25VF080B
>> from over one hour to 62 seconds.
>> Thanks to Ali Nadalizadeh for testing!
>> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> Acked-by: Myles Watson <mylesgw at gmail.com>
> I like the 1 hour to 62 seconds.
Thanks, committed in r487.
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