[coreboot] [commit] r5965 - trunk/src/southbridge/amd/sb700

repository service svn at coreboot.org
Mon Oct 18 06:01:12 CEST 2010


Author: sduplichan
Date: Mon Oct 18 06:01:12 2010
New Revision: 5965
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5965

Log:
This patch enables SB700 option PrefetchEnSPIFromHost in early setup.
It affects only systems booting from SPI flash, not those booting from
LPC flash. By default, the SB700 reads dwords from the SPI flash chip.
Setting PrefetchEnSPIFromHost causes the SB700 to read entire cache
lines from the flash chip. 

Signed-off-by: Scott Duplichan <scott at notabs.org>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/src/southbridge/amd/sb700/sb700_early_setup.c

Modified: trunk/src/southbridge/amd/sb700/sb700_early_setup.c
==============================================================================
--- trunk/src/southbridge/amd/sb700/sb700_early_setup.c	Mon Oct 18 02:21:39 2010	(r5964)
+++ trunk/src/southbridge/amd/sb700/sb700_early_setup.c	Mon Oct 18 06:01:12 2010	(r5965)
@@ -129,6 +129,11 @@
 	reg8 |= (1 << 5) | (1 << 6);
 	pci_write_config8(dev, 0x47, reg8);
 
+	/* Enable PrefetchEnSPIFromHost to speed up SPI flash read (does not affect LPC) */
+	reg8 = pci_read_config8(dev, 0xbb);
+	reg8 |= 1 << 0;
+	pci_write_config8(dev, 0xbb, reg8);
+
 	/* SuperIO, LPC ROM */
 	reg8 = pci_read_config8(dev, 0x48);
 	/* Decode ports 0x2e-0x2f, 0x4e-0x4f (SuperI/O configuration) */




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