[coreboot] 870 attempt
scott at notabs.org
Thu Feb 24 18:07:04 CET 2011
From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org] On Behalf Of Marc Jones
Sent: Thursday, February 24, 2011 10:45 AM
To: Jonathan A. Kollasch
Cc: coreboot at coreboot.org
Subject: Re: [coreboot] 870 attempt
On Thu, Feb 24, 2011 at 7:23 AM, Jonathan A. Kollasch
<jakllsch at kollasch.net> wrote:
> On Thu, Feb 24, 2011 at 02:14:07AM +0000, Jonathan A. Kollasch wrote:
>> I've attempted to use the rs780 and sb800 code on a AM3 870 + SB850
>> board. Raminit seems to go okay, as does the first bits of ramstage.
>> However, ramstage fails after the first two passes through
>> rs780_enable(). It stalls in get_vid_did() reading PCI config space
>> of device 2 (or 4). Also, the rs780 HT init code thinks the link should
>> run at 200MHz, maybe that's related.
> Attached is the diff, and console output there from.
> (Mainboard directory is a svn cp of bimini_fam10.)
>rs780_htinit: HT1 mode
]It looks it had problems getting the HT frequency from the CPU. Both
]sides have to agree on what is capable. You may need to look at the
]CPU HT code for a hint on why it reports what it does to the SB.
Also remember that the family 10h swap list problem still exists.
There are some old patches and discussion that might be useful.
Here is an example:
More information about the coreboot