[coreboot] Getting serial output from w83627hf?
Alp Eren Köse
alperenkose at buyutech.com.tr
Tue Oct 18 11:25:23 CEST 2011
Hi thanks all for your help,
I have arranged the "devicetree.cb" as suggested, you can see it at the
attachment.
Put the superio chip under the LPC bridge section, but I didn't get how did
you know it?
Added those to the romstage.c:
> #include "superio/winbond/w83627hf/early_serial.c"
> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
> w83627hf_set_clksel_48(SERIAL_DEV);
main() looks like this now:
....... // omitted
sch_enable_lpc();
w83627hf_set_clksel_48(SERIAL_DEV); // NEWLY ADDED
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); // NEWLY ADDED
uart_init(); // NEWLY ADDED
console_init();
printk(BIOS_DEBUG, "\n"); // NEWLY ADDED
....... // omitted
> The bit that controls the clock speed is in CR24.
But what about this, I don't know where CR24 is and how to set it? Sorry I
am just really new in such stuff :s
> SCH boards don't use the serial port but the EHCI debug port to show
output on? See src/mainboard
> /iwave/iWRainbowG6/devicetree.cb, it doesn't have the superio included.
So does it mean I won't be able to get output from the serial port on this
device for debugging?
> Can you show the output from "superiotool -deV" too? Thanks.
Sure you can find the output in the attachment.
By the way all I get is \0x00 when I open the board and another \0x00 when I
close it..
Thanks in advance,
Alp
2011/10/17 Idwer Vollering <vidwer at gmail.com>
> Comments inline:
>
> 2011/10/17 Idwer Vollering <vidwer at gmail.com>
>
>>
>>
>> 2011/10/17 Alp Eren Köse <alperenkose at buyutech.com.tr>
>>
>>> Hi all,
>>>
>>> I can't get serial output from the board I am trying to put coreboot on,
>>> so I am not able to go any further to see whats going on..
>>>
>>
>>> The board has a Winbond W83627HF/F/HG/G (id=0x52, rev=0x41) at 0x2e.
>>>
>>
>> It is likely that you need to set the serial port's speed in romstage.c:
>>
>> // omitting includes, license header
>> #include "superio/winbond/w83627hf/early_serial.c"
>> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
>>
>> Add this line to main():
>> w83627hf_set_clksel_48(SERIAL_DEV);
>>
>
> The bit that controls the clock speed is in CR24.
>
>
>>
>>
>>>
>>> I couldn't figure out where to put the "chip superio/winbond/w83627hf"
>>> section in the "devicetree.cb" file layout?
>>>
>>
>> SCH boards don't use the serial port but the EHCI debug port to show
>> output on? See src/mainboard/iwave/iWRainbowG6/devicetree.cb, it doesn't
>> have the superio included.
>>
>> What I would do is put it inside the LPC bridge section, note that I don't
>> know how the superio is actually attached and therefore could be wrong.
>> So:
>> chip southbridge/intel/i82801ex
>>
>
> Replace i82801ex with sch, ofcourse.
>
>
>> device pci 1f.0 on # lpc bridge
>> chip superio/winbond/w83627hf
>> end # superio
>> end # 1f.0
>>
>>
>>
>>> Could someone please explain the devicetree.cb file structure? or point
>>> a way?
>>>
>>> The "lspci -tvnn" output and my modified "devicetree.cb" file are at the
>>> attachment.
>>>
>>
> Can you show the output from "superiotool -deV" too? Thanks.
>
>
>>> Thanks in advance,
>>> Alp
>>>
>>> --
>>> coreboot mailing list: coreboot at coreboot.org
>>> http://www.coreboot.org/mailman/listinfo/coreboot
>>>
>>
>>
>
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>
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chip northbridge/intel/sch
device lapic_cluster 0 on
chip cpu/intel/socket_441
device lapic 0 on end
end
end
device pci_domain 0 on
device pci 00.0 on end # host bridge
device pci 02.0 on end # Integrated Graphics and Video Device
chip southbridge/intel/sch
# register "pirqa_routing" = "0xa"
# register "pirqb_routing" = "0xb"
# register "pirqc_routing" = "0x5"
# register "pirqd_routing" = "0xf"
# register "pirqe_routing" = "0x80"
# register "pirqf_routing" = "0x80"
# register "pirqg_routing" = "0x80"
# register "pirqh_routing" = "0x80"
device pci 1a.0 on end # 26 0 USB Client
device pci 1b.0 on end # 27 0 HD Audio Controller
device pci 1c.0 on end # 28 0 PCI Express Port 1
device pci 1c.1 on end # 28 1 PCI Express Port 2
device pci 1d.0 on end # USB Classic UHCI Controller 1
device pci 1d.1 on end # USB Classic UHCI Controller 2
device pci 1d.2 on end # USB Classic UHCI Controller 3
device pci 1d.7 on end # USB2 EHCI Controller
device pci 1e.0 on end # SDIO/MMC Port 0
device pci 1e.1 on end # SDIO/MMC Port 1
device pci 1e.2 on end # SDIO/MMC Port 2
device pci 1f.0 on # LPC bridge
chip superio/winbond/w83627hf
device pnp 2e.0 on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
device pnp 2e.1 off # Parallel Port
io 0x60 = 0x378
irq 0x70 = 7
end
device pnp 2e.2 on # Com1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.3 off # Com2
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 2e.5 on # Keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
irq 0x72 = 12
end
device pnp 2e.6 off # CIR
io 0x60 = 0x100
end
device pnp 2e.7 off # GAME_MIDI_GIPO1
io 0x60 = 0x220
io 0x62 = 0x300
irq 0x70 = 9
end
device pnp 2e.8 off end # GPIO2
device pnp 2e.9 off end # GPIO3
device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor
io 0x60 = 0x290
irq 0x70 = 5
end
end
end
device pci 1f.1 on end # PATA Controller
end
end
end
-------------- next part --------------
superiotool r6637
Probing for ALi Super I/O at 0x3f0...
Failed. Returned data: id=0xffff, rev=0xff
Probing for ALi Super I/O at 0x370...
Failed. Returned data: id=0xffff, rev=0xff
Probing for Fintek Super I/O at 0x2e...
Failed. Returned data: vid=0xc0fe, id=0x4152
Probing for Fintek Super I/O at 0x4e...
Failed. Returned data: vid=0xffff, id=0xffff
Probing for Fintek Super I/O at 0x2e...
Failed. Returned data: vid=0xffff, id=0xffff
Probing for Fintek Super I/O at 0x4e...
Failed. Returned data: vid=0xffff, id=0xffff
Probing for ITE Super I/O (init=standard) at 0x25e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8502e) at 0x25e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8761e) at 0x25e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8228e) at 0x25e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=0x87,0x87) at 0x25e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=standard) at 0x2e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8502e) at 0x2e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8761e) at 0x2e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8228e) at 0x2e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=0x87,0x87) at 0x2e...
Failed. Returned data: id=0x5241, rev=0xf
Probing for ITE Super I/O (init=standard) at 0x4e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8502e) at 0x4e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8761e) at 0x4e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8228e) at 0x4e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=0x87,0x87) at 0x4e...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=legacy/it8661f) at 0x370...
Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=legacy/it8671f) at 0x370...
Failed. Returned data: id=0xffff, rev=0xf
Probing for NSC Super I/O at 0x2e...
Failed. Returned data: port=0xff, port+1=0xff
Probing for NSC Super I/O at 0x4e...
Failed. Returned data: port=0xff, port+1=0xff
Probing for NSC Super I/O at 0x15c...
Failed. Returned data: port=0xff, port+1=0xff
Probing for NSC Super I/O at 0x164e...
Failed. Returned data: port=0xff, port+1=0xff
Probing for Nuvoton Super I/O at 0x164e...
Failed. Returned data: chip_id=0xffff
Probing for Nuvoton Super I/O (sid=0xfc) at 0x164e...
Failed. Returned data: sid=0xff, id=0xffff, rev=0x00
Probing for Nuvoton Super I/O at 0x2e...
Failed. Returned data: chip_id=0x5241
Probing for Nuvoton Super I/O (sid=0xfc) at 0x2e...
Failed. Returned data: sid=0xff, id=0x5241, rev=0x00
Probing for Nuvoton Super I/O at 0x4e...
Failed. Returned data: chip_id=0xffff
Probing for Nuvoton Super I/O (sid=0xfc) at 0x4e...
Failed. Returned data: sid=0xff, id=0xffff, rev=0x00
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e...
Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e...
Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e...
Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e...
Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e...
Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e...
Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e...
Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e...
Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0...
Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0...
Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370...
Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370...
Failed. Returned data: id=0xff, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x2e...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x2e...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e...
Found Winbond W83627HF/F/HG/G (id=0x52, rev=0x41) at 0x2e
Register dump:
idx 02 20 21 22 23 24 25 26 28 29 2a 2b 2c 2e 2f
val ff 52 41 ff fe c0 00 00 00 00 fe c0 ff 00 ff
def 00 52 NA ff 00 MM 00 00 00 00 7c c0 00 00 00
LDN 0x00 (Floppy)
idx 30 60 61 70 74 f0 f1 f2 f4 f5
val 00 00 00 00 04 0e 00 ff 00 00
def 01 03 f0 06 02 0e 00 ff 00 00
LDN 0x01 (Parallel port)
idx 30 60 61 70 74 f0
val 00 00 00 00 04 38
def 01 03 78 07 04 3f
LDN 0x02 (COM1)
idx 30 60 61 70 f0
val 01 03 f8 04 00
def 01 03 f8 04 00
LDN 0x03 (COM2)
idx 30 60 61 70 f0 f1
val 00 00 00 00 00 00
def 01 02 f8 03 00 00
LDN 0x05 (Keyboard)
idx 30 60 61 62 63 70 72 f0
val 01 00 60 00 64 01 00 80
def 01 00 60 00 64 01 0c 80
LDN 0x06 (Consumer IR)
idx 30 60 61 70
val 00 00 00 00
def 00 00 00 00
LDN 0x07 (Game port, MIDI port, GPIO 1)
idx 30 60 61 62 63 70 f0 f1 f2
val 01 00 00 00 00 00 00 ff 00
def 00 02 01 03 30 09 ff 00 00
LDN 0x08 (GPIO 2, watchdog timer)
idx 30 f0 f1 f2 f3 f5 f6 f6 f7
val 00 ff ff ff 00 00 00 00 00
def 00 ff 00 00 00 00 00 00 00
LDN 0x09 (GPIO 3)
idx 30 f0 f1 f2 f3
val 00 ff ff ff 00
def 00 ff 00 00 00
LDN 0x0a (ACPI)
idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f3 f4 f6 f7 f9 fe ff
val 00 00 00 00 00 00 00 00 00 00 00 af 32 01 00 00 00 00 00
def 00 00 00 00 NA NA 00 00 00 00 00 00 00 00 00 00 00 00 00
LDN 0x0b (Hardware monitor)
idx 30 60 61 70 f0
val 01 02 90 00 00
def 00 00 00 00 00
Hardware monitor (0x0295)
Probing for Winbond Super I/O (init=0x88) at 0x4e...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x4e...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x3f0...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x3f0...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x370...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x370...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x370...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x370...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x250...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x250...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x250...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x250...
Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for VIA Super I/O at 0x3f0...
PCI device 1106:0686 not found.
Probing for Server Engines Super I/O at 0x2e...
Failed. Returned data: id=0xffff, rev=0xff
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