[coreboot] New patch to review for coreboot: 9e467ca northbridge/sch: don't overwrite hightables with GPU / TSEG memory

Sebastian Andrzej Siewior (sebastian@breakpoint.cc) gerrit at coreboot.org
Fri Oct 26 19:16:33 CEST 2012

Sebastian Andrzej Siewior (sebastian at breakpoint.cc) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1627


commit 9e467ca71a7eb2f1d723a7880a6eda635b4bc7eb
Author: Sebastian Andrzej Siewior <bigeasy at linutronix.de>
Date:   Fri Oct 26 19:00:22 2012 +0200

    northbridge/sch: don't overwrite hightables with GPU / TSEG memory
    Without this, the hightables are placed just before the end of memory.
    However we might have the GPU memory located at the exact same spot,
    that is in the last 4 MiB. So without this patch, this area won't remain
    marked as "CONFIGURATION TABLES" within coreboot's memory table but
    becomes "RESERVED" because it is part of the PCI(2,0) device.
    Change-Id: Ibd111c167c2f6ac03b0ba68581a74ecbd2c9c160
    Signed-off-by: Sebastian Andrzej Siewior <bigeasy at linutronix.de>
 src/northbridge/intel/sch/northbridge.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c
index 16ada2f..fb3bff8 100644
--- a/src/northbridge/intel/sch/northbridge.c
+++ b/src/northbridge/intel/sch/northbridge.c
@@ -188,7 +188,9 @@ static void pci_domain_set_resources(device_t dev)
 	/* Leave some space for ACPI, PIRQ and MP tables. */
-	high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
+	high_tables_base = tomk * 1024 - HIGH_MEMORY_SIZE;
+	high_tables_base -= uma_memory_size;
+	high_tables_base -= tseg_memory_base;
 	high_tables_size = HIGH_MEMORY_SIZE;

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