[coreboot] "Time out waiting for P-state 1" / GA-MA785GMT-UD2H + AMD Phenom II X4 955
marcj303 at gmail.com
Thu Mar 14 19:01:25 CET 2013
On Thu, Mar 14, 2013 at 11:34 AM, George Chriss <gschriss at gmail.com> wrote:
> I'm attempting to use Coreboot with a Gigabyte GA-MA785GMT-UD2H (rev
> 1.1) board -- listed on the 'Supported boards' list -- with an AMD
> Phenom II X4 955 (HDZ955FBGIBOX) processor. Proprietary VGA BIOS
> extraction, building, flashing, and DualBIOS recovery all work well.
> The board coreboots reasonably well with a Athlon II X2 245 processor.
> Debug log output:
> coreboot / GA-MA785GMT-UD2H / Athlon II X2 245
> coreboot dmesg / GA-MA785GMT-UD2H / Athlon II X2 245
> However with the Phenom II X4 processor Coreboot times out with " Time
> out waiting for P-state 1. Current P-state 0...":
> coreboot debug log / Gigabyte GA-MA785GMT-UD2H
> Related commit:
> [coreboot] [commit] r6401 ... cpu/amd/model_10xxx
> "+ /* paranoia ? I fear when we run fixPsNbVidBeforeWR we can enter a
> + * P1 that is a copy of P0, therefore has the same NB DID but the
> + * TSC will count twice per tick, so we have to wait for twice the
> + * count to achieve the desired timeout. But I'm likely to
> + * misunderstand this...
> + */"
> It's OK in my case to have the processor remain in P0 indefinably.
> Any patch suggestions?
> coreboot mailing list: coreboot at coreboot.org
In P0, it will always run hot, but there shouldn't be a problem. It
will still do suspend on halt when it is not working on a thread.
You may want to instrument that section further to see what it is
trying to do with other Pstates. You may also lengthen the timeout. As
the comment mentions, you should look at the BKDG, there may have been
a change for that version of silicon.
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