The wiki is being retired!
Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
Tested on a MacBook2,1 (Mid 2007) 2.0 GHz Core 2 Duo, Model No: A1181 (EMC 2139) with GRUB2 payload.
The tested machine is as described here:  with the one difference that the vendor's EFI architecture in fact is 32-Bit.
The port might work as well, but is not yet tested on MacBook2,1 (Late 2006) and MacBook1,1. The latter might require small code modifications, e.g. for DMI machine identification.
UPDATE: MacBook1,1 does work, but required external flashing for initial install. (see notes on libreboot.org/docs or dev.libreboot.org/docs) (also, see notes about cpu temperatures / fan speeds)
- GRUB2 works
- no other payload tested yet
- GNU/Linux-libre works
- GNU/Linux works
- OS X and Windows dont work (yet?)
Issues under GNU/Linux-libre and GNU/Linux:
- The machine's one and only led lights up during boot which is fine. At some point during or after boot it should turn off though. At the moment it just stays turned on for ever. During suspend to RAM, the led blinks which is just nice. After resume from suspend to RAM the led turn off. This is what should happen after a normal boot too.
- mic-in and internal mics are pretty soft
- "00:07.0 Performance counters : Intel Corporation Device [8086:27a3] (rev 03)" is hidden under coreboot. What's its function anyway?
- No wake on LID in S3
- Suspend to disk aka hibernate works. Although:
- While it goes into hibernate state the screen turns off but then turns on again for just about a few seconds before it finaly turns off.
- When resuming/powering on, the keyboard is dead in the payload/GRUB2. Since my GRUB2 image is configured to boot a default menu entry after a few seconds of no user input, it then starts GNU/Linux-libre nicely. That is, the keyboard works to enter for example the LUKS passphrase which then unlocks the swap partition and the machine's state from before hibernate gets restored.
- Since I never used hibernate before, I can not say if the described behaviour is just normal or an issue.
Tested and works:
- RAM 3 GB (1x2 GB + 1x1 GB), 1GB (2 x 512M)
- Sound (internal speakers, headphones, microphone, external microphone)
- External USB connectors
- Suspend to RAM
- Decrease and increase the screen backlight works
- *Optical drive
- Webcam (needs non-free driver, so it does not work with Linux-libre)
- Internal HDD
- External Firewire connector
- External monitor connector
- Infrared receiver
Not yet merged into master. It's under review and will be improved. See
When starting without any
.config file you might want to configure coreboot by
At a minimum make the following selections:
Mainboard ---> Mainboard vendor ---> Apple Mainboard model ---> MacBook2,1 Devices ---> [*] Use native graphics initialization Payload ---> Add a payload ---> An ELF executable payload Payload path and filename # Insert the path and filename to # the standalone GRUB2 image to be used
Moreover, you might want to disable the usage of CPU microcode:
Chipset ---> *** CPU *** Include CPU microcode in CBFS ---> Do not include microcode updates
Identify the flash chip
Make sure flashrom can identify the flash chip:
# flashrom --verbose --programmer internal:laptop=force_I_want_a_brick >flashrom_info.log
The output should involve:
... DMI string system-manufacturer: "Apple Inc." DMI string system-product-name: "MacBook2,1" DMI string system-version: "1.0" DMI string baseboard-manufacturer: "Apple Inc." DMI string baseboard-product-name: "Mac-F4208CAA" DMI string baseboard-version: "PVT" DMI string chassis-type: "Notebook" Laptop detected via DMI. Found chipset "Intel ICH7M" with PCI ID 8086:27b9. Enabling flash write... ... Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541 Found SST flash chip "SST25VF016B" (2048 kB, SPI) at physical address 0xffe00000. Chip status register is 0x1c. Chip status register: Block Protect Write Disable (BPL) is not set Chip status register: Auto Address Increment Programming (AAI) is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is set Chip status register: Block Protect 1 (BP1) is set Chip status register: Block Protect 0 (BP0) is set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Resulting block protection : all ... Found SST flash chip "SST25VF016B" (2048 kB, SPI). No operations were specified. ...
If it does not find this very same chip but rather finds a different chip or none at all: stop here and think twice.
Read the vendor BIOS
Read the vendor BIOS and store it in a safe place (possibly at two different places outside the MacBook).
# flashrom --verbose --programmer internal:laptop=force_I_want_a_brick --chip SST25VF016B \ --read rom.bin >flashrom_read.log 2>&1
The output should involve:
... Found SST flash chip "SST25VF016B" (2048 kB, SPI) at physical address 0xffe00000. ... Resulting block protection : none Reading flash... done. ...
Note, the following won't work on the Macbook1,1 (external flashing required). disassembly guides here
# flashrom --verbose --programmer internal:laptop=force_I_want_a_brick --chip SST25VF016B \ --write coreboot.rom >flashrom_write.log 2>&1
The output should involve:
... Found SST flash chip "SST25VF016B" (2048 kB, SPI) at physical address 0xffe00000. ... Resulting block protection : none coreboot last image size (not ROM size) is 2097152 bytes. Manufacturer: Apple Mainboard ID: MacBook2,1 Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:ETransaction error! Running OPCODE 0x20 failed at address 0x000000 (payload length was 0). spi_block_erase_20 failed during command execution at address 0x0 Reading current flash chip contents... done. Looking for another erase function. Trying erase function 1... 0x000000-0x007fff:ETransaction error! Running OPCODE 0x52 failed at address 0x000000 (payload length was 0). spi_block_erase_52 failed during command execution at address 0x0 Reading current flash chip contents... done. Looking for another erase function. Trying erase function 2... 0x000000-0x00ffff:ETransaction error! Running OPCODE 0xd8 failed at address 0x000000 (payload length was 0). spi_block_erase_d8 failed during command execution at address 0x0 Reading current flash chip contents... done. Looking for another erase function. Trying erase function 3... 0x000000-0x1fffff:EW Erase/write done. Verifying flash... VERIFIED. ...
Once coreboot is installed, flashing an update coreboot version or reverting back to the vendor BIOS works with and without the
Add it to flashrom's whitelist
MacBook2,1 can be added to flashrom's whitelist with this patch: , so that the
laptop=force_I_want_a_brick switch is no longer required when running the machine under the vendor's BIOS.