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Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
|CPU works||OK||Tested: AMD Athlon64 X2 250.|
|L1 cache enabled||Untested||Not tested yet|
|L2 cache enabled||Untested||Not tested yet|
|L3 cache enabled||N/A|
|Multiple CPU support||N/A|
|Hardware virtualization||OK||KVM seem to work|
|DDR3||OK||2G works, 4G(2 * 2G) works with lastest coreboot|
|Dual channel support||Untested|
|On-board IDE 3.5"||OK||Tested: 500GB HDD|
|On-board IDE 2.5"||N/A|
|On-board SATA||OK||Tested some ports, works fine|
|On-board USB||OK||USB keyboard works|
|On-board VGA||OK||Tested:analog VGA and HDMI,dual screen.|
|On-board Audio||No||Linux driver crashes.|
|On-board Smartcard reader||N/A|
|On-board SD card reader||N/A|
|ISA add-on cards||N/A|
|Audio/Modem-Riser (AMR/CNR) cards||N/A|
|PCI add-on cards||OK||I've an ath9k wifi PCI card and it works.|
|Mini-PCI add-on cards||N/A|
|Mini-PCI-Express add-on cards||Unknown|
|PCI-X add-on cards||N/A|
|AGP graphics cards||N/A|
|PCI Express x1 add-on cards||Untested|
|PCI Express x2 add-on cards||N/A|
|PCI Express x4 add-on cards||N/A|
|PCI Express x8 add-on cards||N/A|
|PCI Express x16 add-on cards||WIP||a clean way to merge the patch must be found.|
|PCI Express x32 add-on cards||Unknown|
|HTX add-on cards||N/A|
|Legacy / Super I/O|
|Floppy||N/A||There is no floppy connector at all.|
|Serial port 1 (COM1)||OK||COM1 is only pin header on board. DB-9 serial connector is available, but not included with board.|
|Serial port 2 (COM2)||N/A|
|Parallel port||Untested||No connector, pins on board only|
|Sensors / fan control||Untested|
|CPU frequency scaling||OK||works in GNU/Linux|
|Other powersaving features||Untested|
|High precision event timers (HPET)|
|Random number generator (RNG)||Untested|
|Wake on modem ring||Untested|
|Wake on LAN|
|Wake on keyboard||Untested|
|Wake on mouse||Untested|
|Flashrom||OK||The chip is SPI|
This pages is about the port to the M4A785T-M, this mainboard is very similar to the M4A785-M, but:
- it has DDR3 instead of DDR2
Building the serial port adapter
You'll need to build a serial port adapter to get the coreboot logs during.
Here's a picture of the serial port connector on the mainboard:
And here's the kind of cable you will need:
And you'll need to build a cable similar to this one(on the picture the DB9 is connector is a male connector):
Here's how it looks like on the mainboard:
_____________________ | |NC|09| |08|07| |06|05| |04|03| |02|01| | |
Here's a table of corresponding pins:
|Mainboard connector pin||Mainboard pin Function||Standard DE9 pin connector||Standard DE9 pin Function||Mandatory for coreboot|
|2||RX||3||TX||Yes (you could do without but it's advised to get it, to be able to use certain functions of coreboot)|
Before booting with coreboot, do the following:
- blacklist the snd-hda* modules (refer to the usual way to get help for the GNU/Linux distribution you want to run for doing that)
- 32bit GNU/Linux trisquel distribution tested
- 64bit GNU/Linux trisquel distribution failed to initialize the USB.
To build coreboot for this mainboard:
- checkout coreboot revision 1b1309f289d6fc9f6ec348686665d25218535030
- Configure and Build it as usual(for having graphics you need to extract your VGA BIOS ROM from your BIOS)
- the -pae kernel didn't boot my LUKS hdd(failed at cryptsetup password entering)... => using a -generic kernel worked(however that sees only 2772M in htop(I've 4GB))
- if you remove the PCIe card, the integrated ATI card won't come up...
- you only see the external graphic card in lspci, like with the BIOS, which seem to be the way to go...
From ab15ce791543cb0c1a09317962fe6bdc79e4e1b3 Mon Sep 17 00:00:00 2001 From: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Date: Tue, 18 Sep 2012 19:35:44 +0200 Subject: [PATCH] IRQ tables for getting the PCIe graphic card working Thanks a lot for the help trough IRC in the #coreboot channel on the Freenode servers. Change-Id: Ie99ee5adaf997cb94c96eb1942d1089ab2528f85 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> --- src/mainboard/asus/m4a785t-m/devicetree.cb | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mainboard/asus/m4a785t-m/devicetree.cb b/src/mainboard/asus/m4a785t-m/devicetree.cb index e8764b1..7095afd 100644 --- a/src/mainboard/asus/m4a785t-m/devicetree.cb +++ b/src/mainboard/asus/m4a785t-m/devicetree.cb @@ -10,8 +10,8 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.0 on # northbridge chip southbridge/amd/rs780 device pci 0.0 on end # HT 0x9600 - device pci 1.0 on end # Internal Graphics P2P bridge 0x9602 - device pci 2.0 off end # PCIE P2P bridge (external graphics) 0x9603 + device pci 1.0 off end # Internal Graphics P2P bridge 0x9602 + device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603 device pci 3.0 off end # PCIE P2P bridge 0x960b device pci 4.0 off end # PCIE P2P bridge 0x9604 device pci 5.0 off end # PCIE P2P bridge 0x9605 @@ -24,7 +24,7 @@ chip northbridge/amd/amdfam10/root_complex register "gpp_configuration" = "3" # Configuration D default register "port_enable" = "0x6fc" register "gfx_dev2_dev3" = "1" - register "gfx_dual_slot" = "2" + register "gfx_dual_slot" = "0" register "gfx_lane_reversal" = "0" register "gfx_tmds" = "0" -- 126.96.36.199
diff --git a/src/mainboard/asus/m4a785t-m/devicetree.cb b/src/mainboard/asus/m4a785t-m/devicetree.cb index e8764b1..905e5d3 100644 --- a/src/mainboard/asus/m4a785t-m/devicetree.cb +++ b/src/mainboard/asus/m4a785t-m/devicetree.cb @@ -11,7 +11,7 @@ chip northbridge/amd/amdfam10/root_complex chip southbridge/amd/rs780 device pci 0.0 on end # HT 0x9600 device pci 1.0 on end # Internal Graphics P2P bridge 0x9602 - device pci 2.0 off end # PCIE P2P bridge (external graphics) 0x9603 + device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603 device pci 3.0 off end # PCIE P2P bridge 0x960b device pci 4.0 off end # PCIE P2P bridge 0x9604 device pci 5.0 off end # PCIE P2P bridge 0x9605 @@ -24,7 +24,7 @@ chip northbridge/amd/amdfam10/root_complex register "gpp_configuration" = "3" # Configuration D default register "port_enable" = "0x6fc" register "gfx_dev2_dev3" = "1" - register "gfx_dual_slot" = "2" + register "gfx_dual_slot" = "0" register "gfx_lane_reversal" = "0" register "gfx_tmds" = "0"
- Selecting the ASUS M4A77TD-PRO mainboard makes the serialICE shell appear once flashed(however running the BIOS under SerialICE fails at some point).
git clone http://review.coreboot.org/p/serialice.git cd serialice make menuconfig make
- Add defaults for the nvram settings.
- find a clean way to merge the patch for the PCIe graphic card.
- fix the Audio CODEC(it's the same than the x60 and it works on the x60).
- handle suspend to ram
- lock SMM/SMI
- make it possible to run the BIOS under serialICE
- 64bit support