The wiki is being retired!
Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
The BCOM WinNET100 mainboard was sold by IGEL some years ago as their product IGEL-316. Their product was a Linux based terminal to work remotely with Windows and X. The hardware is still available nowadays via eBay for ca. 30-40 Euros.
|CPU works||OK||Geode GX1, Pentium 1 like, MMX support, no MTRR.|
|L1 cache enabled||OK||16kiB unified cache (12kiB when X11 is running).|
|L2 cache enabled||N/A||This CPU does not support L2 cache.|
|L3 cache enabled||N/A|
|Multiple CPU support||N/A|
|SDRAM||N/A||No DIMM socket.|
|SO-DIMM||OK||Tested with 32MiB, 64MiB and 128MiB modules at 85MHz (CPU core clock / 3,5).|
|Dual channel support||N/A|
|On-board IDE 3.5"||N/A|
|On-board IDE 2.5"||OK||Tested with 2.5" disk.|
|On-board USB||OK||Tested with irqpoll kernel parameter. Tested: USB thumb drive.|
|On-board VGA||OK||VGA support in LinuxBIOS works fine (e.g. for displaying a boot logo), for console/X11 you need a special kernel console and Xorg driver.|
|On-board Ethernet||OK||Tested with irqpoll kernel parameter.|
|On-board Audio||OK||Tested with a special realtime SMI polling (no regular IRQs from the audio hardware) and Kahlua ALSA driver.|
|On-board Smartcard reader||Unknown||Probably won't work in Linux as there are no public datasheets .|
|On-board SD card reader||N/A|
|ISA add-on cards||N/A|
|Audio/Modem-Riser (AMR/CNR) cards||N/A|
|PCI add-on cards||N/A|
|Mini-PCI add-on cards||Unknown|
|Mini-PCI-Express add-on cards||Unknown|
|PCI-X add-on cards||Unknown|
|AGP graphics cards||N/A|
|PCI Express x1 add-on cards||N/A|
|PCI Express x2 add-on cards||N/A|
|PCI Express x4 add-on cards||N/A|
|PCI Express x8 add-on cards||N/A|
|PCI Express x16 add-on cards||N/A|
|PCI Express x32 add-on cards||N/A|
|HTX add-on cards||N/A|
|Legacy / Super I/O|
|Serial port 1 (COM1)||OK|
|Serial port 2 (COM2)||Unknown||Simple UART mode only (due to TTL level, used by the smartcard reader). LinuxBIOS enables COM2, but that's about it.|
|Parallel port||OK||Running modprobe ppdev works fine, but further tests were not done, yet.|
|PC speaker||WIP||Doesn't seem to work on LinuxBIOS, not even after modprobe pcspkr (maybe unmute required?). TODO: Check if it works with SMI polling driver.|
|DiskOnChip||Untested||Might work using mtd-tools. Flashrom has some alpha-level support too, but it's unsupported and can only write (not read) the DoC, AFAICS.|
|Sensors / fan control||N/A||This CPU does not need a fan.|
|CPU frequency scaling||OK||Frequency scaling on this CPU is useless. Stop clock on HLT saves more power (enabled by Linux as default).|
|Other powersaving features||WIP||Hardware supports dozens of such features, but someone must write the software to control them.|
|Reboot||OK||Linux supports this chipset to force a hard reset.|
|Poweroff||WIP||Doesn't work yet, neither on vendor BIOS nor LinuxBIOS. Could be done in the Super-I/O but needs a piece of software to do so.|
|High precision event timers (HPET)||N/A|
|Random number generator (RNG)||N/A|
|Wake on modem ring||N/A||Probably not feasible, there's no connector available, and no PCI/ISA to attach external modems.|
|Wake on LAN||OK||Works fine with wakeonlan xx:xx:xx:xx:xx:xx (supplying the MAC address of the onboard ethernet device), both on vendor BIOS and LinuxBIOS. WOL seems to be implemented completely in hardware on this board, thus no special LinuxBIOS support is required.|
|Wake on keyboard||N/A||Doesn't seem to be supported by the Super I/O, and there's no BIOS menu to check/enable this feature.|
|Wake on mouse||N/A||Doesn't seem to be supported by the Super I/O, and there's no BIOS menu to check/enable this feature.|
|Flashrom||OK||Works fine, both with LinuxBIOS and with the proprietary BIOS.|
- GX1-300B-85-20 Cyrix/National/AMD CPU with 300MHz core clock
- CS5530A-UCE part of the chipset, Cyrix/National/AMD companion device
- PC97317 Super I/O
- RTL8139C Realtec network controller
- SST 39F020A or SST 39SF020A or MX 29F002NT PLCC32 256kiB flash memory to boot (in a socket)
- LM4546 National, AC97 AD/DA
- DOC2000 DIL32 16MiB DiskOnChip (MD2202-D16), in a socket
- SDRAM 32MiB SDRAM with 133MHz/CL2 capability as SO-DIMM
- IMT-S001-1 smart card chip
- 1x PS/2 keyboard
- 1x PS/2 mouse
- 1x serial port (COM1)
- 1x parallel port
- 2x USB (OHCI)
- 1x DSUB15 VGA analogue
- 1x RJ45
- Audio: stereo line-in, stereo line-out, mic (+ mono built-in speaker)
- 1x 44pin 2mm 2.5" harddisk connector
- 1x serial port (COM2), but TTL levels only (used for the smartcard reader)
- JDOC1 for setting the DiskOnChip address. 1-2: C800, 2-3: D800, 3-4: DC00. Default: 2-3.
- JLAN1 (hardwired to 1-2, purpose unknown)
- JP1/JP2: XX: 1.8V / 266MHz, 0X: 2.0V / 300MHz, 00: 2.2V / 333MHz (but see also JRD01)
- JPWN1 for switching the power on and off (simple push-button, controlled via the PC97317 Super I/O)
- JRD01 for setting the CPU clock speed. XXX: 266MHz, X00: 300MHz, 0X0: 333MHz. Default: X00 (but see also JP1/JP2)
- JRTC1 for clearing CMOS. 1-2: clean, 2-3: normal. Default: 2-3.
(X means empty, 0 means there's a jumper on that pin)
Detailed System Information
The following information was gathered on a running Linux 2.6.21 system, booted via LinuxBIOS:
-[0000:00]-+-00.0 Cyrix Corporation PCI Master [1078:0001] +-0f.0 Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ [10ec:8139] +-12.0 Cyrix Corporation 5530 Legacy [Kahlua] [1078:0100] +-12.1 Cyrix Corporation 5530 SMI [Kahlua] [1078:0101] +-12.2 Cyrix Corporation 5530 IDE [Kahlua] [1078:0102] +-12.3 Cyrix Corporation 5530 Audio [Kahlua] [1078:0103] +-12.4 Cyrix Corporation 5530 Video [Kahlua] [1078:0104] \-13.0 Compaq Computer Corporation ZFMicro Chipset USB [0e11:a0f8]
processor : 0 vendor_id : Geode by NSC cpu family : 5 model : 9 model name : Geode(TM) Integrated Processor by National Semi stepping : 2 cpu MHz : 300.691 cache size : 16 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 2 wp : yes flags : fpu tsc msr cx8 cmov mmx cxmmx bogomips : 602.14 clflush size : 32
00000000-000006d3 : reserved 000006d4-0009ffff : System RAM 000a0000-000bffff : Video RAM area 000f0000-000fffff : System ROM 00100000-01bfffff : System RAM 00100000-00253ad9 : Kernel code 00253ada-002a5f2b : Kernel data 40000000-40000fff : scratch_pad_ram 40000000-40000fff : Geode GX1 Framebuffer 40008000-400080ff : bus_interface 40008000-400080ff : Geode GX1 Bus Interface 40008100-400082ff : video_pipeline 40008100-400082ff : Geode GX1 Framebuffer 40008300-400083ff : display_control 40008300-400083ff : Geode GX1 Framebuffer 40008400-400084ff : memory_control 40008400-400084ff : Geode GX1 Memory Control 40008500-40008fff : power_control.0 40400000-407fffff : smm_area.0 40800000-487fffff : video_memory 40800000-487fffff : Geode GX1 Framebuffer febfb000-febfbfff : 0000:00:12.4 febfb000-febfbfff : Geode GX1 Framebuffer febfc000-febfcfff : 0000:00:13.0 febfc000-febfcfff : ohci_hcd febfd000-febfd0ff : 0000:00:0f.0 febfd000-febfd0ff : 8139too febfe000-febfe0ff : 0000:00:12.1 febfe000-febfe0ff : CS5530a (Kahlua) SMI handler febff000-febff07f : 0000:00:12.3 fffc0000-ffffffff : flash_memory.0
Building a coreboot image
See the Build HOWTO for information on how to build coreboot for this board.
Using the hardware with a current kernel
The current 2.6.22/23 kernel does not know the CS5530 interrupt router. So it is impossible to let the kernel itself setup PCI's interrupt routing. Even if you provide the kernel with a valid interrupt routing table (PIRQ). No interrupts will work as the interrupt routing registers are still left at their reset values. The small patch below solves this issue (it was rejected in mainline as it breaks various standard BIOS based Geode systems, as they were shipped with broken PIRQ tables ).
Since kernel 2.6.23 Geode chipset access macros are now working as expected. Due to this, some chipset tweaks embedded in the kernel are working now. One of these tweaks setup the performance incrementor for a 233MHz CPU. This may fail on a 300MHz CPU now (additionally it depends on the SDRAM speed). The symptom of this failure is a freezing system after running a while (after warm up). Take a look into arch/i386/kernel/cpu/cyrix.c, function set_cx86_inc(). Correct the setting to:
setCx86(CX86_PCR0, getCx86(CX86_PCR0) | 0x05);
when you run a 300MHz CPU.
How to bring coreboot in
I was not successful to boot anything other than the software in the DoC to get some information about this board. It seems a very special BIOS as it only outputs "booting os" and nothing else. Then the splash screen comes up and the graphical environment starts. One or two times I was successful to run an update of this firmware. Because the update process fails (the server it tries to connect to doesn't answer anymore), the console comes up. That's why I know they run a 2.4 kernel with an XFree86 3.x. Their software needs about one and a half minute to boot up and supports graphical resolutions up to XGA@64k colours and SXGA@256 colours.
With my own implementation (LinuxBIOSv2, Linux 2.6.2x kernel, Xorg 7.2) I boot this machine in about 10 seconds, then the xdm dialogue occures (its a terminal, not a workstation) and supports also SXGA@64k colours.
As is it hard to get a console on this system with the original software, I found no way to reprogram the boot flash in a running system. But it is very easy to disassemble the flash memory. Only 3 screws to unscrew at the reverse.
Pull the front panel to one side, the casing to the other. Done. You now have access to all relevant parts.
To disassemble the PLCC32 boot flash ROM you need something with a hook. I'm using my SMD tweezer. Did I mention that you will need something to burn your flash?
How to build a root filesystem
This question is easy to answer. Download the following archives:
Start with the BSP, extract it and read the quickstart in Documentation/GeoTerm-Quickstart.pdf. It will guide you through the steps that are required to:
- get a generic project build system,
- get a cross toolchain for the Geode GX1,
- configure the BSP and build it,
- bring this target up and running with coreboot and GNU/Linux.
The BSP builds all parts to run this Geode GX1 system. This includes coreboot (LinuxBIOS) and the kernel and also userland with X to run as a terminal (not as host!).
Note: This BSP includes all required patches for the kernel. You won't need the patches below.
When you build your own kernel for this target you might need the following patches:
- This patch is needed to let Linux know the Cyrix 5530 interrupt router.
- This patch is needed as someone has overoptimised chipset tweaks so the used access macros failed. This patch is required only for kernels up to 2.6.22. From Linux 2.6.23 on it's part of mainline.
|| This file is licensed under Creative Commons Attribution 2.5 License.|
In short: you are free to distribute and modify the file as long as you attribute its author(s) or licensor(s).