The wiki is being retired!
Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
This page describes a tester device, which is capable of programming a BIOS ROM chip while it is connected to a live mainboard. The tester is controlled by a host PC via USB. The purpose of this tester device is to provide a do-it-yourself hardware for testing Coreboot builds. The goal is to support automated builds and tests from version control repository.
The tester can program the ROM chip regardless of the state of the mainboard. Therefore it is suitable for testing experimental Coreboot builds, which may or may not be able to boot properly.
The tester is built around the Atmel AT90USB162 microcontroller, which is programmed using avr-gcc and the LUFA library. The host-side software is currently Flashrom.
- Tester consists of two circuit boards: main and auxiliary board. Main tester board connects to host via USB, and to aux board via ribbon cable.
- Smaller boards are easier to build
- Minimize the size of tester to be plugged into mainboard, in case there are obstructions.
- Modular hardware to later accommodate other ROM types besides SPI.
- Optionally, the main tester board can be connected to the reset and ATX power pins of the target mainboard. All common sense voltages (1..5V) are supported.
- The main tester board has a standard serial port for reading debug output from the target mainbaord.
- PCB layout is kept simple, so that it can be built using hobbyist methods, e.g. toner transfer PCB etching. The parts have been chosen so that they should be quite well available and inexpensive.
- Designed using open source tools.
- The auxiliary board can be powered from either the tester or the mainboard.
- Tester can operate and reprogram ROM even while target mainboard has no power.
- Target mainboard can operate normally while tester has no power.
- Currently supports SPI ROMs only.
- Current firmware and flashrom extension do not support serial port or reset/power switch operation.
- Flashing speed could be improved. Now reading 1 MByte takes ~70 sec, flash & verify takes ~150 sec.
- Redesign the protocol between microcontroller and host software. (Firmware, host USB driver, flashrom module, and possible other applications)
- Add possibilty to control a relay to switch AC power to target mainboard on and off.
- Add voltage sense lines to detect voltage levels in the test target.
- Extend the design to support other ROM types also.
- Integrate to Coreboot automated test system.
In the images shown are two-sides circuit boards. Red mask shows component-side copper and blue mask shows solder-side copper.
Schematics were drawn using gschem.
Board layouts were drawn using PCB.
- R1,R2: USB line termination resistors. 22 ohm.
- R3,R4: LED current limiters. 270 ohm.
- R5,R6,R7: Pull-ups. 10k ohm.
- C1,C2: Oscillator capacitors. 22 pF.
- U2: Crystal oscillator. 16 MHz.
- C3,C4,C5,C6: Charge pump capacitors. About 100 nF.
- C7: Power bypass. Used 1 microF.
- J1: 2x5 pin header. Pins 1-6 are used to load AVR firmware. Pins 1-6,9,10 connect to aux PCB.
- J2: Alternative connector for RS232.
- CONN4: 2x2 pin header
- CONN2: USB B (device-side) connector.
- CONN3: DB-9 male connector with 90° angle.
- U1: Atmel AT90USB162 in TQFP-32.
- U3: Texas Instruments MAX3232ECDG4 in SOIC-16.
- U4: Texas Instruments SN74CBT3306D Dual FET bus switch in SOIC-8.
- D1,D2: LEDs. Used green and yellow.
- U1: DIP-8 socket for SPI ROM chip.
- U2: SOIC-16 Texas Instruments SN74CBTLV3257D FET Multiplexer
- U3: DIP-8 pin header on the solder-side of the board (plugs to mainboard ROM socket)
- C1,C2: Power bypass capacitors. 100nF worked fine.
- D1,D2: Schottky diodes with low forward voltage drop. Here SD103A-T/R
- R1: Pull-up resistor. 120 kohm was used.
- J1: 2x5 pin header for connecting to tester main PCB. Pins 7 and 8 are not used.
The AVR firmware is based on the LUFA library. Version 101122 was used in development.
The current host-side software is Flashrom extended with serprog_spi module. It uses serprog-derived protocol over a serial port over USB. (This is a bit silly design, and should be replaced. It was used to enable quick testing with standard Linux kernel USB CDC driver on the host side and easy Flashrom modification. )
Contributions and good design suggestions are welcome.
Download hardware, firmware, and sources from Git repository:
$ git clone http://alpskari.asiantuntijat.org/~juhe/isf.git
Note (2011-02-28): This server has recently been down more than expected due to electrical power problems at the ISP's server room.