Infrastructure Projects

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Revision as of 22:29, 9 April 2010 by PatrickGeorgi (talk | contribs) (Tiny Bootblock)
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The wiki is being retired!

Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to Contributions welcome!

This page collects a list of projects to improve the infrastructure of coreboot v4. Infrastructure means those parts of the code that aren't chipset or mainboard specific, but are used by all of them. The idea is to consolidate a list of things "to do" with their status and responsible developers.

In progress

Low/High Tables

SeaBIOS requires a copy of various BIOS tables outside the fseg as it overwrites that segment. Generally clean out the table generation code.

Status: Upstream, implemented on some boards. There are problems on some chipsets/boards because of incorrect CONFIG_VIDEO_MB handling. The might be other issues, too (not clear, yet).

Vendor/chipset Tested Comments
amd/amdfam10  ?
amd/amdht  ?
amd/amdk8  ?
amd/amdmct  ?
amd/gx1  ?
amd/gx2  ?
amd/lx  ?
intel/e7501  ?
intel/e7520  ?
intel/e7525  ?
intel/i3100  ?
intel/i440bx  ?
intel/i82810  ?
intel/i82830  ?
intel/i855  ?
intel/i945 Y Tested on Kontron 986LCD-M and Roda RK886EX
via/cn400  ?
via/cn700 Y Tested on VIA pc2500e.
via/cx700  ?
via/vt8601  ?
via/vt8623  ?
via/vx800  ?

Developers: Stefan


A filesystem-alike layout for the coreboot image, to enable systems like bayou and to clean up the system in general (eg. no more buildrom).


Upstream, pre-CBFS infrastructure removed.

There are places where using CBFS might be a good idea: Everything that makes use of external files, for example the VSA code in the Geode chipset code. VSA is converted, and tested on a couple of configurations, but untested on others.

Some boards have issues with CBFS because it requires the whole ROM to be accessible at a quite early point in time (compared to the old mechanism). The following table contains validated knowledge if the ROM mapping happens at the right time.

All boards that manage to boot in a tinybootblock configuration are capable at least for the used ROM size (it might be that larger ROMs would fail because they require mapping the larger space)

Vendor/chipset ROM enabled Status / Comments
amd/amd8111 Y An enable_rom() function is implemented and called failover_process(). Untested on hardware, though.
amd/cs5530 Y Not tested on hardware, yet.
amd/cs5535  ?
amd/cs5536  ?
amd/sb600  ?
broadcom/bcm5785 Y An enable_rom() function is implemented and called failover_process(). Untested on hardware, though.
intel/esb6300  ?
intel/i3100  ?
intel/i82371eb Y Build- and runtime-tested on ASUS P2B by Uwe Hermann
intel/i82801ax  ?
intel/i82801bx  ?
intel/i82801cx  ?
intel/i82801dx  ?
intel/i82801ex  ?
intel/i82801gx  ?
nvidia/ck804 Y An enable_rom() function is implemented and called failover_process(). Untested on hardware, though.
nvidia/mcp55 Y An enable_rom() function is implemented and called failover_process(). Untested on hardware, though.
sis/sis966 Y An enable_rom() function is implemented and called failover_process(). Untested on hardware, though.
via/vt8231  ?
via/vt8235  ?
via/vt8237r  ?
via/vt82c686  ?
winbond/w83c553  ?

Developers: Stefan, Ron, Patrick, Myles, Uwe

Common payload location

Many boards in v2 have different names for the payload in targets/.../ (payload.elf, filo.elf, etherboot.elf, etc) and locations (../payload.elf, or various absolute paths which only work for one developer). The problem will be fixed with kconfig in v2 where the user specifies a payload manually in "make menuconfig".

Tiny Bootblock

Right now, the decision whether to use fallback or normal is in cache_as_ram_auto.c in many boards. Make that generic again (also helps with further CBFSification at some point).

Status: Available in Kconfig, works on a couple of boards. Requires per southbridge changes (and northbridge in some cases) on many boards (related to ROM enable, see CBFS section).

Developers: Patrick

More ideas

Unify ACPI

Every ACPI board has its own routines to compile the ACPI sources. Unify that. Also, figure out generic ACPI code and deduplicate it.

CMOS layout

Allow (somehow) to define defaults for all CMOS fields, and create a static table from that. Use that at runtime if the CMOS checksum fails.

Unify UMA / onboard video code and config

Unify CONFIG_VIDEO_MB, CONFIG_GFXUMA, and similar options and make all code honor them.

Add / Unify / Test kconfig compile-time options and runtime CMOS options in coreboot

Some coreboot options are compile-time configurable only at the moment ( or kconfig), but should also be runtime-configurable via CMOS/NVRAM options. We should fix this.

  • Make all options (where it makes sense) run-time configurable via CMOS options, in addition to having sane compile-time defaults configured via kconfig.
  • This includes many options which are northbridge-specific, many southbridge-specific, and some board-specific ones.
  • Example options: Enable/disable IDE channel(s) / SATA / USB / SCSI / etc., enable/disable UDMA on older boards, amount of memory used for IGP/UMA, choice between IDE or NAND flash (on CS5536 boards), IDE 40/80 pin cable selection (VT8237R boards for example), and many more.
  • Some of these options are already handled in the code via CMOS options, some are compile-time only so far, so do not yet exist at all.

Kconfig TODO

Notes / Style guide:

  • Any bool variables that are (re-)defined to 'y' in Kconfig files can be simplified by using select FOO instead of the usual paragraph, as long as they're defined globally as default n boolean elsewhere.
  • Use bool instead of boolean.
  • Use default n instead of default false.

Various post-conversion things to consider:

  • Consider ways to move crt0-y and ldscript-y out of $(src)/arch/i386/ where appropriate (ie. component specific)
  • Make various CONFIG_* variable which were in each board's global or per-chipset options (instead of per-board). Examples:
    • ...

Stuff to port from v3 to v2:

  • All boards that are in v3 but not in v2 (especially Geode LX stuff. Also check amd/model_gx*).
  • Some remaining useful Kconfig options.

USB Debug Console

Fix usb debug console and make the Kconfig choice actually work. Right now it's possible to transmit single characters but it's not really hooked up.

Clean up Assembler / Linker mess

  • drop / combine / normalize .ld/.lb/.lds linker scripts
  • move them to a common place
  • drop / combine / normalize .inc / .S files

Post codes

  • post_code consolidation: find all outb(x, 0x80)
  • post_code consolidation: common numbers / defines across the boards

Geode issues

  • Fix / Unify vsmsetup.c
  • Fix CS5535/CS5536/GX2/LX "chipsetinit" issue.

Use central oprom init

  • get rid of all vgabios.c, make all chipsets with own vgabios.c use devices/oprom/x86.c
  • use the realmode code for vsmsetup too

Stack and Suspend/Resume

  • use CONFIG_RAMBASE + HIGH_MEMORY_SAFE instead of 0x40000 for stack.

Fix Suspend/Resume on AMD64

  • use cbmem in romstage on the AMD64 board(s) that have suspend/resume

Fix ALL build warnings

someone has to do the deed.


Port v3 Resource Allocator

The v3 resource allocator should be ported to v2.

Status: Upstream. It's limited to one area for resources, that doesn't overlap with fixed resources.

Developers: Myles

Config & Build System

The current system of generated Makefiles is non-ideal (for too many reasons for this little margin). Fix it, somehow. Use KConfig to improve the configuration management.

Status: Upstream, boards are converted. Old system is gone. All boards build. HOWEVER, not all boards have been boot-tested yet, please report any issues you encounter!

Developers: Stefan, Ron, Patrick, Uwe, Cristi

Unify text printing functions

There are several copies of print_* and printk_* in the code. Unify them so everything is happier than before (because the disjoint features are merged).

Developers: Patrick, Stefan